Commit Graph

90216 Commits

Author SHA1 Message Date
Thierry Reding
7e4ba90fb9 ARM: tegra: Add Tegra114 DSI support
Add device tree nodes for the DSI controllers found on Tegra114 SoCs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-19 17:07:52 -07:00
Mikko Perttunen
65344b936e ARM: tegra: Add host1x, DC and HDMI to Tegra114 device tree
Add host1x, DC (display controller) and HDMI devices to Tegra114
device tree.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-19 17:07:52 -07:00
Thierry Reding
e3d04d179c ARM: tegra: Add MIPI calibration DT entries for Tegra114
Add a device node for the MIPI calibration block on Tegra114. There is
no need to disable it by default because it only enables the clock while
performing calibration and therefore shouldn't be consuming any power
when unused.

Signed-off-by: Thierry Reding <treding@nvidia.com>
[swarren, add unit address to new DT node name]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-19 17:07:31 -07:00
Thierry Reding
02b1fea2e4 ARM: tegra: Enable LVDS on Cardhu
Add backlight and panel nodes for the Cardhu 10.1" WXGA TFT LCD panel.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-19 13:07:38 -07:00
Thierry Reding
1d4e068948 ARM: tegra: Enable LVDS on Harmony
Add backlight and panel nodes for the Harmony TFT LCD panel.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-19 13:07:37 -07:00
Stephen Warren
b1afa7822d ARM: tegra: set up /aliases for RTCs on Venice2
This ensures that the PMIC RTC provides the system time, rather than
the on-SoC RTC, which is not battery-backed.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-19 11:41:25 -07:00
Laxman Dewangan
fcacaba732 ARM: tegra: add ams AS3722 device to Venice2 DT
Add ams AS3722 entry for gpio/pincontrol and regulators
to venice2 DT.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-19 11:40:39 -07:00
Laxman Dewangan
365c483f19 ARM: tegra: fix missing pincontrol configuration for Venice2
Compare the initial population of default pinmux configuration of Venice2
with the chrome branch and add/fix the missing configurations.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-19 11:40:36 -07:00
Stephen Warren
553c0a200e ARM: tegra: set up /aliases entries for RTCs
This ensures that the PMIC RTC provides the system time, rather than
the on-SoC RTC, which is not battery-backed.

tegra124-venice2.dts isn't touched yet since we haven't added any off-
SoC RTC device to its device tree.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-18 14:10:48 -07:00
Thierry Reding
9f1ac5606a ARM: tegra: Add SPI controller nodes for Tegra124
The SPI controllers on Tegra124 are compatible with those found on the
Tegra114 SoC.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:22 -07:00
Thierry Reding
f5cb19b496 ARM: tegra: Fix misconfiguration of pin PH2 on Venice2
This pin needs to be configured in pull-down, non-tristate mode in order
for the backlight to work correctly.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:22 -07:00
Stephen Warren
4ffb938576 ARM: tegra: fix pinctrl misconfiguration on Venice2
Other boards use PULL_NONE for their debug UART pins, and without this
change, the board doesn't accept any serial input.

Don't set the I2S port pins to tristate mode, or no audio signal will
be sent out.

Fixes: 605ae5804385 ("ARM: tegra: add default pinctrl nodes for Venice2")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:21 -07:00
Laxman Dewangan
4b20bcbea1 ARM: tegra: add default pinctrl nodes for Venice2
Add the default pinmux configuration for the Tegra124 based
Venice2 platform.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:21 -07:00
Stefan Agner
c7ac2b7b1e ARM: tegra: correct Colibri T20 regulator settings
Set the parent of the regulators LDO2 to LDO9 according to the
schematic. Set the base voltage to 3.3V, there is only 3.3V on the
module itself.

Set the Core and CPU voltage to the specified voltages of 1.2V and
1.0V respectivly.

LDO6 should deliver 2.85V. The attached peripherals were not in
use so far.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:21 -07:00
Laxman Dewangan
a47c662aad ARM: tegra: convert dts files of Tegra30 platforms to use pinctrl defines
Use Tegra pinconrol dt-binding macro to set the values of different pinmux
properties of Tegra30 platforms.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:20 -07:00
Laxman Dewangan
ba4104e794 ARM: tegra: convert dts files of Tegra20 platforms to use pinctrl defines
Use Tegra pinconrol dt-binding macro to set the values of different pinmux
properties of Tegra20 platforms.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:20 -07:00
Laxman Dewangan
5fc6b0dd31 ARM: tegra: convert dts files of Tegra114 platforms to use pinctrl defines
Use Tegra pinconrol dt-binding macro to set the values of different pinmux
properties of Tegra114 platforms.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:20 -07:00
Laxman Dewangan
6bccbd5e18 ARM: tegra: convert device tree files to use key defines
Use key code macros for all key code refernced for keys.

For tegra20-seaboard.dts and tegra20-harmony.dts:
  The key comment for key (16th row and 1st column) is KEY_KPSLASH but
  code is 0x004e which is the key code for KEY_KPPLUS. As there other
  key exist with KY_KPPLUS, I am assuming key code is wrong and comment
  is fine. With this assumption, I am keeping the key code as KEY_KPSLASH.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:20 -07:00
Thierry Reding
e013485d12 ARM: tegra: Enable PWM on Venice2
Subsequent patches will need to reference a PWM channel for backlight
support, so enable the PWM device and assign a label to it.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:19 -07:00
Thierry Reding
111a1fc2a7 ARM: tegra: Add Tegra124 PWM support
The PWM controller on Tegra124 is the same as the one on earlier SoC
generations.

Signed-off-by: Thierry Reding <treding@nvidia.com>
[swarren, added reset properties]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:19 -07:00
Stephen Warren
b0e1caeedd ARM: tegra: add sound card to Venice2 DT
Venice2 uses the MAX98090 audio CODEC, and supports built-in speakers,
and a combo headphones/microphone jack. Add a top-level sound card node
to represent this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:19 -07:00
Stephen Warren
e66555788a ARM: tegra: add audio-related device to Tegra124 DT
Tegra124 contains a similar set of audio devices to previous Tegra chips.
Specifically, there is an AHUB device which contains DMA FIFOs and audio
routing, and which hosts various audio-related components such as I2S
controllers.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:19 -07:00
Stephen Warren
9d5b250507 ARM: tegra: enable I2C controllers on Venice2
Enable all the I2C controllers that are wired up on Venice2. I don't
know the correct I2C bus clock rates, so set them all to a conservative
100KHz for now.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:18 -07:00
Stephen Warren
4f6074601a ARM: tegra: add I2C controllers to Tegra124 DT
Tegra124 has 6 I2C controllers. The first 5 have identical configuration
to Tegra114, but the sixth obviously has different interrupt/... IDs.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:18 -07:00
Stephen Warren
784c7444f0 ARM: tegra: add MMC controllers to Tegra124 DT
Tegra124 has 4 MMC controllers just like previous versions of the SoC.
Note that there are some non-backwards-compatible HW differences, and
hence a new DT compatible value must be used to describe the HW.

Also enable the relevant controllers in the Venice2 board DT.

power-gpios property suggested by Thierry Reding.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
2013-12-16 14:09:18 -07:00
Stephen Warren
caefe637b4 ARM: tegra: add Tegra124 pinmux node to DT
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked by: Laxman Dewangan <ldewangan@nvidia.com>
2013-12-16 14:09:18 -07:00
Stephen Warren
2f5a913eb5 ARM: tegra: add APB DMA controller to Tegra124 DT
Instantiate the APB DMA controller in the Tegra124 DT, and add all
DMA-related properties to other DT nodes that rely on (reference) the
DMA controller's node.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
2013-12-16 14:09:17 -07:00
Stephen Warren
f71e4f034a ARM: tegra: add reset properties to Tegra124 DTs
The DT bindings now require module resets to be specified. The earlier
patches which added these nodes were originally written before that
requirement.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
2013-12-16 14:09:17 -07:00
Joseph Lo
3b86baf296 ARM: tegra: add clock properties for devices of Tegra124
This patch adds clock properties for devices in the DT for basic support
of Tegra124 SoC.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
[swarren, added missing unit address to "clock" node]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:17 -07:00
Stephen Warren
578990537a ARM: tegra: fix node sort order
For Tegra DT files, I've been attempting to keep the nodes sorted in
the order:
1) Nodes with reg, in order of reg.
2) Nodes without reg, alphabetically.

This patch fixes a few escapees that I missed:-(

The diffs look larger than they really are, because sometimes when one
node was moved up or down, diff chose to represent this as many other
nodes being moved the other way!

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:17 -07:00
Stephen Warren
58ecb23f64 ARM: tegra: add missing unit addresses to DT
DT node names should include a unit address iff the node has a reg
property. For Tegra DTs at least, we were previously applying a different
rule, namely that node names only needed to include a unit address if it
was required to make the node name unique. Consequently, many unit
addresses are missing. Add them.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:16 -07:00
Stephen Warren
74511c4bef ARM: tegra: remove legacy DMA entries from DT
Now that all Tegra drivers have been converted to use DMA APIs which
retrieve DMA channel information from standard DMA DT properties, we can
remove all the legacy DT DMA-related properties.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
2013-12-11 16:45:02 -07:00
Stephen Warren
2bd541ffaa ARM: tegra: remove legacy clock entries from DT
Now that all Tegra drivers have been converted to use the common reset
framework, we can remove all the legacy DT clocks/clock-names entries for
"clocks" that were only used with the old custom Tegra module reset API.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
2013-12-11 16:44:55 -07:00
Stephen Warren
80b28791ff ARM: tegra: pass reset to tegra_powergate_sequence_power_up()
Tegra's clock driver now provides an implementation of the common
reset API (include/linux/reset.h). Use this instead of the old Tegra-
specific API; that will soon be removed.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
2013-12-11 16:43:11 -07:00
Stephen Warren
e04214683a ARM: tegra: select the reset framework
The Tegra clock driver is built unconditionally when Tegra support is
enabled. In order to avoid having to ifdef the forthcoming reset driver
implementation, have ARCH_TEGRA select RESET_CONTROLLER.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
2013-12-11 16:42:44 -07:00
Stephen Warren
034d023f67 ARM: tegra: update DT files to add DMA properties
This patch switches the Tegra DT files to use the standard DMA DT bindings
rather than custom properties. Note that the legacy properties are not yet
removed; the drivers must be updated to use the new properties first.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
2013-12-11 16:42:38 -07:00
Stephen Warren
3393d42205 ARM: tegra: update DT files to add reset properties
An earlier patch updated the Tegra DT bindings to require resets and
reset-names properties to be filled in. This patch updates the DT files
to include those properties.

Note that any legacy clocks and clock-names entries that are replaced by
reset properties are not yet removed; the drivers must be updated to use
the new resets and reset-names properties first.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-11 16:42:32 -07:00
Stephen Warren
d8f64797c5 ARM: tegra: add missing clock documentation to DT bindings
Many of the Tegra DT binding documents say nothing about the clocks or
clock-names properties, yet those are present and required in DT files.
This patch simply updates the documentation file to match the implicit
definition of the binding, based on real-world DT content.

All Tegra bindings that mention clocks are updated to have consistent
wording and formatting of the clock-related properties.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
2013-12-11 16:41:55 -07:00
Linus Torvalds
53c6de5026 Merge branch 'x86/urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 and EFI fixes from Peter Anvin:
 "Half of these are EFI-related:

  The by far biggest change is the change to hold off the deletion of a
  sysfs entry while a backend scan is in progress.  This is to avoid
  calling kmemdup() while under a spinlock.

  The other major change is for each entry in the EFI pstore backend to
  get a unique identifier, as required by the pstore filesystem proper.

  The other changes are:

  A fix to the recent consolidation and optimization of using "asm goto"
  with read-modify-write operation, which broke the bitops; specifically
  in such a way that we could end up generating invalid code.

  A build hack to make sure we compile with -mno-sse.  icc, and most
  likely future versions of gcc, can generate SSE instructions unless we
  tell it not to.

  A comment-only patch to a change the was due in part to an unpublished
  erratum; now when the erratum is published we want to add a comment
  explaining why"

* 'x86/urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/apic, doc: Justification for disabling IO APIC before Local APIC
  x86, bitops: Correct the assembly constraints to testing bitops
  x86-64, build: Always pass in -mno-sse
  efi-pstore: Make efi-pstore return a unique id
  x86/efi: Fix earlyprintk off-by-one bug
  efivars, efi-pstore: Hold off deletion of sysfs entry until the scan is completed
2013-12-04 21:45:21 -08:00
Fenghua Yu
2885432aaf x86/apic, doc: Justification for disabling IO APIC before Local APIC
Since erratum AVR31 in "Intel Atom Processor C2000 Product Family
Specification Update" is now published, I added a justification
comment for disabling IO APIC before Local APIC, as changed in commit:

522e664644 x86/apic: Disable I/O APIC before shutdown of the local APIC

Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Link: http://lkml.kernel.org/r/1386202069-51515-1-git-send-email-fenghua.yu@intel.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-12-04 19:33:21 -08:00
H. Peter Anvin
e0f6dec35f x86, bitops: Correct the assembly constraints to testing bitops
In checkin:

0c44c2d0f4 x86: Use asm goto to implement better modify_and_test() functions

the various functions which do modify and test were unified and
optimized using "asm goto".  However, this change missed the detail
that the bitops require an "Ir" constraint rather than an "er"
constraint ("I" = integer constant from 0-31, "e" = signed 32-bit
integer constant).  This would cause code to miscompile if these
functions were used on constant bit positions 32-255 and the build to
fail if used on constant bit positions above 255.

Add the constraints as a parameter to the GEN_BINARY_RMWcc() macro to
avoid this problem.

Reported-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/529E8719.4070202@zytor.com
2013-12-04 14:31:28 -08:00
Linus Torvalds
36059ee2ba ARM: SoC fixes for 3.13-rc
Another batch of fixes for ARM SoCs for 3.13. The diffstat is large,
 mostly because of:
 
 - Another set of fixes to fix regressions caused by moving OMAP from board
   files to DT. Tony thinks this was the last major set of fixes, with
   maybe just a few small patches to follow.
 - More fixes for Marvell platforms, most dealing with misdescribed PCIe
   hardware, i.e. incorrect number of busses on some SoCs, etc. The line
   delta adds up due to various ranges moving around when this is fixed.
 
 But there's also:
 
 - Some smaller tweaks to defconfigs to make more boards bootable in my
   test setup for better coverage.
 - There are also a few other smaller fixes, a short series for at91, a couple
   of reverts for ux500, etc.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJSnsLnAAoJEIwa5zzehBx3wzIP/0CmvZtGwhz2edhHK4k1iiqT
 fqZl74aLrm6dHm41jvyr3lDcWkc+uFHP7HUDfCtA/y6iEjy2sOd8fQyTro+i6qnO
 5wbTuyi4byHeBtKhIzrxG87Rny65i5MwszTtpCoNR166HGTP/M2lC2M0Qy44l+DD
 3eRjpQ62ehlJ7jxtBDG8+9F22vaiDpy2R1hoGUtaOHZrG9j1Nlo19fjCVwVjq8f3
 Varv3tKCEALmoMh4Dd+nqP62SFvMeve5z0NIcFTdXuqkGNCT1Cn4JSBr66JfzoMy
 yqzewtZueb3oQQEpbPEWeuEikHiP2IdmHtp/8YrQMO8Q8/HOiusadV2spdx4z8ID
 GdAjt4tlq36A5LOeP6o2vXg7UZ5T/14hFOodai0Avr6w5/xNvFUPOI0u5SABPjfA
 bAjrtMl6iZUMhkuXxUNidrGWE+Juo+uJG0bLo9ikwu2vCi4LwzIrrMDeIfiLDQdy
 fDFFZiihGBUui5sMqTE8OHTVMockrtAIUjGDAvnZ6nLF+Lpr5WRpIrUHgQKG4zyE
 e6s5c6uzMlaSFzO7MFgznCnS6gxtolN0xH6d2CtkJGSUDC6soAb4hPNPHjWV6zFG
 pfr8lfG8I88H0OBGNIYAQm3//bEj54awU3qQDtckVVwxWSjx56gR2VMQWZ+k0X8P
 VyMIJx38II5EfwlP16hp
 =PljB
 -----END PGP SIGNATURE-----

Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "Another batch of fixes for ARM SoCs for 3.13.  The diffstat is large,
  mostly because of:

   - Another set of fixes to fix regressions caused by moving OMAP from
     board files to DT.  Tony thinks this was the last major set of
     fixes, with maybe just a few small patches to follow.
   - More fixes for Marvell platforms, most dealing with misdescribed
     PCIe hardware, i.e.  incorrect number of busses on some SoCs, etc.
     The line delta adds up due to various ranges moving around when
     this is fixed.

  But there's also:

   - Some smaller tweaks to defconfigs to make more boards bootable in
     my test setup for better coverage.
   - There are also a few other smaller fixes, a short series for at91,
     a couple of reverts for ux500, etc"

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (39 commits)
  arm: dts: socfpga: Change some clocks of gate-clk type to perip-clk
  arm: socfpga: Enable ARM_TWD for socfpga
  ARM: multi_v7_defconfig: enable SDHCI_BCM_KONA and MMC_BLOCK_MINORS=16
  ARM: sunxi_defconfig: enable NFS, TMPFS, PRINTK_TIME and nfsroot support
  ARM: multi_v7_defconfig: enable network for BeagleBone Black
  ARM: dts: Fix the name of supplies for smsc911x shared by OMAP
  ARM: OMAP2+: Powerdomain: Fix unchecked dereference of arch_pwrdm
  ARM: dts: omap3-beagle: Add omap-twl4030 audio support
  ARM: dts: omap4-sdp: Fix pin muxing for wl12xx
  ARM: dts: omap4-panda-common: Fix pin muxing for wl12xx
  ARM: at91: fixed unresolved symbol "at91_pm_set_standby" when built without CONFIG_PM
  ARM: at91: add usart3 alias to dtsi
  ARM: at91: sama5d3: reduce TWI internal clock frequency
  mmc: omap: Fix I2C dependency and make driver usable with device tree
  mmc: omap: Fix DMA configuration to not rely on device id
  ARM: dts: omap3-beagle: Fix USB host on beagle boards (for 3.13)
  ARM: dts: omap3-igep0020: name twl4030 VPLL2 regulator as vdds_dsi
  ARM: dts: AM33XX IGEP0033: add USB support
  ARM: dts: AM33XX BASE0033: add 32KBit EEPROM support
  ARM: dts: AM33XX BASE0033: add pinmux and user led support
  ...
2013-12-04 08:56:18 -08:00
Linus Torvalds
8aa9c36788 Merge branch 'parisc-3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux
Pull parsic updates from Helge Deller:
 - a fix for the mmap(MAP_FIXED|MAP_SHARED) syscall to the same address
   which was already given in a previous call (fixes locale-gen on
   debian)
 - change the memory layout of the kernel to avoid the need for the
   -mlong-calls compiler option (depends on commit 5ecbe3c3c6 -
   "kernel/extable: fix address-checks for core_kernel and init areas")
 - defconfig updates, e.g.  use the SIL680 driver instead of the SIIMAGE
   driver
 - add more parisc machine names to the machine database

* 'parisc-3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux:
  parisc: update 64bit defconfigs and use SIL680 instead of SIIMAGE driver
  parisc: remove CONFIG_MLONGCALLS=y from defconfigs
  parisc: fix kernel memory layout in vmlinux.ld.S
  parisc: use kernel_text_address() in unwind functions
  parisc: remove empty SERIAL_PORT_DFNS in serial.h
  parisc: add some more machine names to hardware database
  parisc: fix mmap(MAP_FIXED|MAP_SHARED) to already mmapped address
2013-12-04 08:54:36 -08:00
Linus Torvalds
d644c026e6 Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
Pull crypto fixes from Herbert Xu:
 "This push fixes a number of crashes triggered by a previous crypto
  self-test update.  It also fixes a build problem in the caam driver,
  as well as a concurrency issue in s390.

  Finally there is a pair of fixes to bugs in the crypto scatterwalk
  code and authenc that may lead to crashes"

* git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6:
  crypto: testmgr - fix sglen in test_aead for case 'dst != src'
  crypto: talitos - fix aead sglen for case 'dst != src'
  crypto: caam - fix aead sglen for case 'dst != src'
  crypto: ccm - Fix handling of zero plaintext when computing mac
  crypto: s390 - Fix aes-xts parameter corruption
  crypto: talitos - corrrectly handle zero-length assoc data
  crypto: scatterwalk - Set the chain pointer indication bit
  crypto: authenc - Find proper IV address in ablkcipher callback
  crypto: caam - Add missing Job Ring include
2013-12-04 08:53:09 -08:00
Linus Torvalds
1ab231b274 Merge branch 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull timer fixes from Thomas Gleixner:

 - timekeeping: Cure a subtle drift issue on GENERIC_TIME_VSYSCALL_OLD

 - nohz: Make CONFIG_NO_HZ=n and nohz=off command line option behave the
   same way.  Fixes a long standing load accounting wreckage.

 - clocksource/ARM: Kconfig update to avoid ARM=n wreckage

 - clocksource/ARM: Fixlets for the AT91 and SH clocksource/clockevents

 - Trivial documentation update and kzalloc conversion from akpms pile

* 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  nohz: Fix another inconsistency between CONFIG_NO_HZ=n and nohz=off
  time: Fix 1ns/tick drift w/ GENERIC_TIME_VSYSCALL_OLD
  clocksource: arm_arch_timer: Hide eventstream Kconfig on non-ARM
  clocksource: sh_tmu: Add clk_prepare/unprepare support
  clocksource: sh_tmu: Release clock when sh_tmu_register() fails
  clocksource: sh_mtu2: Add clk_prepare/unprepare support
  clocksource: sh_mtu2: Release clock when sh_mtu2_register() fails
  ARM: at91: rm9200: switch back to clockevents_config_and_register
  tick: Document tick_do_timer_cpu
  timer: Convert kmalloc_node(...GFP_ZERO...) to kzalloc_node(...)
  NOHZ: Check for nohz active instead of nohz enabled
2013-12-04 08:52:09 -08:00
H. Peter Anvin
5551a34e5a x86-64, build: Always pass in -mno-sse
Always pass in the -mno-sse argument, regardless if
-preferred-stack-boundary is supported.  We never want to generate SSE
instructions in the kernel unless we *really* know what we're doing.

According to H. J. Lu, any version of gcc new enough that we support
it at all should handle the -mno-sse option, so just add it
unconditionally.

Reported-by: Kevin B. Smith <kevin.b.smith@intel.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: H. J. Lu <hjl.tools@gmail.com>
Link: http://lkml.kernel.org/n/tip-j21wzqv790q834n7yc6g80j1@git.kernel.org
Cc: <stable@vger.kernel.org> # build fix only
2013-12-03 17:40:22 -08:00
Helge Deller
a16ab68ee9 parisc: update 64bit defconfigs and use SIL680 instead of SIIMAGE driver
Signed-off-by: Helge Deller <deller@gmx.de>
2013-12-03 23:23:35 +01:00
Dinh Nguyen
a5c6e87a7b arm: dts: socfpga: Change some clocks of gate-clk type to perip-clk
Some of the clocks that were designated gate-clk do not have a gate, so
change those clocks to be of periph-clk type.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-12-03 14:19:53 -08:00
Dinh Nguyen
725dd7eb17 arm: socfpga: Enable ARM_TWD for socfpga
Update Kconfig to enable TWD.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-12-03 14:19:48 -08:00
Olof Johansson
f39918eec7 ARM: multi_v7_defconfig: enable SDHCI_BCM_KONA and MMC_BLOCK_MINORS=16
Enable MMC/SD on the Broadcom mobile platforms, and increase the block
minors from the default 8 to 16 (since the Broadcom board by default
has root on the 8th partition).

Signed-off-by: Olof Johansson <olof@lixom.net>
Cc: stable@vger.kernel.org # v3.12
2013-12-03 12:39:14 -08:00