Commit Graph

192 Commits

Author SHA1 Message Date
Alex Deucher
d7ccd8fc11 drm/radeon/kms: add drm blit support for evergreen
This patch implements blit support for bo moves using
the 3D engine.  It uses the same method as r6xx/r7xx:
- store the base state in an IB
- emit variable state and vertex buffers to do the blit

This allows the hw to move bos using the 3D engine and allows
full use of vram beyond the pci aperture size.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-10-06 11:46:30 +10:00
Alex Deucher
d0f8a854c3 drm/radeon/kms/r6xx+: use new style fencing (v3)
On r6xx+ a newer fence mechanism was implemented to replace
the old wait_until plus scratch regs setup.  A single EOP event
will flush the destination caches, write a fence value, and generate
an interrupt.  This is the recommended fence mechanism on r6xx+ asics.

This requires my previous writeback patch.

v2: fix typo that enabled event fence checking on all asics
rather than just r6xx+.

v3: properly enable EOP interrupts
Should fix:
https://bugs.freedesktop.org/show_bug.cgi?id=29972

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-10-06 11:38:08 +10:00
Alex Deucher
724c80e1d6 drm/radeon/kms: enable writeback (v2)
When writeback is enabled, the GPU shadows writes to certain
registers into a buffer in memory.  The driver can then read
the values from the shadow rather than reading back from the
register across the bus.  Writeback can be disabled by setting
the no_wb module param to 1.

On r6xx/r7xx/evergreen, the following registers are shadowed:
- CP scratch registers
- CP read pointer
- IH write pointer
On r1xx-rr5xx, the following registers are shadowed:
- CP scratch registers
- CP read pointer

v2:
- Combine wb patches for r6xx-evergreen and r1xx-r5xx
- Writeback is disabled on AGP boards since it tends to be
unreliable on AGP using the gart.
- Check radeon_wb_init return values properly.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-10-06 11:38:08 +10:00
Alex Deucher
b741be82cf drm/radeon/kms/evergreen: fix backend setup
This patch fixes rendering errors on some evergreen boards.
Hardcoding the backend map is not an optimal solution, but
a better fix is being worked on.

Similar to the fix for rv740
(6271901d82).

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=29986

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-09-13 20:29:38 +10:00
Alex Deucher
7e7b41d2ff drm/radeon/kms/evergreen: fix gpu hangs in userspace accel code
These VGT regs need to be programmed via the ring rather than
MMIO as on previous asics (r6xx/r7xx).

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-09-07 08:00:35 +10:00
Alex Deucher
0b3b4fea0a drm/radeon/kms: remove useless clock code
This code was originally for forcing some clocks on certain asics.
However, this code was later moved to asic specific functions
for all of the affected asics.  The only users of the original
code at this point were r600, rv770, and evergreen and the code
was not relevant for those asics.  So, remove it.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-09-02 11:28:52 +10:00
Alex Deucher
e7aeeba6a8 drm/radeon/kms/r6xx+: add query for tile config (v2)
Userspace needs this information to access tiled
buffers via the CPU.

v2: rebased on evergreen accel changes

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-08-02 10:00:05 +10:00
Alex Deucher
21a8122ad3 drm/radeon/kms: add support for internal thermal sensors (v3)
rv6xx/rv7xx/evergreen families supported; older asics did
not have an internal thermal sensor.

Note, not all oems use the internal thermal sensor, so it's
only exposed in cases where it is used.

Note also, that most laptops use an oem specific ACPI solution for
GPU thermal information rather than using the internal thermal
sensor directly.

v2: export millidegrees celsius, use hwmon device properly.
v3: fix Kconfig

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-08-02 10:00:00 +10:00
Dave Airlie
db8cc27b80 Merge branch 'drm-platform' into drm-testing
* drm-platform:
  drm: Make sure the DRM offset matches the CPU
  drm: Add __arm defines to DRM
  drm: Add support for platform devices to register as DRM devices
  drm: Remove drm_resource wrappers
2010-07-07 18:37:35 +10:00
Alex Deucher
60a4a3e0ce drm/radeon/kms: add some missing regs to evergreen gpu init
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-07-01 11:59:39 +10:00
Jerome Glisse
46fcd2b3db drm/radeon/kms: Force HDP_NONSURF to maximum size
HDP non surface should cover the whole VRAM but we were misscomputing
the size and we endup in some case not covering the VRAM at all (if
VRAM size were > 1G). Covering more than the VRAM size shouldn't be
an issue.

Fix : https://bugs.freedesktop.org/show_bug.cgi?id=28016

[airlied: add evergreen fix]

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-07-01 11:59:33 +10:00
Alex Deucher
f96b35cd6f drm/radeon/kms: fix typo in evergreen_gpu_init
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-07-01 11:59:29 +10:00
Rafał Miłecki
0fcbe9473a drm/radeon/kms: add trivial debugging for voltage
agd5f: rebased

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-06-08 09:36:09 +10:00
Rafał Miłecki
a081a9d6f5 drm/radeon/kms/r600+: use voltage from requested clock mode (v3)
This fixes FDO bug , it's kind of regression, so quite important to have
it for .35.

V2: Fix on RV770+ as well. All other chipsets have only one clock mode per
state.

V3: I'm out of luck today. Grepped for voltage in r*.c and missed evergreen.

agd5f: rebased

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-06-08 09:36:03 +10:00
Alex Deucher
4d60173fc1 drm/radeon/kms/pm: track current voltage (v2)
track the current voltage level and avoid setting it
if the requested voltage is already set.

v2: check voltage type before checking current voltage

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-06-08 09:35:53 +10:00
Alex Deucher
148a03bc0b drm/radeon/kms/evergreen: set accel_enabled
This is needed to enable accel in the ddx.  However,
due to a bug in older versions of the ddx, it relies
on accel being disabled in order to load properly on
evergreen chips.  To maintain compatility, we add a new
get accel param and call that from the ddx.  The old one
always returns false for evergreen cards.

[this fixes a regression with older userspaces on newer kernels].

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-06-08 09:34:42 +10:00
Alex Deucher
9349d5cc92 drm/radeon/kms/pm: enable SetVoltage on r7xx/evergreen
I missed these in the r6xx commit.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-06-03 13:13:28 +10:00
Jordan Crouse
01d73a6967 drm: Remove drm_resource wrappers
Remove the drm_resource wrappers and directly use the
actual PCI and/or platform functions in their place.

[airlied: fixup nouveau properly to build]

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-06-01 10:07:24 +10:00
Alex Deucher
ce8f53709b drm/radeon/kms/pm: rework power management
- Separate dynpm and profile based power management methods.  You can select the pm method
  by echoing the selected method ("dynpm" or "profile") to power_method in sysfs.
- Expose basic 4 profile in profile method
  "default" - default clocks
  "auto" - select between low and high based on ac/dc state
  "low" - DC, low power mode
  "high" - AC, performance mode
  The current base profile is "default", but it should switched to "auto" once we've tested
  on more systems.  Switching the state is a matter of echoing the requested profile to
  power_profile in sysfs.  The lowest power states are selected automatically when dpms turns
  the monitors off in all states but default.
- Remove dynamic fence-based reclocking for the moment.  We can revisit this later once we
  have basic pm in.
- Move pm init/fini to modesetting path.  pm is tightly coupled with display state.  Make sure
  display side is initialized before pm.
- Add pm suspend/resume functions to make sure pm state is properly reinitialized on resume.
- Remove dynpm module option.  It's now selectable via sysfs.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-05-18 18:21:52 +10:00
Alex Deucher
49e02b7306 drm/radeon/kms/pm: add additional asic callbacks
- pm_misc() - handles voltage, pcie lanes, and other non
clock related power mode settings.  Currently disabled.
Needs further debugging

- pm_prepare() - disables crtc mem requests right now.
All memory clients need to be disabled when changing
memory clocks.  This function can be expanded to include
disabling fb access as well.

- pm_finish() - enable active memory clients.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-05-18 18:21:12 +10:00
Alex Deucher
2031f77ca9 drm/radeon/kms: add support for gui idle interrupts (v4)
Useful for certain power management operations.  You
need to wait for the GUI engine (2D, 3D, CP, etc.) to be
idle before changing clocks or adjusting engine parameters.

(v2) Fix gui idle enable on pre-r6xx asics

(v3) The gui idle interrrupt status bit is permanently asserted
on pre-r6xx chips, but the interrrupt is still generated.
workaround it in the driver.

(v4) Add support for evergreen

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-05-18 18:20:49 +10:00
Dave Airlie
7547a917fa Merge branch 'drm-ttm-unmappable' into drm-core-next
* drm-ttm-unmappable:
  drm/radeon/kms: enable use of unmappable VRAM V2
  drm/ttm: remove io_ field from TTM V6
  drm/vmwgfx: add support for new TTM fault callback V5
  drm/nouveau/kms: add support for new TTM fault callback V5
  drm/radeon/kms: add support for new fault callback V7
  drm/ttm: ttm_fault callback to allow driver to handle bo placement V6
  drm/ttm: split no_wait argument in 2 GPU or reserve wait

Conflicts:
	drivers/gpu/drm/nouveau/nouveau_bo.c
2010-04-20 14:15:09 +10:00
Jerome Glisse
6b8b1786a8 drm/radeon/kms: enable use of unmappable VRAM V2
This patch enable the use of unmappable VRAM thanks to
previous TTM infrastructure change.

V2 update after io_mem_reserve/io_mem_free callback balancing

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-04-20 14:14:25 +10:00
Dave Airlie
153549b8b6 Merge branch 'drm-radeon-evergreen-accel' into drm-core-next
* drm-radeon-evergreen-accel:
  drm/radeon: fix cypress firmware typo.
  drm/radeon/kms/evergreen: add hpd support
  drm/radeon/kms/evergreen: implement irq support
  drm/radeon/kms/evergreen: setup and enable the CP
  drm/radeon/kms/evergreen: implement gfx init
  drm/radeon/kms/evergreen: add soft reset function
  drm/radeon/kms/evergreen: add gart support
  drm/radeon/kms: add support for evergreen power tables
  drm/radeon/kms: update atombios.h power tables for evergreen
2010-04-20 13:16:50 +10:00
Dave Airlie
0bcb1d844a Merge branch 'drm-radeon-lockup' into drm-core-next
* drm-radeon-lockup:
  drm/radeon/kms: simplify & improve GPU reset V2
  drm/radeon/kms: rename gpu_reset to asic_reset
  drm/radeon/kms: fence cleanup + more reliable GPU lockup detection V4

Conflicts:
	drivers/gpu/drm/radeon/r300.c
2010-04-20 13:15:05 +10:00
Alex Deucher
0ca2ab52d4 drm/radeon/kms/evergreen: add hpd support
Hot plug detect (hpd) for digital monitors

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-04-09 10:16:14 +10:00
Alex Deucher
45f9a39bed drm/radeon/kms/evergreen: implement irq support
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-04-09 10:16:09 +10:00
Alex Deucher
fe251e2fff drm/radeon/kms/evergreen: setup and enable the CP
The command processor (CP) fetches command buffers and
feeds the GPU.  This patch requires the evergreen
family me and pfp ucode files.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-04-09 10:16:04 +10:00
Alex Deucher
32fcdbf408 drm/radeon/kms/evergreen: implement gfx init
This initializes the gfx engine so accel can
eventually be used.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-04-09 10:16:00 +10:00
Alex Deucher
747943ea18 drm/radeon/kms/evergreen: add soft reset function
Works pretty similarly to r6xx/r7xx.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-04-09 10:15:35 +10:00
Alex Deucher
0fcdb61e78 drm/radeon/kms/evergreen: add gart support
Gart setup is more or less like r7xx.  Copy
rv770d.h to evergreend.h and fix up changes.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-04-09 10:15:32 +10:00
Jerome Glisse
a2d07b7438 drm/radeon/kms: rename gpu_reset to asic_reset
Patch rename gpu_reset to asic_reset in prevision of having
gpu_reset doing more stuff than just basic asic reset.

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-04-06 11:21:04 +10:00
Jerome Glisse
225758d8ba drm/radeon/kms: fence cleanup + more reliable GPU lockup detection V4
This patch cleanup the fence code, it drops the timeout field of
fence as the time to complete each IB is unpredictable and shouldn't
be bound.

The fence cleanup lead to GPU lockup detection improvement, this
patch introduce a callback, allowing to do asic specific test for
lockup detection. In this patch the CP is use as a first indicator
of GPU lockup. If CP doesn't make progress during 1second we assume
we are facing a GPU lockup.

To avoid overhead of testing GPU lockup frequently due to fence
taking time to be signaled we query the lockup callback every
500msec. There is plenty code comment explaining the design & choise
inside the code.

This have been tested mostly on R3XX/R5XX hw, in normal running
destkop (compiz firefox, quake3 running) the lockup callback wasn't
call once (1 hour session). Also tested with forcing GPU lockup and
lockup was reported after the 1s CP activity timeout.

V2 switch to 500ms timeout so GPU lockup get call at least 2 times
   in less than 2sec.
V3 store last jiffies in fence struct so on ERESTART, EBUSY we keep
   track of how long we already wait for a given fence
V4 make sure we got up to date cp read pointer so we don't have
   false positive

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-04-06 10:42:45 +10:00
Tejun Heo
336f5899d2 Merge branch 'master' into export-slabh 2010-04-05 11:37:28 +09:00
Alex Deucher
f47299c55a drm/radeon/kms: display watermark fixes
- rs780/880 were using the wrong bandwidth functions
- convert r1xx-r4xx to use the same pm sclk/mclk structs as
r5xx+
- move bandwidth setup to a common function

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-03-31 13:02:06 +10:00
Alex Deucher
29fb52ca78 drm/radeon/kms: expose thermal/fan i2c buses
Look up i2c bus in the power table and expose it.
You'll need to load a hwmon driver for any chips
on the bus, this patch just exposes the bus.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2010-03-31 09:38:06 +10:00
Tejun Heo
5a0e3ad6af include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files.  percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.

percpu.h -> slab.h dependency is about to be removed.  Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability.  As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.

  http://userweb.kernel.org/~tj/misc/slabh-sweep.py

The script does the followings.

* Scan files for gfp and slab usages and update includes such that
  only the necessary includes are there.  ie. if only gfp is used,
  gfp.h, if slab is used, slab.h.

* When the script inserts a new include, it looks at the include
  blocks and try to put the new include such that its order conforms
  to its surrounding.  It's put in the include block which contains
  core kernel includes, in the same order that the rest are ordered -
  alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
  doesn't seem to be any matching order.

* If the script can't find a place to put a new include (mostly
  because the file doesn't have fitting include block), it prints out
  an error message indicating which .h file needs to be added to the
  file.

The conversion was done in the following steps.

1. The initial automatic conversion of all .c files updated slightly
   over 4000 files, deleting around 700 includes and adding ~480 gfp.h
   and ~3000 slab.h inclusions.  The script emitted errors for ~400
   files.

2. Each error was manually checked.  Some didn't need the inclusion,
   some needed manual addition while adding it to implementation .h or
   embedding .c file was more appropriate for others.  This step added
   inclusions to around 150 files.

3. The script was run again and the output was compared to the edits
   from  to make sure no file was left behind.

4. Several build tests were done and a couple of problems were fixed.
   e.g. lib/decompress_*.c used malloc/free() wrappers around slab
   APIs requiring slab.h to be added manually.

5. The script was run on all .h files but without automatically
   editing them as sprinkling gfp.h and slab.h inclusions around .h
   files could easily lead to inclusion dependency hell.  Most gfp.h
   inclusion directives were ignored as stuff from gfp.h was usually
   wildly available and often used in preprocessor macros.  Each
   slab.h inclusion directive was examined and added manually as
   necessary.

6. percpu.h was updated not to include slab.h.

7. Build test were done on the following configurations and failures
   were fixed.  CONFIG_GCOV_KERNEL was turned off for all tests (as my
   distributed build env didn't work with gcov compiles) and a few
   more options had to be turned off depending on archs to make things
   build (like ipr on powerpc/64 which failed due to missing writeq).

   * x86 and x86_64 UP and SMP allmodconfig and a custom test config.
   * powerpc and powerpc64 SMP allmodconfig
   * sparc and sparc64 SMP allmodconfig
   * ia64 SMP allmodconfig
   * s390 SMP allmodconfig
   * alpha SMP allmodconfig
   * um on x86_64 SMP allmodconfig

8. percpu.h modifications were reverted so that it could be applied as
   a separate patch and serve as bisection point.

Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.

Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-30 22:02:32 +09:00
Daniel Vetter
e6990375ef drm/radeon: include radeon_asic.h in the asic specific files
In essence this creates a home for all asic specific declarations in
radeon_asic.h

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-03-15 11:27:22 +10:00
Jerome Glisse
51e5fcd353 drm/radeon/kms: force pinning buffer into visible VRAM
This patch properly set visible VRAM and enforce any pinned buffer
to be into visible VRAM. We might later add a flag to release this
constraint for some newer hw more clever than previous.

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-02-25 11:32:36 +10:00
Jerome Glisse
d594e46ace drm/radeon/kms: simplify memory controller setup V2
Get rid of _location and use _start/_end also simplify the
computation of vram_start|end & gtt_start|end. For R1XX-R2XX
we place VRAM at the same address of PCI aperture, those GPU
shouldn't have much memory and seems to behave better when
setup that way. For R3XX and newer we place VRAM at 0. For
R6XX-R7XX AGP we place VRAM before or after AGP aperture this
might limit to limit the VRAM size but it's very unlikely.
For IGP we don't change the VRAM placement.

Tested on (compiz,quake3,suspend/resume):
PCI/PCIE:RV280,R420,RV515,RV570,RV610,RV710
AGP:RV100,RV280,R420,RV350,RV620(RPB*),RV730
IGP:RS480(RPB*),RS690,RS780(RPB*),RS880

RPB: resume previously broken

V2 correct commit message to reflect more accurately the bug
and move VRAM placement to 0 for most of the GPU to avoid
limiting VRAM.

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-02-18 14:49:35 +10:00
Dave Airlie
8256856568 drm/radeon/kms: set gart pages to invalid on unbind and point to dummy page
this uses a new entrypoint to invalidate gart entries instead of using 0.
Changed to rather than pointing to 0 address point empty entry to dummy
page. This might help to avoid hard lockup if for some wrong
reasons GPU try to access unmapped GART entry.

I'm not 100% sure this is going to work, we probably need to allocate
a dummy page and point all the GTT entries at it similiar to what AGP does.
but we can test this first I suppose.

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-02-11 19:11:32 +10:00
Alex Deucher
bcc1c2a1d2 drm/radeon/kms: add initial Evergreen support (Radeon HD 5xxx)
This adds initial Evergreen KMS support, it doesn't include
any acceleration features or interrupt handling yet.

Major changes are DCE4 handling for PLLs for the > 2 crtcs.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-02-09 09:44:02 +10:00