Commit Graph

36461 Commits

Author SHA1 Message Date
Kevin D. Kissell
846acaa2b4 [MIPS] Patch to arch/mips/mips-boards/generic/time.c
In hooking up the perf counter overflow interrupt to the experimental
deprecated-real-soon-now /proc/perf interface last night, I had to
revisit arch/mips/mips-boards/generic/time.c, and discovered that
when the 2.6.9-based SMTC prototype was merged with the more
recent tree, it was missed that arch/mips/kernel/time.c had changed
so that even in SMP kernels, timer_interrupt() calls
local_timer_interrupt(), so there is no longer a need to invoke it
directly from mips_timer_interrupt() in those cases where
timer_interrupt() has been called.  So I got rid of that, and added the
invocation of perf_irq() if Cause.PCI is set, more-or-less following the
same logic as in the non-SMTC case, with the modifications that (a) a
runtime check for Release 2 isn't done, because it's redundant in SMTC),
and (b) we check for a clock interrupt regardless of the value returned
by the perf counter service - I don't understand why we'd want to control
that with perf_irq(), but maybe one of you knows the story.  I also got
rid of the stupid warning about the unused variable when compiled for
SMTC (another artifact of the merge). The result hasn't been beaten to
death, but boots, seems stable, and supports extended precision event
counting.

Signed-off-by: Kevin D. Kissell <kevink@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:41 +01:00
Atsushi Nemoto
60a6c3777e [MIPS] Reduce race between cpu_wait() and need_resched() checking
If a thread became runnable between need_resched() and the WAIT
instruction, switching to the thread will delay until a next interrupt.
Some CPUs can execute the WAIT instruction with interrupt disabled, so
we can get rid of this race on them (at least UP case).

Original Patch by Atsushi with fixing up for MIPS Technology's cores by
Ralf based on feedback from the RTL designers.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:40 +01:00
Atsushi Nemoto
7fdeb04814 [MIPS] Wire up set_robust_list(2) and get_robust_list(2)
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:40 +01:00
Atsushi Nemoto
8f9a2b3246 [MIPS] Fix errors detected by "make headers_check"
* export asm/sgidefs.h
* include asm/isadep.h only if in kernel
* do not export contents of asm/timex.h and asm/user.h

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:40 +01:00
Ralf Baechle
d34555fb20 [MIPS] Do not lose upper 32-bit on MIPS32 with 64-bit addresses in __pte().
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:39 +01:00
Ralf Baechle
65316fd13a [MIPS] Replace generic__raw_read_trylock usage
generic__raw_read_trylock() is a defect generic function actually doing
a __raw_read_lock ...

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:39 +01:00
Maciej W. Rozycki
09f451bfb9 [MIPS] SEAD defconfig build fix
Signed-off-by: Maciej W. Rozycki <macro@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:38 +01:00
Alexander Bigga
32136568a9 [MIPS] Fix for pci config_access on alchemy au1x000
I've encountered a serious problem with PCI config space access on Au1x000
platforms with recent 2.6.x-kernel. With 2.4.31 the same hardware works fine.
So I was looking for the differences:

Symptoms:
- no PCI-device is seen on bootup though two or three cards are present
- lspci output is empty
- OR: lspci shows 20 times the same device
(- OR: in some slot-configurations it worked anyhow)

System(s):
1. platform with Au1500 and three PCI-devices (actually a mycable XXS1500
    with backplane for three PCI-devices)
2. platform with Au1550 and two PCI-devices (custom board)

Debugging:
I digged down to the config_access() of the au1xxx-processors in
arch/mips/pci/ops-au1000.c and switched on DEBUG.

The code of config_access() seems to be almost the same as of the
2.4.x-kernel. But the "pci_cfg_vm->addr" returned by get_vm_area(0x2000, 0)
once on booting is different. That's of course not forbidden. But the
alignment seems to be wrong. In my case, I received:

2.4.31: pci_cfg_vm->addr = c0000000
2.6.18-rc5: pci_cfg_vm->addr = c0101000

To make it short: With 2.6.x it fails on the first config-access with:
"PCI ERR detected: status 83a00356".

Fixup:
My fix is now, to use the VM_IOREMAP-flag in the get_vm_area call. This flag
seems to be introduced in mm/vmalloc.c a long time ago (in 2.6.7-bk13, I
found in gitweb).
Now, the returned address is pci_cfg_vm->addr = c0104000 and everything works
fine.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:38 +01:00
Atsushi Nemoto
898d229107 [MIPS] Make prepare_frametrace() not clobber v0
Since lmo commit 323a380bf9e1a1679a774a2b053e3c1f2aa3f179 ("Simplify
dump_stack()") made prepare_frametrace() always inlined, using $2 (v0)
in __asm__ is not safe anymore.  We can use $1 (at) instead.  Also we
should use "dla" instead of "la" for 64-bit kernel.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:37 +01:00
Atsushi Nemoto
f6502791d7 [MIPS] Do not use drop_mmu_context to flusing other task's VIPT I-cache.
c-r4k.c and c-sb1.c use drop_mmu_context() to flush virtually tagged
I-caches, but this does not work for flushing other task's icache.  This
is for example triggered by copy_to_user_page() called from ptrace(2).
Use indexed flush for such cases.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:37 +01:00
Elizabeth Oldham
a94d702049 [MIPS] MT: Fix setting of XTC.
XTC can only be set if VPA is clear, which it may not be. There is
also the possibility of a back to back c0 register access hazard to
take care of.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:36 +01:00
Ralf Baechle
6e74bae9a0 [MIPS] SMTC Build fix.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:36 +01:00
Ralf Baechle
dc41fb4396 [MIPS] Fix 32-bit kernel by replacing 64-bit-only code.
dclz() expects its 64-bit argument being passed as a single register
but on 32-bit kernels it'll actually be in a register pair.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:35 +01:00
Ralf Baechle
73b76c78fd [MIPS] MT: When doing "select SMP" also select SMP's prerequesites or ...
... kconfig will do weird stuff.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:35 +01:00
Ralf Baechle
c487d2a5a0 [MIPS] eXcite: Don't set SERIAL_RM9000.
The driver has not been merged yet so selecting it results in a warning
message.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:34 +01:00
Ralf Baechle
585fa72493 [MIPS] Retire flush_icache_page from mm use.
On the 34K the redundant cache operations were causing excessive stalls
resulting in realtime code running on the second VPE missing its deadline.
For all other platforms this patch is just a significant performance
improvment as illustrated by below benchmark numbers.

Processor, Processes - times in microseconds - smaller is better
------------------------------------------------------------------------------
Host                 OS  Mhz null null      open slct sig  sig  fork exec sh
                             call  I/O stat clos TCP  inst hndl proc proc proc
--------- ------------- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ----
25Kf      2.6.18-rc4     533 0.49 1.16 7.57 33.4 30.5 1.34 12.4 5497 17.K 54.K
25Kf      2.6.18-rc4-p   533 0.49 1.16 6.68 23.0 30.7 1.36 8.55 5030 16.K 48.K
4Kc       2.6.18-rc4      80 4.21 15.0 131. 289. 261. 16.5 258. 18.K 70.K 227K
4Kc       2.6.18-rc4-p    80 4.34 13.1 128. 285. 262. 18.2 258. 12.K 52.K 176K
34Kc      2.6.18-rc4      40 5.01 14.0 61.6 90.0 477. 17.9 94.7 29.K 108K 342K
34Kc      2.6.18-rc4-p    40 4.98 13.9 61.2 89.7 475. 17.6 93.7 8758 44.K 158K
BCM1480   2.6.18-rc4     700 0.28 0.60 3.68 5.92 16.0 0.78 5.08 931. 3163 15.K
BCM1480   2.6.18-rc4-p   700 0.28 0.61 3.65 5.85 16.0 0.79 5.20 395. 1464 8385
TX49-16K  2.6.18-rc3     197 0.73 2.41 19.0 37.8 82.9 2.94 17.5 4438 14.K 56.K
TX49-16K  2.6.18-rc3-p   197 0.73 2.40 19.9 36.3 82.9 2.94 23.4 2577 9103 38.K
TX49-32K  2.6.18-rc3     396 0.36 1.19 6.80 11.8 41.0 1.46 8.17 2738 8465 32.K
TX49-32K  2.6.18-rc3-p   396 0.36 1.19 6.82 10.2 41.0 1.46 8.18 1330 4638 18.K
    
Original patch by me with enhancements by Atsushi Nemoto.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
2006-09-27 13:37:34 +01:00
Ralf Baechle
13fdd31abe [MIPS] Avoid double signal restarting.
In entry.S resume_userspace ... jal do_notify_resume form a loop through
which the kernel will iterate as long as work is pending.  If we
iterate through this loop more than once with no signal pending for at
least one but the last iteration we will take do the syscall restarting
multiple times resulting in a syscall return prior to the the syscall
instruction in userspace.  This may happen when debugging a multithreaded
program.

Debugging and original fix by Maciej; extended to other ABIs by me.

Signed-off-by: Maciej W. Rozycki <macro@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:33 +01:00
Chris Dearman
847b9dfcca [MIPS] MT: Initialise all writable bits in Cause register to zero.
Recent 34Ks come out of reset with WP enabled on VPE 1 so we take an
immediate exception when starting the second VPE.

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:33 +01:00
Yoichi Yuasa
bca70d24c0 [MIPS] Fix EV64120 PCI fixup in Makefile
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:33 +01:00
Ralf Baechle
45887e12f2 [MIPS] Add missing returns in signal code.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:32 +01:00
Ralf Baechle
1b223c861f [MIPS] IRIX: Crapectopy.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:31 +01:00
Ralf Baechle
048c6140c0 [MIPS] Don't call try_to_freeze in do_signal & co.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:30 +01:00
Ralf Baechle
b4b30a5a0a [MIPS] Cleanup leftovers of ARCH_HAS_IRQ_PER_CPU
CONFIG_IRQ_PER_CPU now controls the IRQ_PER_CPU stuff.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:29 +01:00
Franck Bui-Huu
4d157d5eac [MIPS] Improve unwind_stack()
This patch allows unwind_stack() to return ra for leaf function.
But it tries to detects cases where get_frame_info() wrongly
consider nested function as a leaf one.

It also pass 'unsinged long *sp' instead of 'unsigned long **sp'
as second parameter. The code looks cleaner.

Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:29 +01:00
Franck Bui-Huu
0cceb4aa9a [MIPS] Make get_frame_info() more robust
Now get_frame_info() wants to detect move sp instruction first. It
assumes that the save ra in the stack instruction can't happen
before allocating frame size space into the stack.

Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:28 +01:00
Franck Bui-Huu
1666a6fc73 [MIPS] Simplify dump_stack()
Make dump_stack() code not depend on CONFIG_KALLSYMS.

It also make prepare_frametrace() always inlined to get
less false entries reported by show_raw_backtrace().

Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:28 +01:00
Franck Bui-Huu
6057a79876 [MIPS] Make frame_info_init() more readable.
Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:27 +01:00
Franck Bui-Huu
87151ae39b [MIPS] Miscellaneous cleanup in prologue analysis code
We usually use backtrace term for dumping a call tree during
debug. Therefore this patch renames show_frametrace() into
show_backtrace() and show_trace() into show_raw_backtrace().

It also uses the new function print_ip_sym().

Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:26 +01:00
Franck Bui-Huu
cf495a3330 [MIPS] Remove unused MODULE_RANGE macro.
Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:25 +01:00
Franck Bui-Huu
c0efbb6dc2 [MIPS] Make get_frame_info() more readable.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:24 +01:00
Ralf Baechle
df586d59a4 [MIPS] c-r4k: Typo fix.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:23 +01:00
Peter Watkins
1b4ee40a13 [MIPS] N32 rt_sigqueueinfo uses O32 padding, not N64
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:22 +01:00
Atsushi Nemoto
f66686f70a [MIPS] dump_stack() based on prologue code analysis
Instead of dump all possible address in the stack, unwind the stack frame
based on prologue code analysis, as like as get_wchan() does.  While the
code analysis might fail for some reason, there is a new kernel option
"raw_show_trace" to disable this feature.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:06 +01:00
Yoichi Yuasa
79495d876c [MIPS] db1x00: Remove unused mirage_ts.c
CONFIG_WM97XX_COMODULE doesn't exist.

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:05 +01:00
Atsushi Nemoto
e889d78fd5 [MIPS] Rearrange show_stack, show_trace
Print call-trace in show_stack() (like on other archs).  Also make
show_trace() static and simplify its argument list.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:05 +01:00
Yoichi Yuasa
e7dee3cea4 [MIPS] Updat mpc30x defconfig
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:05 +01:00
Yoichi Yuasa
bbbdb8567e [MIPS] Updat workpad defconfig
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:04 +01:00
Yoichi Yuasa
53a73347fa [MIPS] Update e55 defconfig
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:04 +01:00
Maxime Bizon
d4fd1989ea [MIPS] Honour "panic_on_oops" sysctl.
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:03 +01:00
Paul Mundt
33573c0e32 sh: Fix occasional flush_cache_4096() stack corruption.
IRQs disabling in flush_cache_4096 for cache purge. Under certain
workloads we would get an IRQ in the middle of a purge operation,
and the cachelines would remain in an inconsistent state, leading
to occasional stack corruption.

Signed-off-by: Takeo Takahashi <takahashi.takeo@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27 18:37:30 +09:00
Paul Mundt
f3c2575818 sh: Calculate shm alignment at runtime.
Set the SHM alignment at runtime, based off of probed cache desc.
Optimize get_unmapped_area() to only colour align shared mappings.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27 18:36:17 +09:00
Paul Mundt
87b0ef91b6 sh: dma-mapping compile fixes.
Silly bug, make it build again..

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27 18:34:41 +09:00
Paul Mundt
19f9a34f87 sh: Initial vsyscall page support.
This implements initial support for the vsyscall page on SH.
At the moment we leave it configurable due to having nommu
to support from the same code base. We hook it up for the
signal trampoline return at present, with more to be added
later, once uClibc catches up.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27 18:33:49 +09:00
Paul Mundt
8c12b5dc13 sh: Clean up PAGE_SIZE definition for assembly use.
We want to be able to use PAGE_SIZE all over the place,
this is the same approach adopted by other architectures..

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27 18:31:06 +09:00
Paul Mundt
28ccf7f91b sh: Selective flush_cache_mm() flushing.
flush_cache_mm() wraps in to flush_cache_all(), which is rather
excessive given that the number of PTEs within the specified context
are generally quite low.  Optimize for walking the mm's VMA list and
selectively flushing the VMA ranges from the dcache. Invalidate the
icache only if a VMA sets VM_EXEC.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27 18:30:07 +09:00
Paul Mundt
d15f456043 sh: More intelligent entry_mask/way_size calculation.
Figure out the cache desc entry_mask at runtime, and remove
hard-coded assumption about the cacheline size.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27 18:28:34 +09:00
Paul Mundt
72c35543f8 sh: Support for L2 cache on newer SH-4A CPUs.
This implements preliminary support for the L2 caches found
on newer SH-4A CPUs.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27 18:27:43 +09:00
Paul Mundt
9d549a7d8e sh: Update kexec support for API changes.
This was falling a bit behind..

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27 18:26:05 +09:00
Paul Mundt
05ae915851 sh: Optimized readsl()/writesl() support.
Implement optimized copies of readsl()/writesl().

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27 18:25:24 +09:00
Paul Mundt
2220d16493 sh: Report movli.l/movco.l capabilities.
Add llsc to cpu_flags[] and comment cpu-features.h.

Signed-off-by: Jamie Lenehan <nynaeve@twibble.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27 18:24:28 +09:00