Commit Graph

22 Commits

Author SHA1 Message Date
Nicolas Pitre
f45913fde0 ARM: clean up cache handling in platform code
We have a handy macro to replace open coded __cpuc_flush_dcache_area(()
and outer_clean_range() sequences. Let's use it. No functional change.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-12-11 16:24:34 -08:00
Paul Gortmaker
8bd26e3a7e arm: delete __cpuinit/__CPUINIT usage from all ARM users
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications.  For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.

After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out.  Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.

Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
and are flagged as __cpuinit  -- so if we remove the __cpuinit from
the arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
related content into no-ops as early as possible, since that will get
rid of these warnings.  In any case, they are temporary and harmless.

This removes all the ARM uses of the __cpuinit macros from C code,
and all __CPUINIT from assembly code.  It also had two ".previous"
section statements that were paired off against __CPUINIT
(aka .section ".cpuinit.text") that also get removed here.

[1] https://lkml.org/lkml/2013/5/20/589

Cc: Russell King <linux@arm.linux.org.uk>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2013-07-14 19:36:52 -04:00
Catalin Marinas
c0114709ed irqchip: gic: Perform the gic_secondary_init() call via CPU notifier
All the calls to gic_secondary_init() pass 0 as the first argument.
Since this function is called on each CPU when starting, it can be done
in a platform-independent way via a CPU notifier registered by the GIC
code.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Tested-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: David Brown <davidb@codeaurora.org>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Barry Song <baohua.song@csr.com>
2013-03-26 16:12:02 +00:00
Rob Herring
520f7bd733 irqchip: Move ARM gic.h to include/linux/irqchip/arm-gic.h
Now that we have GIC moved to drivers/irqchip and all GIC DT init for
platforms using irqchip_init, move gic.h and update the remaining
includes.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Anton Vorontsov <avorontsov@mvista.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: David Brown <davidb@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Viresh Kumar <viresh.linux@gmail.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Samuel Ortiz <sameo@linux.intel.com>
2013-01-12 10:47:32 -06:00
Rob Herring
b1cffebf10 ARM: GIC: remove direct use of gic_raise_softirq
In preparation of moving gic code to drivers/irqchip, remove the direct
platform dependencies on gic_raise_softirq. Move the setup of
smp_cross_call into the gic code and use arch_send_wakeup_ipi_mask
function to trigger wake-up IPIs.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: David Brown <davidb@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Olof Johansson <olof@lixom.net>
2013-01-10 11:45:43 -06:00
David Brown
be2109e13f ARM: msm: Move core.h contents into common.h
No real need to have a separate core.h from the common.h file.  Fold
these two prototypes into the common header file.

Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-09-22 00:16:25 -07:00
Olof Johansson
25468fe89f Merge branch 'multiplatform/smp_ops' into next/multiplatform
* multiplatform/smp_ops:
  ARM: consolidate pen_release instead of having per platform definitions
  ARM: smp: Make SMP operations mandatory
  ARM: SoC: convert spear13xx to SMP operations
  ARM: SoC: convert imx6q to SMP operations
  ARM: SoC: convert highbank to SMP operations
  ARM: SoC: convert shmobile SMP to SMP operations
  ARM: SoC: convert ux500 to SMP operations
  ARM: SoC: convert MSM to SMP operations
  ARM: SoC: convert Exynos4 to SMP operations
  ARM: SoC: convert Tegra to SMP operations
  ARM: SoC: convert OMAP4 to SMP operations
  ARM: SoC: convert VExpress/RealView to SMP operations
  ARM: SoC: add per-platform SMP operations

Conflicts due to file moves or removals in:
	arch/arm/mach-msm/board-msm8960.c
	arch/arm/mach-msm/board-msm8x60.c
	arch/arm/mach-tegra/board-harmony.c
	arch/arm/mach-tegra/board-trimslice.c

Conflicts due to board file cleanup:
	arch/arm/mach-tegra/board-paz00.c

Conflicts due to cpu hotplug addition:
	arch/arm/mach-tegra/hotplug.c

Signed-off-by: Olof Johansson <olof@lixom.net>
2012-09-22 00:16:04 -07:00
Olof Johansson
591346c9d1 These patches migrate both the 8660 and 8960 targets on msm to be
devicetree only.  This also sets most of the frame in place necessary
 to build both targets into the same image.
 
 There's a couple of cleanups in here that are kept in this series
 because they are intimately tied to the changes necessary to support
 the devicetree conversions.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2.0.19 (GNU/Linux)
 
 iQIcBAABAgAGBQJQUicBAAoJEOa6n1xeVN+CPjgP/R7ICYx42dS0mFeR0x8Pqwwe
 vIUQ69jJ3JMCb4S9fHSCH8pK3BJK0yTEDITilsEiKV5MhqOZVvCZwK4arxg8kVGr
 mHPVoScP0OfsqAorBoXW/BpCvmv+MzW84l5pCnq4bz8RrJXnL08EQm8kLpiXVBFf
 dWWDZBqBxwR9sNSnqKDb4fbsHGR0rcDcxA/Owv+WnGvqubFR8w2zwV7v7LPTrUM0
 PtS8p1DL4fThF5vZGQwm011YubQMmsj+dL1+AsPL62LyYfDBcb6w2adnwjhJwpQF
 ihkdyURkavg+wrZMg4G6yEQJXCZKz2BppwjZMj9zoEg1NG1XvrS+UvJVjtvnOxaM
 tGt4sw2Rpf0KUIF3BActdsylTCyW1Ra8ncnvLZBrh8gFwyf8iOe7rjj5zpywbPSJ
 grRS7gUGTWuhYpLwv9SlYCdBjmUCRS500MndfcrBwvzjvOh/uHIoqbF9MMFw9k7i
 yt8sJKtr+K2ZQ0Gr/RyEUktDqGRAHKEzf+s7UZkqb58LqtqSuNDv5zPRkWA/wi8t
 QYiA8qRoNxH/45IdN43MWdXnxJZyiPr7pLzr0ZKBvyfx1dFgh4e7ku7Pi0X4fL1f
 ZKtIXKj+LXo9EhRkh5Lq0xthcEjYeOppMFnSIK1dcPx0bNUvnMZ98rg88QO/k1QU
 HUgZPEur0znujhi+OdEl
 =KXPz
 -----END PGP SIGNATURE-----

Merge tag 'msm-dt-for-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm into next/dt

From David Brown:

These patches migrate both the 8660 and 8960 targets on msm to be
devicetree only.  This also sets most of the frame in place necessary
to build both targets into the same image.

There's a couple of cleanups in here that are kept in this series
because they are intimately tied to the changes necessary to support
the devicetree conversions.

By Stephen Boyd
via David Brown
* tag 'msm-dt-for-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm:
  ARM: msm: Remove non-DT targets from 8960
  ARM: msm: Add DT support for 8960
  ARM: msm: Move io mapping prototypes to common.h
  ARM: msm: Rename board-msm8x60 to signify its DT only status
  ARM: msm: Make 8660 a DT only target
  ARM: msm: Move 8660 to DT timer
  ARM: msm: Add DT support to msm_timer
  ARM: msm: Allow timer.c to compile on multiple targets
  ARM: msm: Don't touch GIC registers outside of GIC code
  ARM: msm: Add msm8660-surf.dts to Makefile.boot
  ARM: msm: Add handle_irq handler for 8660 DT machine

Resolved trivial context conflict in arch/arm/mach-msm/io.c and a
remove/change conflict in arch/arm/mach-msm/board-msm8x60.c.

Signed-off-by: Olof Johansson <olof@lixom.net>
2012-09-16 18:03:50 -07:00
Marc Zyngier
28e8e29c61 ARM: consolidate pen_release instead of having per platform definitions
Almost each SMP platform defines pen_release to manage booting secondary
CPUs. This of course clashes with the single zImage effort.

Add the pen_release definition to the ARM SMP code, and remove all others.
This should only be used by platforms which lack any kind of CPU power
management...

Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-09-14 11:15:01 +02:00
Marc Zyngier
44ea349f5b ARM: SoC: convert MSM to SMP operations
Convert MSM SMP platforms to use struct smp_operations to provide
their SMP and CPU hotplug operations.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Cc: David Brown <davidb@codeaurora.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-09-14 11:14:57 +02:00
Stephen Boyd
66a8950949 ARM: msm: Don't touch GIC registers outside of GIC code
The MSM code has some antiquated register writes to set up the
PPIs to be edge triggered. Now that we have the percpu irq
interface we don't need this code so let's remove it and update
the percpu irq user (msm_timer) to set the irq type.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
2012-09-13 11:14:29 -07:00
Russell King
ffae894035 ARM: MSM: use SGI0 to wake secondary CPUs
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-07-09 17:39:36 +01:00
Will Deacon
eb50439b92 ARM: 7293/1: logical_cpu_map: decouple CPU mapping from SMP
It turns out that the logical CPU mapping is useful even when !CONFIG_SMP
for manipulation of devices like interrupt and power controllers when
running a UP kernel on a CPU other than 0. This can happen when kexecing
a UP image from an SMP kernel.

In the future, multi-cluster systems running AMP configurations will
require something similar for mapping cluster IDs, so it makes sense to
decouple this logic in preparation for this support.

Acked-by: Yang Bai <hamo.by@gmail.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Reported-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-23 10:20:05 +00:00
Stephen Boyd
2b222a2971 msm: platsmp: Mark ioremapped memory as __iomem
Fixes a handful of sparse warnings.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
2011-11-11 10:38:08 -08:00
Linus Torvalds
6585dea1f9 Merge branch 'next/cross-platform' of git://git.linaro.org/people/arnd/arm-soc
* 'next/cross-platform' of git://git.linaro.org/people/arnd/arm-soc:
  arm/imx: use Kconfig choice for low-level debug UART selection
  ARM: realview: use Kconfig choice for debug UART selection
  ARM: plat-samsung: use Kconfig choice for debug UART selection
  ARM: versatile: convert logical CPU numbers to physical numbers
  ARM: ux500: convert logical CPU numbers to physical numbers
  ARM: shmobile: convert logical CPU numbers to physical numbers
  ARM: msm: convert logical CPU numbers to physical numbers
  ARM: exynos4: convert logical CPU numbers to physical numbers

Fix up trivial conflict (config DEBUG_S3C_UART move/split vs addition of
ARM_KPROBES_TEST option) in arch/arm/Kconfig.debug
2011-11-01 20:34:22 -07:00
Russell King
a06f916b7a ARM: smp: fix clipping of number of CPUs
Rather than clipping the number of CPUs using the compile-time NR_CPUS
constant, use the runtime nr_cpu_ids value instead.  This allows the
nr_cpus command line option to work as expected.

Cc: <stable@kernel.org>
Reported-by: Mark Salter <msalter@redhat.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-10-20 22:06:57 +01:00
Will Deacon
1d3cfb34f9 ARM: msm: convert logical CPU numbers to physical numbers
This patch uses the new cpu_logical_map() macro for converting logical
CPU numbers into physical numbers when dealing with the pen_release
variable in the SMP boot and CPU hotplug paths.

Tested-and-acked-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-10-17 10:01:11 +01:00
Linus Torvalds
dd58ecba48 Merge branch 'next/fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc
* 'next/fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (35 commits)
  ARM: msm: platsmp: determine number of CPU cores at boot time
  ARM: Tegra: Seaboard: Fix I2C bus numbering for ADT7461
  ARM: Tegra: Trimslice: Tri-state DAP3 pinmux
  ARM: orion5x: fixup 5181 MPP mask check
  ARM: mxs-dma: include <linux/dmaengine.h>
  ARM: i.MX53: consistently use MX53_UART_PAD_CTRL for uart txd/rxd/rts/cts
  ARM: i.MX53: UARTn_CTS pin should not change RTS input select
  ARM: i.MX53: UARTn_TXD pin should not change RXD input select
  ARM: mx25: Fix typo on CAN1_RX pad setting
  iomux-mx53: add missing 'IOMUX_CONFIG_SION' for some I2C pad definitions
  ARM: NUC93X: add UL suffix to VMALLOC_END to ensure it is properly typed
  ARM: LPC32XXX: add UL suffix to VMALLOC_END to ensure it is properly typed
  ARM: CNS3XXX: add UL suffix to VMALLOC_END to ensure it is properly typed
  ARM: i.MX53: Fix IOMUX type o's
  ARM i.MX dma: Fix burstsize settings
  mach-mx5: fix the I2C clock parents
  ARM: mxs/tx28: according to the TX28's datasheet D4-D7 are not used for MMC0
  ARM i.MX23/28: platform-mxsfb: Add missing include of linux/dma-mapping.h
  ARM: mx53: Fix some interrupts marked as reserved.
  MXC: iomux-v3: correct NO_PAD_CTRL definition
  ...

Fix up trivial conflict in arch/arm/mach-imx/mach-mx31_3ds.c
2011-07-25 11:53:35 -07:00
Jeff Ohlstein
41ff445cdb ARM: msm: platsmp: determine number of CPU cores at boot time
Previously we just assumed there were CONFIG_NR_CPUS cpus present in
the system. Instead, figure out the number of cpus from the MIDR
register.

Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
[arnd: clarified patch title]
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2011-07-21 16:43:03 +02:00
Stephen Boyd
7fa22bd546 ARM: 6993/1: platsmp: Allow secondary cpu hotplug with maxcpus=1
If an ARM system has multiple cpus in the same socket and the
kernel is booted with maxcpus=1, secondary cpus are possible but
not present due to how platform_smp_prepare_cpus() is called.
Since most typical ARM processors don't actually support physical
hotplug, initialize the present map to be equal to the possible
map in generic ARM SMP code. Also, always call
platform_smp_prepare_cpus() as long as max_cpus is non-zero (0
means no SMP) to allow platform code to do any SMP setup.

After applying this patch it's possible to boot an ARM system
with maxcpus=1 on the command line and then hotplug in secondary
cpus via sysfs. This is more in line with how x86 does things.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: David Brown <davidb@codeaurora.org>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-07-07 14:45:07 +01:00
Russell King
0f7b332f97 ARM: consolidate SMP cross call implementation
Rather than having each platform class provide a mach/smp.h header for
smp_cross_call(), arrange for them to register the function with the
core ARM SMP code instead.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-05-23 16:53:17 +01:00
Jeff Ohlstein
e14411da42 msm: add SMP support for msm
Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
2011-01-07 15:54:45 -08:00