Commit Graph

3867 Commits

Author SHA1 Message Date
Alex Deucher
739ffd9b47 drm/amdgpu/gfx9: add support for vega12 firmware
Declare and fetch the appriopriate files.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:36:49 -05:00
Feifei Xu
f06a32e4d2 drm/amdgpu/sdma4: Update vega12 sdma golden setting.
Update vega12 sdma golden setting.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Ken Wang <ken.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:36:49 -05:00
Hawking Zhang
9acdc00c24 drm/amdgpu/sdma4: add sdma4_0_1 support for vega12 (v3)
Add sdma golden setting for vega12.

v2: switch to soc15_program_register_sequence for
golden register programming
v3: squash in unused declaration fix

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:36:48 -05:00
Alex Deucher
900bad3fe9 drm/amdgpu/sdma4: add clockgating support for vega12
Same as vega10 for now.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:36:48 -05:00
Alex Deucher
607c26a0ea drm/amdgpu/sdma4: Add placeholder for vega12 golden settings
Fill these in when we get them.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:36:47 -05:00
Alex Deucher
2e24ada2fc drm/amdgpu/sdma4: specify vega12 firmware
Declare the firmware and fetch the proper file.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:36:47 -05:00
Alex Deucher
f8d27677e1 drm/amdgpu/mmhub: add clockgating support for vega12
Treat it the same as vega10 for now.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:36:47 -05:00
Alex Deucher
273a14cd15 drm/amdgpu/gmc9: add vega12 support (v2)
Same as vega10.

v2: squash in golden regs fix from Feifei

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:36:46 -05:00
Alex Deucher
dca7b4015c drm/amdgpu: add vega12 to dc support check
DC is used for modesetting on vega12.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:24:51 -05:00
Alex Deucher
f79f3fc141 drm/amdgpu/virtual_dce: add vega12 support
Add virtual dce support for vega12.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:24:35 -05:00
Alex Deucher
9aa52bc487 drm/amdgpu: specify vega12 vce firmware
Declare firmware and add support for the file.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:24:30 -05:00
Alex Deucher
2327e6261a drm/amdgpu: specify vega12 uvd firmware
Declare firmware and add support for the file.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:24:24 -05:00
Feifei Xu
6b9c6e1b15 drm/amdgpu: add vega12 ucode loading method
Same as vega10.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
2018-03-21 14:24:18 -05:00
Evan Quan
eddfa8dfad drm/amdgpu: initilize vega12 psp firmwares
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-21 14:24:12 -05:00
Alex Deucher
ff13dc671d drm/amdgpu/psp: initial vega12 support
Same as vega10 for now.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:24:07 -05:00
Hawking Zhang
ad0ad9aa20 drm/amdgpu: vega12 to smu firmware
Add the cgs interface to query the smu firmware for vega12
and declare the firmware.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
2018-03-21 14:24:00 -05:00
Alex Deucher
e48a3cd9cb drm/amdgpu: set asic family and ip blocks for vega12
soc15 just like vega10 and raven.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:23:55 -05:00
Alex Deucher
3f76dcedb3 drm/amdgpu: add gpu_info firmware for vega12
Stores gpu configuration details.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-21 14:23:49 -05:00
Feifei Xu
8fab806ad1 drm/amdgpu: add vega12 to asic_type enum
Add vega12 to amd_asic_type enum and amdgpu_asic_name[].

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
2018-03-21 14:23:39 -05:00
Rex Zhu
eb4900aa4c drm/amdgpu: Fix kernel NULL pointer dereference in dpm functions
caused by
'commit 83e3c4615872 ("drm/amdgpu: Remove wrapper layer of smu ip functions")'

BUG: unable to handle kernel NULL pointer dereference at 00000000000005d8
[  313.241459] IP: ci_dpm_read_sensor+0x37/0xf0 [amdgpu]

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-20 23:44:50 -05:00
Rex Zhu
81ce8bea03 drm/amdgpu: Fix kernel NULL pointer dereference when amdgpu fini
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-20 23:44:21 -05:00
Mikita Lipski
e5b03032e3 drm/amdgpu - Disable all irqs before disabling all CRTCs
By moving amdgpu_irq_disable_all earlier in the sequence
fixes an issue with disabling pflip interrupts:

*ERROR* dal_irq_service_dummy_ack: called for non-implemented irq source

Earlier patch fixed a memory corruption and revealed irq
warnings.This way it seems to be there no obvious issues
with unloading the module.

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-20 23:44:12 -05:00
Mikita Lipski
088e7c1617 drm/amdgpu: Disable irq on device before destroying it
Disable irq on devices before destroying them. That prevents
use-after-free memory access when unloading the driver.

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-20 23:44:03 -05:00
Mikita Lipski
ff97cba8c1 drm/amdgpu: Use atomic function to disable crtcs with dc enabled
This change fixes the deadlock when unloading the driver with displays
connected.

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-20 23:43:42 -05:00
Tom St Denis
864917a3b8 drm/amd/amdgpu: fix offset into page with amdgpu_iomem debugfs file
The offset inside the page wasn't included in the copy call meaning
the start of the page was being read/written instead.

Reported-by: Jay Cornwall <Jay.Cornwall@amd.com>
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-20 23:43:34 -05:00
Hawking Zhang
bd08a8d9e8 drm/amdgpu/nbio6: Correct PCIE_INDEX/DATA pair used for smn register accessing
PCIE_INDEX2/DATA2 pair will be used for smn register accessing since from vega.
PCIE_INDEX/DATA pair should be reserved for smu

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-20 23:43:25 -05:00
Alex Deucher
e3ecdffac9 drm/amdgpu: add documentation for amdgpu_device.c
Add kernel doc for the functions in amdgpu_device.c

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-20 23:43:05 -05:00
Alex Deucher
3ac952b10d drm/amdgpu: add VCN to firmware query interface
Need to be able to query the VCN firmware version from
userspace to determine supported features, etc.

Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-20 23:42:49 -05:00
Rex Zhu
2538090cb6 drm/amd/pp: Delete get_xclk function in powerplay (v2)
use asic's callback function get_xclk in amdgpu

v2: squash in removal of leftover debug info
(drm/amd/pp: Delete debug info in smu7_hwmgr.c) (Rex)

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-19 13:38:31 -05:00
Rex Zhu
699f47951e drm/amdgpu: Delete dead code when early init
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-19 13:34:46 -05:00
Rex Zhu
59156faf81 drm/amd/pp: Remove the cgs wrapper for notify smu version on APU
Refine commit f49e9bac19 ("drm/amd/pp: Get and save Rv smu version")

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-16 16:16:49 -05:00
Andrey Grodzovsky
64350f1b7f drm/amdgpu: Improve documentation of bo_ptr in amdgpu_bo_create_kernel
and amdgpu_bo_create_reserved.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15 14:34:15 -05:00
Rex Zhu
2dac5936e5 drm/amdgpu: Call amdgpu_ucode_fini_bo in amd_powerplay.c
make it symmetric with amdgpu_ucode_init_bo in amd_powerplay.c

refine the "commit b22558bb4ff8fc9fe925222f90297d7a03a5fb20"

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15 09:57:58 -05:00
Rex Zhu
b905090d2b drm/amdgpu: Remove wrapper layer of smu ip functions
1. delete amdgpu_powerplay.c used for wrapping smu ip functions
2. delete struct pp_instance,
3. make struct hwmgr as the smu hw handle.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15 09:57:50 -05:00
Rex Zhu
5b2a3d2c15 drm/amdgpu: Don't compared ip_block_type with ip_block_index
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15 09:57:41 -05:00
Rex Zhu
5771632723 drm/amdgpu: Plus NULL function pointer check
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-15 09:57:32 -05:00
Feifei Xu
2f51d6e8e4 drm/amdgpu/sdma4: Remove unused header file from sdma_v4_0.c
Remove mmhub header files inclusion which not used.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 16:01:19 -05:00
Alex Deucher
fcb7d51571 drm/amdgpu/sdma4: use num_instances for clock/powergating config
Rather then relying on the asic type for the second instance.
Makes it more consistent with the rest of the code.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
2018-03-14 16:01:18 -05:00
Michel Dänzer
daf8809626 drm/amdgpu/dce: Don't turn off DP sink when disconnected
Turning off the sink in this case causes various issues, because
userspace expects it to stay on until it turns it off explicitly.

Instead, turn the sink off and back on when a display is connected
again. This dance seems necessary for link training to work correctly.

Bugzilla: https://bugs.freedesktop.org/105308
Cc: stable@vger.kernel.org
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 16:01:17 -05:00
Alex Deucher
5494d8640f drm/amdgpu: move getting pcie info to common code
No need to replicate it in several places.

Reviewed-by: Rex Zhu <rezhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 16:01:16 -05:00
Alex Deucher
3cdfe70056 drm/amdgpu/soc15: always load the psp module
Regardless of whether the user has selected psp fw loading or
not.  It's still needed for GPU reset among other things.
There are already guards in place to avoid setting up the full
psp if PSP fw loading is not enabled.

Reviewed-by: Rex Zhu <rezhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 16:01:16 -05:00
Alex Deucher
454bbbf915 drm/amdgpu: use adev->firmware to determine whether to load the PSP module
The per device firmware load method is limited to what makes sense for
that asic rather than whatever arbitrary value may have been set by the
user.

Reviewed-by: Rex Zhu <rezhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 16:01:16 -05:00
Alex Deucher
19aede7791 drm/amdgpu: move firmware loading type setup to common code
No need to replicate it in several places.

Reviewed-by: Rex Zhu <rezhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 16:01:15 -05:00
Alex Deucher
a9f3636019 drm/amdgpu/psp: add a few more fw load type checks
We already checked and returned early in most of the IP
functions, fill in the rest as well.

Reviewed-by: Rex Zhu <rezhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 16:01:15 -05:00
Oak Zeng
3760f76cbe drm/amdgpu: Move IH clientid defs to separate file
This is preparation for sharing client ID definitions
between amdgpu and amdkfd

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:16:35 -05:00
Harry Wentland
d179664a2a drm/amdgpu: Remove some unused elements from amdgpu_connector struct
They were used by amdgpu_dm at some point but since it has its own
amdgpu_dm_connector now these aren't needed anymore.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:08:40 -05:00
Alex Deucher
a59b3c80fd drm/amdgpu: save/restore backlight level in legacy dce code
Save/restore the backlight level scratch register in S3/S4 so the
backlight level comes back at the previously requested level.

Bug: https://bugzilla.kernel.org/show_bug.cgi?id=199047
Fixes: 4ec6ecf48c (drm/amdgpu: drop scratch regs save and restore from S3/S4 handling)
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:08:40 -05:00
Christian König
7f8fb91965 drm/amdgpu: fix prime teardown order
We unmapped imported DMA-bufs when the GEM handle was dropped, not when the
hardware was done with the buffere.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
CC: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:08:39 -05:00
Christian König
eab3de23a1 drm/amdgpu: explicit give BO type to amdgpu_bo_create
Drop the "kernel" and sg parameter and give the BO type to create
explicit to amdgpu_bo_create instead of figuring it out from the
parameters.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 15:08:24 -05:00
Christian König
e3364dfc6a drm/amdgpu: initial validate the prime BOs into the CPU domain
Just set the GTT domain as mandatory, so that the BO is validated into
it on first use. This allows us to setup the sg table later on.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-14 14:38:28 -05:00