Commit Graph

3250 Commits

Author SHA1 Message Date
Arnd Bergmann
91d2c740f3 pinctrl: samsung/s3c24xx: add CONFIG_OF dependency
The driver fails to build without CONFIG_OF:

drivers/pinctrl/samsung/pinctrl-samsung.c: In function 'samsung_gpiolib_register':
drivers/pinctrl/samsung/pinctrl-samsung.c:936:5: error: 'struct gpio_chip' has no member named 'of_node'

This configuration is now possible since we can now select the
PINCTRL subsystem on S3C24xx machines other than the device tree
based ones.

Fixes: d219b92461 ("pinctrl: change Kconfig PINCTRL variable to a menuconfig")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-10 11:40:14 +01:00
Linus Walleij
bee67c7c9d Merge branch 'gpio-irqchip-rework' of /home/linus/linux-gpio into devel 2017-11-09 09:38:42 +01:00
Linus Walleij
9e9355bb20 pinctrl: bcm2835: Fix some merge fallout
Fixing a small merge problem in BCM2835 related to the
new irqchip code.

Cc: Thierry Reding <treding@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-09 09:36:07 +01:00
Thierry Reding
dc7b0387ee gpio: Move irq_valid_mask into struct gpio_irq_chip
In order to consolidate the multiple ways to associate an IRQ chip with
a GPIO chip, move more fields into the new struct gpio_irq_chip.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08 14:10:18 +01:00
Thierry Reding
f0fbe7bce7 gpio: Move irqdomain into struct gpio_irq_chip
In order to consolidate the multiple ways to associate an IRQ chip with
a GPIO chip, move more fields into the new struct gpio_irq_chip.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08 14:06:21 +01:00
Linus Walleij
756a024f39 pinctrl: gemini: Fix GMAC groups
The GMII groups need to be split across GMAC0 and GMAC1 since
GMAC0 is always available but GMAC1 masks GPIO2 lines 0-7
so we might want just one interface out.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08 13:53:50 +01:00
Rajendra Nayak
8d6cfb1408 pinctrl: qcom: spmi-gpio: Add pmi8994 gpio support
Update the binding and driver for pmi8994-gpios

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08 13:49:58 +01:00
Colin Ian King
13dc48a883 pinctrl: ti-iodelay: remove redundant unused variable dev
The pointer dev is being assigned but is never used, hence it is
redundant and can be removed. Cleans up clang warnings:

drivers/pinctrl/ti/pinctrl-ti-iodelay.c:582:2: warning: Value stored
to 'dev' is never read
drivers/pinctrl/ti/pinctrl-ti-iodelay.c:701:2: warning: Value stored
to 'dev' is never read

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08 13:49:57 +01:00
Markus Elfring
752caf9aca pinctrl: max77620: Use common error handling code in max77620_pinconf_set()
* Add a jump target so that a specific error message is stored only once
  at the end of this function implementation.

* Replace two calls of the function "dev_err" by goto statements.

* Adjust two condition checks.

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08 13:49:57 +01:00
Linus Walleij
60ad481f74 pinctrl: gemini: Implement clock skew/delay config
This enabled pin config on the Gemini driver and implements
pin skew/delay so that the ethernet pins clocking can be
properly configured.

Acked-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08 13:49:56 +01:00
Linus Walleij
1c5b7f3c34 pinctrl: gemini: Use generic DT parser
We can just use the generic Device Tree parser code
in this driver and save some code.

Acked-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08 13:49:56 +01:00
Linus Walleij
e0e1e39de4 pinctrl: Add skew-delay pin config and bindings
Some pin controllers (such as the Gemini) can control the
expected clock skew and output delay on certain pins with a
sub-nanosecond granularity. This is typically done by shunting
in a number of double inverters in front of or behind the pin.
Make it possible to configure this with a generic binding.

Cc: devicetree@vger.kernel.org
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-08 13:49:45 +01:00
Arnd Bergmann
b53b8300bf pinctrl: armada-37xx: remove unused variable
A cleanup left behind a temporary variable that is now unused:

drivers/pinctrl/mvebu/pinctrl-armada-37xx.c: In function 'armada_37xx_irq_startup':
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c:693:20: error: unused variable 'chip' [-Werror=unused-variable]

This removes the declarations as well.

Fixes: 3ee9e605ca ("pinctrl: armada-37xx: Stop using struct gpio_chip.irq_base")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-11-03 23:19:48 +01:00
Linus Torvalds
ead751507d License cleanup: add SPDX license identifiers to some files
Many source files in the tree are missing licensing information, which
 makes it harder for compliance tools to determine the correct license.
 
 By default all files without license information are under the default
 license of the kernel, which is GPL version 2.
 
 Update the files which contain no license information with the 'GPL-2.0'
 SPDX license identifier.  The SPDX identifier is a legally binding
 shorthand, which can be used instead of the full boiler plate text.
 
 This patch is based on work done by Thomas Gleixner and Kate Stewart and
 Philippe Ombredanne.
 
 How this work was done:
 
 Patches were generated and checked against linux-4.14-rc6 for a subset of
 the use cases:
  - file had no licensing information it it.
  - file was a */uapi/* one with no licensing information in it,
  - file was a */uapi/* one with existing licensing information,
 
 Further patches will be generated in subsequent months to fix up cases
 where non-standard license headers were used, and references to license
 had to be inferred by heuristics based on keywords.
 
 The analysis to determine which SPDX License Identifier to be applied to
 a file was done in a spreadsheet of side by side results from of the
 output of two independent scanners (ScanCode & Windriver) producing SPDX
 tag:value files created by Philippe Ombredanne.  Philippe prepared the
 base worksheet, and did an initial spot review of a few 1000 files.
 
 The 4.13 kernel was the starting point of the analysis with 60,537 files
 assessed.  Kate Stewart did a file by file comparison of the scanner
 results in the spreadsheet to determine which SPDX license identifier(s)
 to be applied to the file. She confirmed any determination that was not
 immediately clear with lawyers working with the Linux Foundation.
 
 Criteria used to select files for SPDX license identifier tagging was:
  - Files considered eligible had to be source code files.
  - Make and config files were included as candidates if they contained >5
    lines of source
  - File already had some variant of a license header in it (even if <5
    lines).
 
 All documentation files were explicitly excluded.
 
 The following heuristics were used to determine which SPDX license
 identifiers to apply.
 
  - when both scanners couldn't find any license traces, file was
    considered to have no license information in it, and the top level
    COPYING file license applied.
 
    For non */uapi/* files that summary was:
 
    SPDX license identifier                            # files
    ---------------------------------------------------|-------
    GPL-2.0                                              11139
 
    and resulted in the first patch in this series.
 
    If that file was a */uapi/* path one, it was "GPL-2.0 WITH
    Linux-syscall-note" otherwise it was "GPL-2.0".  Results of that was:
 
    SPDX license identifier                            # files
    ---------------------------------------------------|-------
    GPL-2.0 WITH Linux-syscall-note                        930
 
    and resulted in the second patch in this series.
 
  - if a file had some form of licensing information in it, and was one
    of the */uapi/* ones, it was denoted with the Linux-syscall-note if
    any GPL family license was found in the file or had no licensing in
    it (per prior point).  Results summary:
 
    SPDX license identifier                            # files
    ---------------------------------------------------|------
    GPL-2.0 WITH Linux-syscall-note                       270
    GPL-2.0+ WITH Linux-syscall-note                      169
    ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause)    21
    ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)    17
    LGPL-2.1+ WITH Linux-syscall-note                      15
    GPL-1.0+ WITH Linux-syscall-note                       14
    ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause)    5
    LGPL-2.0+ WITH Linux-syscall-note                       4
    LGPL-2.1 WITH Linux-syscall-note                        3
    ((GPL-2.0 WITH Linux-syscall-note) OR MIT)              3
    ((GPL-2.0 WITH Linux-syscall-note) AND MIT)             1
 
    and that resulted in the third patch in this series.
 
  - when the two scanners agreed on the detected license(s), that became
    the concluded license(s).
 
  - when there was disagreement between the two scanners (one detected a
    license but the other didn't, or they both detected different
    licenses) a manual inspection of the file occurred.
 
  - In most cases a manual inspection of the information in the file
    resulted in a clear resolution of the license that should apply (and
    which scanner probably needed to revisit its heuristics).
 
  - When it was not immediately clear, the license identifier was
    confirmed with lawyers working with the Linux Foundation.
 
  - If there was any question as to the appropriate license identifier,
    the file was flagged for further research and to be revisited later
    in time.
 
 In total, over 70 hours of logged manual review was done on the
 spreadsheet to determine the SPDX license identifiers to apply to the
 source files by Kate, Philippe, Thomas and, in some cases, confirmation
 by lawyers working with the Linux Foundation.
 
 Kate also obtained a third independent scan of the 4.13 code base from
 FOSSology, and compared selected files where the other two scanners
 disagreed against that SPDX file, to see if there was new insights.  The
 Windriver scanner is based on an older version of FOSSology in part, so
 they are related.
 
 Thomas did random spot checks in about 500 files from the spreadsheets
 for the uapi headers and agreed with SPDX license identifier in the
 files he inspected. For the non-uapi files Thomas did random spot checks
 in about 15000 files.
 
 In initial set of patches against 4.14-rc6, 3 files were found to have
 copy/paste license identifier errors, and have been fixed to reflect the
 correct identifier.
 
 Additionally Philippe spent 10 hours this week doing a detailed manual
 inspection and review of the 12,461 patched files from the initial patch
 version early this week with:
  - a full scancode scan run, collecting the matched texts, detected
    license ids and scores
  - reviewing anything where there was a license detected (about 500+
    files) to ensure that the applied SPDX license was correct
  - reviewing anything where there was no detection but the patch license
    was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
    SPDX license was correct
 
 This produced a worksheet with 20 files needing minor correction.  This
 worksheet was then exported into 3 different .csv files for the
 different types of files to be modified.
 
 These .csv files were then reviewed by Greg.  Thomas wrote a script to
 parse the csv files and add the proper SPDX tag to the file, in the
 format that the file expected.  This script was further refined by Greg
 based on the output to detect more types of files automatically and to
 distinguish between header and source .c files (which need different
 comment types.)  Finally Greg ran the script using the .csv files to
 generate the patches.
 
 Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
 Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
 Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCWfswbQ8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+ykvEwCfXU1MuYFQGgMdDmAZXEc+xFXZvqgAoKEcHDNA
 6dVh26uchcEQLN/XqUDt
 =x306
 -----END PGP SIGNATURE-----

Merge tag 'spdx_identifiers-4.14-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core

Pull initial SPDX identifiers from Greg KH:
 "License cleanup: add SPDX license identifiers to some files

  Many source files in the tree are missing licensing information, which
  makes it harder for compliance tools to determine the correct license.

  By default all files without license information are under the default
  license of the kernel, which is GPL version 2.

  Update the files which contain no license information with the
  'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally
  binding shorthand, which can be used instead of the full boiler plate
  text.

  This patch is based on work done by Thomas Gleixner and Kate Stewart
  and Philippe Ombredanne.

  How this work was done:

  Patches were generated and checked against linux-4.14-rc6 for a subset
  of the use cases:

   - file had no licensing information it it.

   - file was a */uapi/* one with no licensing information in it,

   - file was a */uapi/* one with existing licensing information,

  Further patches will be generated in subsequent months to fix up cases
  where non-standard license headers were used, and references to
  license had to be inferred by heuristics based on keywords.

  The analysis to determine which SPDX License Identifier to be applied
  to a file was done in a spreadsheet of side by side results from of
  the output of two independent scanners (ScanCode & Windriver)
  producing SPDX tag:value files created by Philippe Ombredanne.
  Philippe prepared the base worksheet, and did an initial spot review
  of a few 1000 files.

  The 4.13 kernel was the starting point of the analysis with 60,537
  files assessed. Kate Stewart did a file by file comparison of the
  scanner results in the spreadsheet to determine which SPDX license
  identifier(s) to be applied to the file. She confirmed any
  determination that was not immediately clear with lawyers working with
  the Linux Foundation.

  Criteria used to select files for SPDX license identifier tagging was:

   - Files considered eligible had to be source code files.

   - Make and config files were included as candidates if they contained
     >5 lines of source

   - File already had some variant of a license header in it (even if <5
     lines).

  All documentation files were explicitly excluded.

  The following heuristics were used to determine which SPDX license
  identifiers to apply.

   - when both scanners couldn't find any license traces, file was
     considered to have no license information in it, and the top level
     COPYING file license applied.

     For non */uapi/* files that summary was:

       SPDX license identifier                            # files
       ---------------------------------------------------|-------
       GPL-2.0                                              11139

     and resulted in the first patch in this series.

     If that file was a */uapi/* path one, it was "GPL-2.0 WITH
     Linux-syscall-note" otherwise it was "GPL-2.0". Results of that
     was:

       SPDX license identifier                            # files
       ---------------------------------------------------|-------
       GPL-2.0 WITH Linux-syscall-note                        930

     and resulted in the second patch in this series.

   - if a file had some form of licensing information in it, and was one
     of the */uapi/* ones, it was denoted with the Linux-syscall-note if
     any GPL family license was found in the file or had no licensing in
     it (per prior point). Results summary:

       SPDX license identifier                            # files
       ---------------------------------------------------|------
       GPL-2.0 WITH Linux-syscall-note                       270
       GPL-2.0+ WITH Linux-syscall-note                      169
       ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause)    21
       ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)    17
       LGPL-2.1+ WITH Linux-syscall-note                      15
       GPL-1.0+ WITH Linux-syscall-note                       14
       ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause)    5
       LGPL-2.0+ WITH Linux-syscall-note                       4
       LGPL-2.1 WITH Linux-syscall-note                        3
       ((GPL-2.0 WITH Linux-syscall-note) OR MIT)              3
       ((GPL-2.0 WITH Linux-syscall-note) AND MIT)             1

     and that resulted in the third patch in this series.

   - when the two scanners agreed on the detected license(s), that
     became the concluded license(s).

   - when there was disagreement between the two scanners (one detected
     a license but the other didn't, or they both detected different
     licenses) a manual inspection of the file occurred.

   - In most cases a manual inspection of the information in the file
     resulted in a clear resolution of the license that should apply
     (and which scanner probably needed to revisit its heuristics).

   - When it was not immediately clear, the license identifier was
     confirmed with lawyers working with the Linux Foundation.

   - If there was any question as to the appropriate license identifier,
     the file was flagged for further research and to be revisited later
     in time.

  In total, over 70 hours of logged manual review was done on the
  spreadsheet to determine the SPDX license identifiers to apply to the
  source files by Kate, Philippe, Thomas and, in some cases,
  confirmation by lawyers working with the Linux Foundation.

  Kate also obtained a third independent scan of the 4.13 code base from
  FOSSology, and compared selected files where the other two scanners
  disagreed against that SPDX file, to see if there was new insights.
  The Windriver scanner is based on an older version of FOSSology in
  part, so they are related.

  Thomas did random spot checks in about 500 files from the spreadsheets
  for the uapi headers and agreed with SPDX license identifier in the
  files he inspected. For the non-uapi files Thomas did random spot
  checks in about 15000 files.

  In initial set of patches against 4.14-rc6, 3 files were found to have
  copy/paste license identifier errors, and have been fixed to reflect
  the correct identifier.

  Additionally Philippe spent 10 hours this week doing a detailed manual
  inspection and review of the 12,461 patched files from the initial
  patch version early this week with:

   - a full scancode scan run, collecting the matched texts, detected
     license ids and scores

   - reviewing anything where there was a license detected (about 500+
     files) to ensure that the applied SPDX license was correct

   - reviewing anything where there was no detection but the patch
     license was not GPL-2.0 WITH Linux-syscall-note to ensure that the
     applied SPDX license was correct

  This produced a worksheet with 20 files needing minor correction. This
  worksheet was then exported into 3 different .csv files for the
  different types of files to be modified.

  These .csv files were then reviewed by Greg. Thomas wrote a script to
  parse the csv files and add the proper SPDX tag to the file, in the
  format that the file expected. This script was further refined by Greg
  based on the output to detect more types of files automatically and to
  distinguish between header and source .c files (which need different
  comment types.) Finally Greg ran the script using the .csv files to
  generate the patches.

  Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
  Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
  Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
  Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>"

* tag 'spdx_identifiers-4.14-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core:
  License cleanup: add SPDX license identifier to uapi header files with a license
  License cleanup: add SPDX license identifier to uapi header files with no license
  License cleanup: add SPDX GPL-2.0 license identifier to files with no license
2017-11-02 10:04:46 -07:00
Greg Kroah-Hartman
b24413180f License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.

By default all files without license information are under the default
license of the kernel, which is GPL version 2.

Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier.  The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.

This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.

How this work was done:

Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
 - file had no licensing information it it.
 - file was a */uapi/* one with no licensing information in it,
 - file was a */uapi/* one with existing licensing information,

Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.

The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne.  Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.

The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed.  Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.

Criteria used to select files for SPDX license identifier tagging was:
 - Files considered eligible had to be source code files.
 - Make and config files were included as candidates if they contained >5
   lines of source
 - File already had some variant of a license header in it (even if <5
   lines).

All documentation files were explicitly excluded.

The following heuristics were used to determine which SPDX license
identifiers to apply.

 - when both scanners couldn't find any license traces, file was
   considered to have no license information in it, and the top level
   COPYING file license applied.

   For non */uapi/* files that summary was:

   SPDX license identifier                            # files
   ---------------------------------------------------|-------
   GPL-2.0                                              11139

   and resulted in the first patch in this series.

   If that file was a */uapi/* path one, it was "GPL-2.0 WITH
   Linux-syscall-note" otherwise it was "GPL-2.0".  Results of that was:

   SPDX license identifier                            # files
   ---------------------------------------------------|-------
   GPL-2.0 WITH Linux-syscall-note                        930

   and resulted in the second patch in this series.

 - if a file had some form of licensing information in it, and was one
   of the */uapi/* ones, it was denoted with the Linux-syscall-note if
   any GPL family license was found in the file or had no licensing in
   it (per prior point).  Results summary:

   SPDX license identifier                            # files
   ---------------------------------------------------|------
   GPL-2.0 WITH Linux-syscall-note                       270
   GPL-2.0+ WITH Linux-syscall-note                      169
   ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause)    21
   ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)    17
   LGPL-2.1+ WITH Linux-syscall-note                      15
   GPL-1.0+ WITH Linux-syscall-note                       14
   ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause)    5
   LGPL-2.0+ WITH Linux-syscall-note                       4
   LGPL-2.1 WITH Linux-syscall-note                        3
   ((GPL-2.0 WITH Linux-syscall-note) OR MIT)              3
   ((GPL-2.0 WITH Linux-syscall-note) AND MIT)             1

   and that resulted in the third patch in this series.

 - when the two scanners agreed on the detected license(s), that became
   the concluded license(s).

 - when there was disagreement between the two scanners (one detected a
   license but the other didn't, or they both detected different
   licenses) a manual inspection of the file occurred.

 - In most cases a manual inspection of the information in the file
   resulted in a clear resolution of the license that should apply (and
   which scanner probably needed to revisit its heuristics).

 - When it was not immediately clear, the license identifier was
   confirmed with lawyers working with the Linux Foundation.

 - If there was any question as to the appropriate license identifier,
   the file was flagged for further research and to be revisited later
   in time.

In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.

Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights.  The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.

Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.

In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.

Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
 - a full scancode scan run, collecting the matched texts, detected
   license ids and scores
 - reviewing anything where there was a license detected (about 500+
   files) to ensure that the applied SPDX license was correct
 - reviewing anything where there was no detection but the patch license
   was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
   SPDX license was correct

This produced a worksheet with 20 files needing minor correction.  This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.

These .csv files were then reviewed by Greg.  Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected.  This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.)  Finally Greg ran the script using the .csv files to
generate the patches.

Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-02 11:10:55 +01:00
Ken Ma
30ac0d3b07 pinctrl: armada-37xx: Add edge both type gpio irq support
Current edge both type gpio irqs which need to swap polarity in each
interrupt are not supported, this patch adds edge both type gpio irq
support.

Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-31 13:06:15 +01:00
Masahiro Yamada
0cc449f675 pinctrl: uniphier: remove eMMC hardware reset pin-mux
This is handled by the mmc-pwrseq-emmc driver, which controls
an eMMC hardware reset via a GPIO line.

Remove it from the function pin-mux settings.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-31 10:14:55 +01:00
Heiko Stuebner
4e96fd3042 pinctrl: rockchip: Add iomux-route switching support for rk3288
The rk3288 also has one function that can be routed to one of two pins,
the hdmi cec functionality can use either gpio7c0 or gpio7c7.
So add the route switching support for it.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Hans Verkuil <hans.verkuil@cisco.com>
Reviewed-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-31 10:13:41 +01:00
Mika Westerberg
0f80dbc133 pinctrl: intel: Add Intel Cedar Fork PCH pin controller support
Intel Cedar Fork PCH is the successor of Intel Denverton PCH but it is
based on the newer GPIO/pinctrl hardware block. Add a new pinctrl/GPIO
driver to support it.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-31 10:11:21 +01:00
Mika Westerberg
cf769bd86b pinctrl: intel: Make offset to interrupt status register configurable
Some GPIO blocks have the interrupt status (GPI_IS) offset different
than it normally is, so make it configurable. If no offset is specified
we use the default.

While there remove two unused constants from the core driver.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-31 10:10:24 +01:00
Maxime Ripard
1396007286 pinctrl: sunxi: Enforce the strict mode by default
The strict mode should always have been enabled on our driver, and leaving
it unchecked just makes it harder to find a migration path as time passes.

Let's enable it by default now so that hopefully the new SoCs should be
safe.

Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-31 09:45:19 +01:00
Maxime Ripard
cd70387f89 pinctrl: sunxi: Disable strict mode for old pinctrl drivers
Old pinctrl drivers will need to disable strict mode for various reasons,
among which:
  - Some DT will still have a pinctrl group for each GPIO used, which will
    be rejected by pin_request. While we could remove those nodes, we still
    have to deal with old DTs.
  - Some GPIOs on these boards need to have their pin configuration changed
    (for bias or current), and there's no clear migration path

Let's disable the strict mode on those SoCs so that there's no breakage.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-31 09:45:00 +01:00
Maxime Ripard
aae842a3ff pinctrl: sunxi: Introduce the strict flag
Our pinctrl device should have had strict set all along. However, it wasn't
the case, and most of our old device trees also have a pinctrl group in
addition to the GPIOs properties, which mean that we can't really turn it
on now.

All our new SoCs don't have that group, so we should still enable that mode
on the newer one though.

In order to enable it by default, add a flag that will allow to disable
that mode that should be set by pinctrl drivers that cannot be migrated.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-31 09:43:54 +01:00
Linus Walleij
051e1674a5 pinctrl: sh-pfc: Updates for v4.15 (take two)
- Add Audio, HSCIF, I2C, and INTC-EX pin groups on R-Car H3 ES2.0,
   - Add Audio and PWM pin groups on R-Car D3,
   - Add support for RZ/A1M and RZ/A1L,
   - Add INTC-EX pin groups on R-Car M3-W,
   - Add SDHI voltage switching on RZ/G1E,
   - Make bias control and IOCTRL support more generic,
   - Add suspend/resume support for R-Car Gen3,
   - Small fixes and cleanups.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJZ6cZfAAoJEEgEtLw/Ve77i7gQAJuvBDsBZjx+bVSSPxkkYoDH
 bGhkjYSkaYKj/VaJ9Qx6DBG5aCEybrIPKohVfFMDAyzkyHzNTfRsf2cce409P6Oo
 mzRCIZ93EE9yt49eTZZoHJxLHJcofWvUB97W6XA9Pz4ro3L99TUWNKGVkZG3ZhGE
 a+KeKu23Jk3ujubHKFK3OnuBYEkugJoacWSbpIKI6siaBaHK4/5kEJ3uVoVGwuNK
 Uwwex2GAodbVDI4g+CBRyKQTE3epWkC8VbYmRfIPz3yIpbCqumbt4wYLH7Fh8ae4
 jD/LNDiP91d90CgdWOK6HKzpENUWJRYuis4OPyEwRs6z/YC5DJ0mR8yyHboUZYCd
 rnI6jn99xrZbatne6hNk+3q96Snr1HOB6dbzRfNZxNGqrhS8HtDicBxNelExF3mr
 F0uajUGNzhyK/xbxgKXfdH/YuwksfygX7aSp9bVS1xRYpB7NNcvNhcBXjyIAi7sK
 RssaLL0dwQploWN5eghhrcqmuL8BVRyx1O/brvQeZk166tpfLWfR3UX7ph6DkYSn
 mlUiSs+nbczaHlqYy/HFN2Hsc3Ze54OvE0Yn5eerBiavq80naEMowUb6FS/8AwGN
 03DopyMczUui9KYgAetpocjKkpmVD2sXIv3BiuvD+Hwp5yL4jDDgvd9cRdy8RaAX
 s785sK0VtzAFUQ3U+rSc
 =6Arb
 -----END PGP SIGNATURE-----

Merge tag 'sh-pfc-for-v4.15-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: sh-pfc: Updates for v4.15 (take two)

  - Add Audio, HSCIF, I2C, and INTC-EX pin groups on R-Car H3 ES2.0,
  - Add Audio and PWM pin groups on R-Car D3,
  - Add support for RZ/A1M and RZ/A1L,
  - Add INTC-EX pin groups on R-Car M3-W,
  - Add SDHI voltage switching on RZ/G1E,
  - Make bias control and IOCTRL support more generic,
  - Add suspend/resume support for R-Car Gen3,
  - Small fixes and cleanups.
2017-10-20 15:20:18 +02:00
Geert Uytterhoeven
8843797df3 pinctrl: sh-pfc: Save/restore registers for PSCI system suspend
During PSCI system suspend, R-Car Gen3 SoCs are powered down, and their
pinctrl register state is lost.  Note that as the boot loader skips most
initialization after system resume, pinctrl register state differs from
the state encountered during normal system boot, too.

To fix this, save all GPIO and peripheral function select, module
select, drive strength control, bias, and other I/O control registers
during system suspend, and restore them during system resume.

Note that to avoid overhead on platforms not needing it, the
suspend/resume code has a build time dependency on sleep and PSCI
support, and a runtime dependency on PSCI.

Inspired by a patch in the BSP by Hien Dang.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-20 11:37:43 +02:00
Geert Uytterhoeven
3870a6f6ac pinctrl: sh-pfc: r8a7796: Use generic IOCTRL register description
Move R-Car M3-W I/O voltage support over to the generic way to describe
IOCTRL registers, which will be needed for suspend/resume support.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-20 11:37:38 +02:00
Geert Uytterhoeven
e2aad8464c pinctrl: sh-pfc: r8a7795: Use generic IOCTRL register description
Move R-Car H3 ES2.0 I/O voltage support over to the generic way to
describe IOCTRL registers, which will be needed for suspend/resume
support.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-20 11:37:34 +02:00
Geert Uytterhoeven
5d9d1d1ae5 pinctrl: sh-pfc: r8a7795-es1: Use generic IOCTRL register description
Move R-Car H3 ES1.x I/O voltage support over to the generic way to
describe IOCTRL registers, which will be needed for suspend/resume
support.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-20 11:37:30 +02:00
Geert Uytterhoeven
9e9bd06a35 pinctrl: sh-pfc: Add generic IOCTRL register description
Add a generic way to describe IOCTRL registers (for e.g. SD I/O voltage
and time delay control), like is already done for config, drive, and
bias registers.

This makes the sh-pfc core code aware of these registers, which will
ease introducing suspend/resume support later.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-20 11:37:21 +02:00
Geert Uytterhoeven
1860bb134f pinctrl: sh-pfc: Remove obsolete sh_pfc_pin_to_bias_info()
All users of sh_pfc_pin_to_bias_info() and the related data structures
have been converted to sh_pfc_pin_to_bias_reg(), so those can be
removed.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2017-10-20 11:37:19 +02:00
Geert Uytterhoeven
3f8833ad66 pinctrl: sh-pfc: r8a7778: Use generic bias register description
Move R-Car M1A bias support over to the generic way to describe bias
registers.

As the new description is more compact, this decreases kernel size by
ca. 148 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-20 11:37:14 +02:00
Geert Uytterhoeven
58668a67af pinctrl: sh-pfc: r8a7796: Use generic bias register description
Move R-Car M3-W bias support over to the generic way to describe bias
registers, which will be needed for suspend/resume support.

As the new description is more compact, this decreases kernel size by
ca. 304 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-20 11:37:12 +02:00
Geert Uytterhoeven
6f4b74f375 pinctrl: sh-pfc: r8a7795: Use generic bias register description
Move R-Car H3 ES2.0 bias support over to the generic way to describe
bias registers, which will be needed for suspend/resume support.

As the new description is more compact, this decreases kernel size by
ca. 308 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-20 11:37:09 +02:00
Geert Uytterhoeven
e1a16b5b42 pinctrl: sh-pfc: r8a7795-es1: Use generic bias register description
Move R-Car H3 ES1.x bias support over to the generic way to describe
bias registers, which will be needed for suspend/resume support.

As the new description is more compact, this decreases kernel size by
ca. 304 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2017-10-20 11:37:06 +02:00
Geert Uytterhoeven
acdb124539 pinctrl: sh-pfc: Add sh_pfc_pin_to_bias_reg() helper
Add a helper to look up bias registers and bit number for a specific
pin, using the generic bias register description.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-20 11:37:03 +02:00
Geert Uytterhoeven
beaa34d908 pinctrl: sh-pfc: Add generic bias register description
Add a generic way to describe bias registers (for pull-up/down control),
like is already done for config and drive registers.

This makes the sh-pfc core code aware of these registers, which will
ease introducing suspend/resume support later.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2017-10-20 11:37:00 +02:00
Geert Uytterhoeven
e16a2c7ace pinctrl: sh-pfc: Drop width parameter of sh_pfc_{read,write}_reg()
On modern Renesas SoCs, all PFC registers are 32-bit, and all callers of
sh_pfc_{read,write}_reg() already operate on 32-bit registers only.
Hence make the 32-bit width implicit, and rename the functions to
sh_pfc_{read,write}() to shorten lines.

All accesses to 8-bit or 16-bit registers are still done using
sh_pfc_{read,write}_raw_reg().

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2017-10-20 11:36:56 +02:00
Geert Uytterhoeven
35406b1fd6 pinctrl: sh-pfc: Remove matching on plain sh-pfc platform device
As of commit 8682b3c522 ("sh-pfc: Remove platform device
registration"), plain "sh-pfc" platform devices are no longer created.
Hence remove their match entry, and the now obsolete checks for missing
device IDs and driver data.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2017-10-20 11:36:50 +02:00
Thierry Reding
3ee9e605ca pinctrl: armada-37xx: Stop using struct gpio_chip.irq_base
The Armada 37xx driver always initializes the IRQ base to 0, hence the
subtraction is a no-op. Remove the subtraction and thereby the last user
of struct gpio_chip's .irq_base field.

Note that this was also actually a bug and only worked because of the
above assumption. If the IRQ base had been dynamically allocated, the
subtraction would've caused the wrong mask to be generated since the
struct irq_data.hwirq field is an index local to the IRQ domain. As a
result, it should now be safe to also allocate this chip's IRQ base
dynamically, unless there are consumers left that refer to the IRQs by
their global number.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-19 22:32:41 +02:00
Phil Reid
ff0f2ce71c gpio: mcp23s08: add support for mcp23018
This adds the required definitions for the mcp23018 which is the i2c
variant of the mcp23s18.

Signed-off-by: Phil Reid <preid@electromag.com.au>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-19 10:23:36 +02:00
Dmitry Mastykin
5986170107 pinctrl: mcp23s08: fix interrupt handling regression
interrupt handling was broken with conversion to using regmap caching.
cached_gpio value was updated by boolean status instead of gpio reading.

Fixes: 8f38910ba4 ("pinctrl: mcp23s08: switch to regmap caching")
Tested-by: Phil Reid <preid@electromag.com.au>
Signed-off-by: Dmitry Mastykin <mastichi@gmail.com>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-19 10:20:03 +02:00
Daniel Drake
6afb10267c pinctrl/amd: fix masking of GPIO interrupts
On Asus laptop models X505BA, X505BP, X542BA and X542BP, the i2c-hid
touchpad (using a GPIO for interrupts) becomes unresponsive after a
few minutes of usage, or after placing two fingers on the touchpad,
which seems to have the effect of queuing up a large amount of input
data to be transferred.

When the touchpad is in unresponsive state, we observed that the GPIO
level-triggered interrupt is still at it's active level, however the
pinctrl-amd driver is not receiving/dispatching more interrupts at this
point.

After the initial interrupt arrives, amd_gpio_irq_mask() is called
however we then see amd_gpio_irq_handler() being called repeatedly for
the same irq; the interrupt mask is not taking effect because of the
following sequence of events:
 - amd_gpio_irq_handler fires, reads and caches pin reg
 - amd_gpio_irq_handler calls generic_handle_irq()
 - During IRQ handling, amd_gpio_irq_mask() is called and modifies pin reg
 - amd_gpio_irq_handler clears interrupt by writing cached value

The stale cached value written at the final stage undoes the masking.
Fix this by re-reading the register before clearing the interrupt.

I also spotted that the interrupt-clearing code can race against
amd_gpio_irq_mask() / amd_gpio_irq_unmask(), so add locking there.
Presumably this race was leading to the loss of interrupts.

After these changes, the touchpad appears to be working fine.

Signed-off-by: Daniel Drake <drake@endlessm.com>
Acked-by: Shah, Nehal-bakulchandra <Nehal-Bakulchandra.shah@amd.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-19 10:19:46 +02:00
Linus Walleij
1c363531dd pinctrl: adi2: Fix Kconfig build problem
The build robot is complaining on Blackfin:

drivers/pinctrl/pinctrl-adi2.c: In function 'port_setup':
>> drivers/pinctrl/pinctrl-adi2.c:221:21: error: dereferencing
   pointer to incomplete type 'struct gpio_port_t'
      writew(readw(&regs->port_fer) & ~BIT(offset),
                        ^~
drivers/pinctrl/pinctrl-adi2.c: In function 'adi_gpio_ack_irq':
>> drivers/pinctrl/pinctrl-adi2.c:266:18: error: dereferencing
pointer to incomplete type 'struct bfin_pint_regs'
      if (readl(&regs->invert_set) & pintbit)
                     ^~
It seems the driver need to include <asm/gpio.h> and <asm/irq.h>
to compile.

The Blackfin architecture was re-defining the Kconfig
PINCTRL symbol which is not OK, so replaced this with
PINCTRL_BLACKFIN_ADI2 which selects PINCTRL and PINCTRL_ADI2
just like most arches do.

Further, the old GPIO driver symbol GPIO_ADI was possible to
select at the same time as selecting PINCTRL. This was not
working because the arch-local <asm/gpio.h> header contains
an explicit #ifndef PINCTRL clause making compilation break
if you combine them. The same is true for DEBUG_MMRS.

Make sure the ADI2 pinctrl driver is not selected at the same
time as the old GPIO implementation. (This should be converted
to use gpiolib or pincontrol and move to drivers/...) Also make
sure the old GPIO_ADI driver or DEBUG_MMRS is not selected at
the same time as the new PINCTRL implementation, and only make
PINCTRL_ADI2 selectable for the Blackfin families that actually
have it.

This way it is still possible to add e.g. I2C-based pin
control expanders on the Blackfin.

Cc: Steven Miao <realmz6@gmail.com>
Cc: Huanhuan Feng <huanhuan.feng@analog.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-19 10:10:56 +02:00
Jerome Brunet
ce385aa24a pinctrl: meson: rework pinmux ops
This change prepare the introduction of new meson SoC. This new SoC will
share the same gpio/pinconf registers but the pinmux part will be
different. While the format of the data associated with each pinmux group
will change, the way to handle pinmuxing will be similar.

To deal with this new situation, the meson_pmx_struture is kept but the
data associated to it is now generic. This allows to reuse the basic
functions which would otherwise be copy/pasted in each pinmux driver
(such as getting the name a count of groups and functions) Only the
functions actually using this specific data is taken out of the common
code and is handling the SoC pinmuxing

Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-16 23:14:10 +02:00
Jerome Brunet
277d14eb81 pinctrl: meson: separate soc drivers
When meson pinctrl is enabled, all meson platforms pinctrl drivers are
built in the kernel, with a significant amount of data.

This leads to situation where pinctrl drivers targeting an architecture
are also compiled and shipped on another one (ex: meson8 - ARM - compiled
and shipped on ARM64 builds). This is a waste of memory we can easily
avoid.

This change makes 4 pinctrl drivers (1 per SoC) out the original single
driver, allowing to compile and ship only the ones required.

Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-16 23:14:10 +02:00
Biju Das
df73da6317 pinctrl: sh-pfc: r8a7745: Implement voltage switching for SDHI
Voltage switching is the same as on the r8a7794.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-16 16:37:10 +02:00
Geert Uytterhoeven
d8ee17f4f2 pinctrl: sh-pfc: r8a77995: Remove USB0_IDIN and USB0_IDPU pins
R-Car Gen3 Hardware Manual Errata for Rev 0.55 of September 8, 2017
removed the USB0_IDIN and USB0_IDPU pins on R-Car D3.

This change has no functional impact, as these definitions were unused.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-16 16:19:23 +02:00
Linus Walleij
89aab2d6a7 pinctrl: gemini: Add missing functions
Some two functions were missing from the Gemini pin control
driver. Noticed when trying to use ethernet. Fix it up by
adding them.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-14 20:37:33 +02:00
Linus Walleij
e2a021d449 pinctrl: Do not depend in GPIOLIB, select it
Instead of depends on GPIOLIB and having to run around in
Kconfig menus looking for why your device is not available,
simply select it from the pin control drivers that need it.

The Kconfig for GPIOLIB is improved, selectable and this
should "just work".

Cc: Phil Reid <preid@electromag.com.au>
Cc: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Cc: Peter Rosin <peda@axentia.se>
Cc: Andrey Smirnov <andrew.smirnov@gmail.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-12 09:15:33 +02:00
Kuninori Morimoto
7b9e64a657 pinctrl: sh-pfc: r8a77995: Add Audio SSI pin support
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-11 11:34:03 +02:00
Kuninori Morimoto
6e7b1ee885 pinctrl: sh-pfc: r8a77995: Add Audio clock pin support
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-11 11:34:03 +02:00
Wolfram Sang
94888a4dc3 pinctrl: sh-pfc: r8a7796: Fix trivial typo in comment
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-11 11:34:02 +02:00
Wolfram Sang
bf3278feae pinctrl: sh-pfc: r8a7795-es1: Fix trivial typo in comment
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-11 11:34:02 +02:00
Wolfram Sang
ecd54509a2 pinctrl: sh-pfc: r8a7795: Fix trivial typo in comment
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-11 11:34:01 +02:00
Wolfram Sang
7a362e3488 pinctrl: sh-pfc: r8a7795: Add HSCIF pins, groups, and functions
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-11 11:34:01 +02:00
Takeshi Kihara
b014912f6c pinctrl: sh-pfc: r8a7796: Add support for INTC-EX IRQ pins
Most pins on the r8a7796 SoC can be configured in GPIO mode for
interrupt and GPIO functionality, while a couple of them can also
be routed to the INTC-EX hardware block (formerly known as IRQC).

On r8a7795 the INTC-EX hardware handles pins IRQ0 -> IRQ5 and
this patch adds support for them to the PFC driver as "intc_ex_irqN".

[takeshi.kihara.df: Ported from commit bb46f6f3f3 ("pinctrl: sh-pfc:
 r8a7795: Add support for INTC-EX IRQ pins")
 to drivers/pinctrl/sh-pfc/pfc-r8a7796.c]
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-11 11:34:00 +02:00
Geert Uytterhoeven
8480e6ca80 pinctrl: sh-pfc: r8a7795: Add INTC-EX pins, groups and function
Add pins, groups, and a function for the INTC-EX interrupt controller on
R-Car H3 ES2.0.

Extracted from a big patch in the BSP by Takeshi Kihara.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-11 11:33:59 +02:00
Fenglin Wu
6cb74f4443 pinctrl: qcom: spmi-gpio: Update GPIO EN_CTL when setting pin config
GPIO is expected to be disabled iff PIN_CONFIG_BIAS_HIGH_IMPEDANCE is
configured. Update is_enabled flag in config_set() so that it can
reflect GPIO status correctly. Also modify EN_CTL register based on
is_enabled flag in config_set() to configure the GPIO properly.

Signed-off-by: Fenglin Wu <fenglinw@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-11 10:23:35 +02:00
Phil Reid
2a7893c8b5 pinctrl: mcp23s08: remove unused variables from pinconf_set
Variable mask and val are not used in the mcp_pinconf_set().

Signed-off-by: Phil Reid <preid@electromag.com.au>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-11 10:18:39 +02:00
Phil Reid
d219b92461 pinctrl: change Kconfig PINCTRL variable to a menuconfig
This allows PINCTRL to be selected manually to allow enabling of the
mcp23s08 i2c/spi gpio driver. Which is not platform specific.

Signed-off-by: Phil Reid <preid@electromag.com.au>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-11 09:58:03 +02:00
Jerome Brunet
6affd6981c pinctrl: meson: remove unused pin_base
While removing the need to have pin_base defined in meson pinctrl
drivers, I forgot to remove the corresponding field from the
pinctrl_data structure.

Fixing this now.

Fixes: 70e5ecb1b9 ("pinctrl: meson: get rid of pin_base")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-11 09:54:14 +02:00
Jerome Brunet
d51b989b2b pinctrl: meson-gx: add TEST_N i2s pinmux
Add TEST_N pinmux for channel 6 and 7 of the i2s output

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-11 09:53:00 +02:00
Colin Ian King
1356d86ff1 pinctrl: sx150x: make struct sx150x_regmap_config static
The structure sx150x_regmap_config is local to the source and does not
need to be in global scope, so make it static.

Cleans up sparse warning:
symbol 'sx150x_regmap_config' was not declared. Should it be static?

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-09 23:02:36 +02:00
Colin Ian King
161ef8b34d pinctrl: ingenic: make function ingenic_pinctrl_probe static
The function ingenic_pinctrl_probe is local to the source and does
not need to be in global scope, so make it static.

Cleans up sparse warnings
symbol 'ingenic_pinctrl_probe' was not declared. Should it be static?

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-09 23:01:48 +02:00
Chris Brandt
039bc58e73 pinctrl: rza1: Add support for RZ/A1L
Aspects like the number of ports and the location where peripherals are
brought out differ between the RZ/A1H and RZ/A1L.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-09 09:16:21 +02:00
Grygorii Strashko
845e405e5e pinctrl: cherryview: fix issues caused by dynamic gpio irqs mapping
New GPIO IRQs are allocated and mapped dynamically by default when
GPIO IRQ infrastructure is used by cherryview-pinctrl driver.
This causes issues on some Intel platforms [1][2] with broken BIOS which
hardcodes Linux IRQ numbers in their ACPI tables.

On such platforms cherryview-pinctrl driver should allocate and map all
GPIO IRQs at probe time.
Side effect - "Cannot allocate irq_descs @ IRQ%d, assuming pre-allocated\n"
can be seen at boot log.

NOTE. It still may fail if boot sequence will changed and some interrupt
controller will be probed before cherryview-pinctrl which will shift Linux IRQ
numbering (expected with CONFIG_SPARCE_IRQ enabled).

[1] https://bugzilla.kernel.org/show_bug.cgi?id=194945
[2] https://lkml.org/lkml/2017/9/28/153
Cc: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: Chris Gorman <chrisjohgorman@gmail.com>
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reported-by: Chris Gorman <chrisjohgorman@gmail.com>
Reported-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Tested-by: Chris Gorman <chrisjohgorman@gmail.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-08 02:32:59 +02:00
Linus Walleij
d4648c1566 pinctrl: sh-pfc: Updates for v4.15
- Add SDHI and DRIF pin groups on R-Car H3 ES2.0,
   - Add USB3.0 host pin groups on R-Car H3 (ES1.x and ES2.0),
   - Add EthernetAVB and USB2.0 host pin groups on R-Car D3.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJZ1KtpAAoJEEgEtLw/Ve77nH0QAIRZVIl52lBoAFhnr+7DH5Fg
 uqnUhIMNRGP4KrgG9kAh+j3lq8PyvPSv6ASxeH40d1SVNUcNpLdnyGCJPevhp1qh
 H0rT78xd2p7bsmz/FhRM5OyM3ZArn/JgAa3c3sbyfVt68Xk6GcBP7oz+xd34kWKD
 edpnzBPH6EYqmG3F6s6mzEcUL19TdwFe/x07NaKh3zq8LWn3VjWr0DRPk7bTvGt7
 hNIvP0hw2SLptN4TIDBFDjtwVAU3bV96mRcZnGGg9xt6wxelUzWShyftIan69joB
 I16U9IfvWrO0u5C1L3oAHsAgIEoLrweW6AUEJbWwiEfaZ0xs1WcknEPvsoneQiUN
 XxAdN/FG5pLzngwqLW/OjhtGHc3LWB9/W0BtD1w98a/iJyppk6MF6WzQX+xwlJ/R
 iuZALbmyInquRuvn0cnIp3F8waeXsn8l9glPleH6kQqgn6eC4oV0ac6f51RUVNi0
 KXiqGNPL54f2UF69Y8C6EpalnYBfDyGMJqSvJlJGvBt5MfyOLJSlCvTgfh05KrA5
 wt7Z71AiAsrjztSgV6LThW7MOQ/HkxxYZz3rmaKAD/1zEo5b8vT/tkxaUXwSrcgX
 t37yg9BMxaFYOGfcb/+gYe2Zz1uIhNeReOvUSlr8xDCiUHQWrIj+4q8q4w8dqr4o
 1sKiBpQcuM1xT3Bc0dyZ
 =C/IT
 -----END PGP SIGNATURE-----

Merge tag 'sh-pfc-for-v4.15-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: sh-pfc: Updates for v4.15

  - Add SDHI and DRIF pin groups on R-Car H3 ES2.0,
  - Add USB3.0 host pin groups on R-Car H3 (ES1.x and ES2.0),
  - Add EthernetAVB and USB2.0 host pin groups on R-Car D3.
2017-10-07 13:12:50 +02:00
David Wu
a976d7b135 pinctrl: rockchip: rk3328: Fix the correct routing config
If the gmac-m1 optimization(bit10) is selected, the gpio function
of gmac pins is not valid. We may use the rmii mode for gmac interface,
the pins such as rx_d2, rx_d3, which the rgmii mode used, but rmii not
used could be taken as gpio function. So gmac_rxd0m1 selects the bit2,
and gmac_rxd0m3 select bit10 is more correct.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-07 12:31:39 +02:00
David Wu
c437f65c42 pinctrl: rockchip: Fix the rk3399 gpio0 and gpio1 banks' drv_offset at pmu grf
The offset of gpio0 and gpio1 bank drive strength is 0x8, not 0x4.
But the mux is 0x4, we couldn't use the IOMUX_WIDTH_4BIT flag, so
we give them actual offset.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-07 12:30:16 +02:00
Linus Walleij
2dca9227d3 Merge branch 'pinconf-rename' into devel 2017-10-07 12:29:14 +02:00
Linus Walleij
40833a84fa pinctrl: meson: Use library functions
These request/free functions are just reimplementations of the
standard helpers in gpiolib. Delete them and replace with the
helpers.

Cc: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-07 00:00:19 +02:00
Linus Walleij
92ddf5ff97 pinctrl: bcm: nsp: Use library functions
These request/free functions are just reimplementations of the
standard helpers in gpiolib. Delete them and replace with the
helpers.

Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-07 00:00:13 +02:00
Jerome Brunet
027c87fe69 pinctrl: meson-gxbb: add missing GPIOX_22 pin
GPIOX_22 is declared as a gpio but the id is no present in the pin
table. This hole trigger an error while reading the pingroup debugfs entry

GPIOX_22 is no routed externally. For all we know, it could an internal
pin of SoC

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-05 23:11:02 +02:00
Jerome Brunet
e891a5a401 pinctrl: meson-gx: TEST_N belongs to the AO controller
On meson-gx platforms, TEST_N has been incorrectly declared in the EE
controller while it belongs to AO controller.

Move the pin to the appropriate controller

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-05 23:11:02 +02:00
Jerome Brunet
70e5ecb1b9 pinctrl: meson: get rid of pin_base
pin_base was used with the manually set pin offset in meson pinctrl. This
is no longer the case, pin_base is 0 on every meson pinctrl controllers
and should go away.

Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-05 23:11:01 +02:00
Jerome Brunet
634e40b0c2 pinctrl: meson: remove offset from pinctrl
Offset on meson pinctrl and gpios is something that was carried from the
vendor driver, where there is a weird link between the 2
controllers. Since these 2 controllers are independent, this offset adds
an unnecessary complexity.

This patch remove this manually set offset and rely on pinctrl to figure
out the gpio base offset

Tested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-10-05 23:10:49 +02:00
Geert Uytterhoeven
b4062b46da pinctrl: sh-pfc: r8a7795: Restore sort order
Move the SCIF_CLK pins where they belong.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-05 12:14:00 +02:00
Geert Uytterhoeven
abc053c869 pinctrl: sh-pfc: r8a7795-es1: Restore sort order
Move the USB30 pins where they belong.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-05 12:13:25 +02:00
Wolfram Sang
f62d4c9efd pinctrl: sh-pfc: r8a7795: Add I2C pin support
Since pinmuxing for I2C is equal on H3 ES1.0 and later versions, copy
the I2C settings from ES1.0. Fixes this error in upstream for
Salvator-XS:

sh-pfc e6060000.pin-controller: function 'i2c2' not supported
sh-pfc e6060000.pin-controller: invalid function i2c2 in map table
i2c-rcar: probe of e6510000.i2c failed with error -22

Now, the bus works the same as with other Salvator boards.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-04 17:57:52 +02:00
Takeshi Kihara
47bb129679 pinctrl: sh-pfc: r8a77995: Add PWM pins, groups and functions
This patch adds support for PWM on r8a77995.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-04 16:04:38 +02:00
Kuninori Morimoto
0526234d67 pinctrl: sh-pfc: r8a7795: Add Audio SSI pin support
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-04 15:35:59 +02:00
Kuninori Morimoto
55bfea9fdc pinctrl: sh-pfc: r8a7795: Add Audio clock pin support
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-04 15:22:15 +02:00
Takeshi Kihara
5ec8a41a36 pinctrl: sh-pfc: r8a7795: Add USB3.0 host support
This patch adds USB3.0 ch0 pinmux support to R8A7795 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-02 13:23:44 +02:00
Takeshi Kihara
3627126ce3 pinctrl: sh-pfc: r8a7795-es1: Add USB3.0 host support
This patch adds USB3{0,1} (USB3.0 host) pinmux support to R8A7795 ES1.x
SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-10-02 13:23:39 +02:00
Petr Mladek
83b31c2a5f pinctrl/amd: Fix build dependency on pinmux code
The commit 79d2c8bede ("pinctrl/amd: save pin registers over
suspend/resume") caused the following compilation errors:

drivers/pinctrl/pinctrl-amd.c: In function ‘amd_gpio_should_save’:
drivers/pinctrl/pinctrl-amd.c:741:8: error: ‘const struct pin_desc’ has no member named ‘mux_owner’
  if (pd->mux_owner || pd->gpio_owner ||
        ^
drivers/pinctrl/pinctrl-amd.c:741:25: error: ‘const struct pin_desc’ has no member named ‘gpio_owner’
  if (pd->mux_owner || pd->gpio_owner ||

We need to enable CONFIG_PINMUX for this driver as well.

Cc: stable@vger.kernel.org
Fixes: 79d2c8bede ("pinctrl/amd: save pin registers over suspend/resume")
Signed-off-by: Petr Mladek <pmladek@suse.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-09-27 15:50:11 +02:00
Chris Gorman
505485a83c pinctrl: cherryview fixed typo in comment
Fixed typo on comment for north_community.

Signed-off-by: Chris Gorman <chrisjohgorman@gmail.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-09-27 15:30:36 +02:00
Thomas Gleixner
7249164346 genirq/irqdomain: Update irq_domain_ops.activate() signature
The irq_domain_ops.activate() callback has no return value and no way to
tell the function that the activation is early.

The upcoming changes to support a reservation scheme which allows to assign
interrupt vectors on x86 only when the interrupt is actually requested
requires:

  - A return value, so activation can fail at request_irq() time
  
  - Information that the activate invocation is early, i.e. before
    request_irq().

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Juergen Gross <jgross@suse.com>
Tested-by: Yu Chen <yu.c.chen@intel.com>
Acked-by: Juergen Gross <jgross@suse.com>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Alok Kataria <akataria@vmware.com>
Cc: Joerg Roedel <joro@8bytes.org>
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Christoph Hellwig <hch@lst.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Rui Zhang <rui.zhang@intel.com>
Cc: "K. Y. Srinivasan" <kys@microsoft.com>
Cc: Arjan van de Ven <arjan@linux.intel.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Len Brown <lenb@kernel.org>
Link: https://lkml.kernel.org/r/20170913213152.848490816@linutronix.de
2017-09-25 20:38:24 +02:00
Linus Walleij
a9a1d2a782 pinctrl/gpio: Unify namespace for cross-calls
The pinctrl_request_gpio() and pinctrl_free_gpio() break the nice
namespacing in the other cross-calls like pinctrl_gpio_foo().
Just rename them and all references so we have one namespace
with all cross-calls under pinctrl_gpio_*().

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-09-22 11:02:10 +02:00
Jerome Brunet
1ffbf50b74 pinctrl: meson: fix incorrect usage of ENOSYS
ENOSYS is special and should only be used for incorrect syscall number.
It is not the case here. let's use ENOTSUPP instead.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-09-21 14:18:12 +02:00
Corentin Labbe
c84284e59d pinctrl: bcm2835: fix build warning in bcm2835_gpio_irq_handle_bank
This patch fix the following build warning:
drivers/pinctrl/bcm/pinctrl-bcm2835.c:376:15: warning: variable 'type' set but not used [-Wunused-but-set-variable]

Furthermore, it is unused for a long time, at least since commit 85ae9e512f ("pinctrl: bcm2835: switch to GPIOLIB_IRQCHIP")
where a "FIXME no clue why the code looks up the type here" was added.
A year after, nobody answeered this question, so its time to remove it.

Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-09-21 14:11:10 +02:00
Colin Ian King
b582658ae0 pinctrl: single: make two arrays static const, reduces object code size
Don't populate the read-only arrays prop2 and prop4 on the stack, instead
make them static const.  Makes the object code smaller by over 230 bytes:

Before:
   text	   data	    bss	    dec	    hex	filename
  28235	   5820	    192	  34247	   85c7	drivers/pinctrl/pinctrl-single.o

After:
   text	   data	    bss	    dec	    hex	filename
  27839	   5980	    192	  34011	   84db	drivers/pinctrl/pinctrl-single.o

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-09-21 14:09:49 +02:00
Colin Ian King
2d71dfa2d9 pinctrl/amd: make functions amd_gpio_suspend and amd_gpio_resume static
The functions amd_gpio_suspend and amd_gpio_resume are local to the
source and do not need to be in global scope, so make them static.

Cleans up sparse warnings:
symbol 'amd_gpio_suspend' was not declared. Should it be static?
symbol 'amd_gpio_resume' was not declared. Should it be static?

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Reviewed-by: Daniel Drake <drake@endlessm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-09-21 13:36:39 +02:00
Takeshi Kihara
f814def530 pinctrl: sh-pfc: r8a77995: Add USB2.0 host support
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-09-19 16:14:44 +02:00
Yoshihiro Shimoda
66abd968d0 pinctrl: sh-pfc: r8a77995: Add EthernetAVB pins, groups and functions
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-09-19 16:08:40 +02:00
Dirk Behme
641b0ab802 pinctrl: sh-pfc: r8a7795: Re-add DRIF support
DRIF support for r8a7795 was initially added with commit 2d77583198
("pinctrl: sh-pfc: r8a7795: Add DRIF support") and later dropped from
the new pfc-r8a7795.c while re-naming the initial pfc-r8a7795.c to
pfc-r8a7795-es1.c in commit b205914c8f ("pinctrl: sh-pfc: r8a7795:
Add support for R-Car H3 ES2.0"). As the DRIF doesn't differ, re-add
it here.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-09-19 11:06:13 +02:00
Takeshi Kihara
9ed1395869 pinctrl: sh-pfc: r8a7795: Add SDHI0-3 support
Add SDHI0-3 support for R-Car H3 ES2.0 based on a patch from the Renesas
BSP. SDHI pin config is identical to H3 ES1.*.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-09-19 11:06:13 +02:00
Colin Ian King
12b136dec2 pinctrl: uniphier: make arrays static, reduces object code size
Don't populate const arrays on the stack, instead make them
static.  Makes the object code smaller nearly 1000 bytes. Also
line break wide lines to avoid checkpatch warnings.

Before:
   text	   data	    bss	    dec	    hex	filename
  13112	   1996	      0	  15108	   3b04	pinctrl-uniphier-core.o

After:
   text	   data	    bss	    dec	    hex	filename
  11642	   2476	      0	  14118	   3726	pinctrl-uniphier-core.o

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-09-19 09:41:33 +02:00
Daniel Drake
79d2c8bede pinctrl/amd: save pin registers over suspend/resume
The touchpad in the Asus laptop models X505BA/BP and X542BA/BP is
unresponsive after suspend/resume. The following error appears during
resume:

  i2c_hid i2c-ELAN1300:00: failed to reset device.

The problem here is that i2c_hid does not notice the interrupt being
generated at this point, because the GPIO is no longer configured
for interrupts.

Fix this by saving pinctrl-amd pin registers during suspend and
restoring them at resume time.

Based on code from pinctrl-intel.

Cc: stable@vger.kernel.org
Signed-off-by: Daniel Drake <drake@endlessm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-09-12 15:58:45 +02:00
Gregory CLEMENT
a9a1a48336 pinctrl: armada-37xx: Fix gpio interrupt setup
Since commit dc749a09ea ("gpiolib: allow gpio irqchip to map irqs
dynamically"), the irqs for gpio are not statically allocated during in
gpiochip_irqchip_add.

This driver was based on this assumption for initializing the mask
associated to each interrupt this led to a NULL pointer crash in the
kernel:

Unable to handle kernel NULL pointer dereference at virtual address 00000000
Mem abort info:
  Exception class = DABT (current EL), IL = 32 bits
  SET = 0, FnV = 0
  EA = 0, S1PTW = 0
Data abort info:
  ISV = 0, ISS = 0x00000068
  CM = 0, WnR = 1
[0000000000000000] user address but active_mm is swapper
Internal error: Oops: 96000044 [#1] PREEMPT SMP
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.13.0-06657-g3b9f8ed25dbe #576
Hardware name: Marvell Armada 3720 Development Board DB-88F3720-DDR3 (DT)
task: ffff80001d908000 task.stack: ffff000008068000
PC is at armada_37xx_pinctrl_probe+0x5f8/0x670
LR is at armada_37xx_pinctrl_probe+0x5e8/0x670
pc : [<ffff000008e25cdc>] lr : [<ffff000008e25ccc>] pstate: 60000045
sp : ffff00000806bb80
x29: ffff00000806bb80 x28: 0000000000000024
x27: 000000000000000c x26: 0000000000000001
x25: ffff80001efee760 x24: 0000000000000000
x23: ffff80001db6f570 x22: ffff80001db6f438
x21: 0000000000000000 x20: ffff80001d9f4810
x19: ffff80001db6f418 x18: 0000000000000000
x17: 0000000000000001 x16: 0000000000000019
x15: ffffffffffffffff x14: 0140000000000000
x13: 0000000000000000 x12: 0000000000000030
x11: 0101010101010101 x10: 0000000000000040
x9 : ffff000009923580 x8 : ffff80001d400248
x7 : ffff80001d400270 x6 : 0000000000000000
x5 : ffff80001d400248 x4 : ffff80001d400270
x3 : 0000000000000000 x2 : 0000000000000001
x1 : 0000000000000001 x0 : 0000000000000000
Process swapper/0 (pid: 1, stack limit = 0xffff000008068000)
Call trace:
Exception stack(0xffff00000806ba40 to 0xffff00000806bb80)
ba40: 0000000000000000 0000000000000001 0000000000000001 0000000000000000
ba60: ffff80001d400270 ffff80001d400248 0000000000000000 ffff80001d400270
ba80: ffff80001d400248 ffff000009923580 0000000000000040 0101010101010101
baa0: 0000000000000030 0000000000000000 0140000000000000 ffffffffffffffff
bac0: 0000000000000019 0000000000000001 0000000000000000 ffff80001db6f418
bae0: ffff80001d9f4810 0000000000000000 ffff80001db6f438 ffff80001db6f570
bb00: 0000000000000000 ffff80001efee760 0000000000000001 000000000000000c
bb20: 0000000000000024 ffff00000806bb80 ffff000008e25ccc ffff00000806bb80
bb40: ffff000008e25cdc 0000000060000045 ffff00000806bb60 ffff0000081189b8
bb60: ffffffffffffffff ffff00000811cf1c ffff00000806bb80 ffff000008e25cdc
[<ffff000008e25cdc>] armada_37xx_pinctrl_probe+0x5f8/0x670
[<ffff00000859d8c8>] platform_drv_probe+0x58/0xb8
[<ffff00000859bb44>] driver_probe_device+0x22c/0x2d8
[<ffff00000859bcac>] __driver_attach+0xbc/0xc0
[<ffff000008599c84>] bus_for_each_dev+0x4c/0x98
[<ffff00000859b440>] driver_attach+0x20/0x28
[<ffff00000859af90>] bus_add_driver+0x1b8/0x228
[<ffff00000859c648>] driver_register+0x60/0xf8
[<ffff00000859df64>] __platform_driver_probe+0x74/0x130
[<ffff000008e256dc>] armada_37xx_pinctrl_driver_init+0x20/0x28
[<ffff000008083980>] do_one_initcall+0x38/0x128
[<ffff000008e00cf4>] kernel_init_freeable+0x188/0x22c
[<ffff0000089b56e8>] kernel_init+0x10/0x100
[<ffff000008084bb0>] ret_from_fork+0x10/0x18
Code: f9403fa2 12001341 1100075a 9ac12041 (b9000001)
---[ end trace 8b0f4e05e1603208 ]---

This patch moves the initialization of the mask field in the irq_startup
function. However some callbacks such as irq_set_type and irq_set_wake
could be called before irq_startup. For those functions the mask is
computed at each call which is not a issue as these functions are not
located in a hot path but are used sporadically for configuration.

Fixes: dc749a09ea ("gpiolib: allow gpio irqchip to map irqs
dynamically")
Cc: <stable@vger.kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-09-12 11:29:44 +02:00
Dan Carpenter
4ce504c4eb pinctrl: sprd: fix off by one bugs
info->groups[] has info->ngroups elements so these comparisons should be
>= instead of >.

Fixes: 41d32cfce1 ("pinctrl: sprd: Add Spreadtrum pin control driver")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Baolin Wang <baolin.wang@spreadtrum.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-09-12 11:27:36 +02:00