Commit Graph

38 Commits

Author SHA1 Message Date
Michal Simek
954e8b9599 microblaze: Fix sparse warnings - cache.c
Warning log:
CHECK   arch/microblaze/kernel/cpu/cache.c
arch/microblaze/kernel/cpu/cache.c:522:21: warning: symbol 'wb_msr' was not declared. Should it be static?
arch/microblaze/kernel/cpu/cache.c:538:21: warning: symbol 'wb_nomsr' was not declared. Should it be static?
arch/microblaze/kernel/cpu/cache.c:554:21: warning: symbol 'wt_msr' was not declared. Should it be static?
arch/microblaze/kernel/cpu/cache.c:569:21: warning: symbol 'wt_nomsr' was not declared. Should it be static?
arch/microblaze/kernel/cpu/cache.c:585:21: warning: symbol 'wt_msr_noirq' was not declared. Should it be static?
arch/microblaze/kernel/cpu/cache.c:600:21: warning: symbol 'wt_nomsr_noirq' was not declared. Should it be static?

Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-03-09 08:09:58 +01:00
Michal Simek
a9dbe5eb1f microblaze: Add PVR for Microblaze v8.10.a
Microblaze v8.10.a has 0x14 version string.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-03-09 08:09:55 +01:00
Michal Simek
b9dc9e7781 microblaze: Label MB 7.20.d as broken with WB cache
MB version 7.20.d contains fault which is related with WB that's why
error message will be shown.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-03-09 08:09:55 +01:00
Michal Simek
1649700408 microblaze: Fix asm compilation warning
Microblaze ASM doesn't support hex values for mfs instructions.

/tmp/ccwiXVmt.s: Assembler messages:
/tmp/ccwiXVmt.s:19: Warning: ignoring operands: x00

Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-02-07 19:12:17 +01:00
Michal Simek
a3c26959cc microblaze: Add PVR for Microblaze v8.00.b
Microblaze v8.00.b have 0x13 version string.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-01-03 10:08:16 +01:00
Michal Simek
8e2ad016b2 microblaze: Add PVR for endians plus detection
Upcomming microblaze version will support little-endian.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
2010-10-21 15:51:57 +10:00
Michal Simek
a7d8355008 microblaze: Remove hardcoded asm instraction for PVR loading
It comes from past where pvr wasn't supported in msr instruction.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-10-21 15:51:46 +10:00
Michal Simek
f66efecad0 microblaze: Add new microblaze versions
PVR for 7.30.b, 8.00.a versions.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-10-21 15:51:35 +10:00
Steven J. Magnani
ba9c4f88d7 microblaze: Allow PAGE_SIZE configuration
Allow developer to configure memory page size at compile time.
Larger pages can improve performance on some workloads.

Based on PowerPC code.

Signed-off-by: Steven J. Magnani <steve@digidescorp.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-08-04 10:22:34 +02:00
Michal Simek
ddfbc935ea microblaze: Remove compilation warnings in cache macro
CC      arch/microblaze/kernel/cpu/cache.o
arch/microblaze/kernel/cpu/cache.c: In function '__invalidate_dcache_range_wb':
arch/microblaze/kernel/cpu/cache.c:398: warning: ISO C90 forbids mixed declarations and code
arch/microblaze/kernel/cpu/cache.c: In function '__flush_dcache_range_wb':
arch/microblaze/kernel/cpu/cache.c:509: warning: ISO C90 forbids mixed declara

Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-05-13 10:55:47 +02:00
Michal Simek
3274c5707c microblaze: Optimize CACHE_LOOP_LIMITS and CACHE_RANGE_LOOP macros
1. Remove CACHE_ALL_LOOP2 macro because it is identical to CACHE_ALL_LOOP
2. Change BUG_ON to WARN_ON
3. Remove end aligned from CACHE_LOOP_LIMITS.
C implementation do not need aligned end address and ASM code do aligned
in their macros
4. ASM optimized  CACHE_RANGE_LOOP_1/2 macros needs to get aligned end address.
Because end address is compound from start + size, end address is the first address
which is exclude.

Here is the corresponding code which describe it.
+       int align = ~(line_length - 1);
+       end = ((end & align) == end) ? end - line_length : end & align;

a) end is aligned:
it is necessary to subtruct line length because we don't want to work with
next cacheline
b) end address is not aligned:
Just align it to be ready for ASM code.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-05-06 11:22:00 +02:00
Michal Simek
77543cebab microblaze: cpuinfo shows cache line length
Show cache line length in /proc/cpuinfo.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-05-06 11:21:59 +02:00
Michal Simek
c17e1a1ced microblaze: Fix typo fault in cache code
Copy & paste error.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-05-06 11:21:59 +02:00
Tejun Heo
5a0e3ad6af include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files.  percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.

percpu.h -> slab.h dependency is about to be removed.  Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability.  As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.

  http://userweb.kernel.org/~tj/misc/slabh-sweep.py

The script does the followings.

* Scan files for gfp and slab usages and update includes such that
  only the necessary includes are there.  ie. if only gfp is used,
  gfp.h, if slab is used, slab.h.

* When the script inserts a new include, it looks at the include
  blocks and try to put the new include such that its order conforms
  to its surrounding.  It's put in the include block which contains
  core kernel includes, in the same order that the rest are ordered -
  alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
  doesn't seem to be any matching order.

* If the script can't find a place to put a new include (mostly
  because the file doesn't have fitting include block), it prints out
  an error message indicating which .h file needs to be added to the
  file.

The conversion was done in the following steps.

1. The initial automatic conversion of all .c files updated slightly
   over 4000 files, deleting around 700 includes and adding ~480 gfp.h
   and ~3000 slab.h inclusions.  The script emitted errors for ~400
   files.

2. Each error was manually checked.  Some didn't need the inclusion,
   some needed manual addition while adding it to implementation .h or
   embedding .c file was more appropriate for others.  This step added
   inclusions to around 150 files.

3. The script was run again and the output was compared to the edits
   from #2 to make sure no file was left behind.

4. Several build tests were done and a couple of problems were fixed.
   e.g. lib/decompress_*.c used malloc/free() wrappers around slab
   APIs requiring slab.h to be added manually.

5. The script was run on all .h files but without automatically
   editing them as sprinkling gfp.h and slab.h inclusions around .h
   files could easily lead to inclusion dependency hell.  Most gfp.h
   inclusion directives were ignored as stuff from gfp.h was usually
   wildly available and often used in preprocessor macros.  Each
   slab.h inclusion directive was examined and added manually as
   necessary.

6. percpu.h was updated not to include slab.h.

7. Build test were done on the following configurations and failures
   were fixed.  CONFIG_GCOV_KERNEL was turned off for all tests (as my
   distributed build env didn't work with gcov compiles) and a few
   more options had to be turned off depending on archs to make things
   build (like ipr on powerpc/64 which failed due to missing writeq).

   * x86 and x86_64 UP and SMP allmodconfig and a custom test config.
   * powerpc and powerpc64 SMP allmodconfig
   * sparc and sparc64 SMP allmodconfig
   * ia64 SMP allmodconfig
   * s390 SMP allmodconfig
   * alpha SMP allmodconfig
   * um on x86_64 SMP allmodconfig

8. percpu.h modifications were reverted so that it could be applied as
   a separate patch and serve as bisection point.

Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.

Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-30 22:02:32 +09:00
Michal Simek
22607a2821 microblaze: Add define for ASM_LOOP
It is default option but both options must be measured.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-03-11 14:12:50 +01:00
Frans Pop
4c912c1a33 microblaze: remove trailing space in messages
Signed-off-by: Frans Pop <elendil@planet.nl>
Cc: microblaze-uclinux@itee.uq.edu.au
Cc: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-03-11 14:09:29 +01:00
Michal Simek
407c1da07d microblaze: Move cache function to cache.c
It is better to have init cache handling on one place.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-03-11 14:07:57 +01:00
Michal Simek
0d670b2472 microblaze: Fix cache loop function for cache range
I create wrong asm code but none test shows that this part of code is wrong.
I am not convinces that were good idea to create asm optimized macros
for caches. The reason is that there is not optimization with previous code
that's why make sense to add old code and do some benchmarking which
functions are faster.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-02-24 13:18:29 +01:00
Michal Simek
2ee2ff875a microblaze: Support for WB cache
Microblaze version 7.20.d is the first MB version which can be run
on MMU linux. Please do not used previous version because they contain
HW bug.
Based on WB support was necessary to redesign whole cache design.
Microblaze versions from 7.20.a don't need to disable IRQ and cache
before working with them that's why there are special structures for it.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-12-14 08:45:10 +01:00
Michal Simek
c8983a5c6e microblaze: Add PVR for Microblaze v7.30.a
Microblaze v7.30.a will have 0x10 version string.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-12-14 08:45:10 +01:00
Michal Simek
81ab0dfd94 microblaze: Remove ancient and fake microblaze version from cpu_ver table
We need to continue with next microblaze PVR version that's why
I have to remove that ancient version. These version strings not match
any versions. From Microblaze v5.00.a is possible to use this style.
I believe that none use ancients versions. If yes they will be just
labeled as unknown version.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-12-14 08:45:09 +01:00
Michal Simek
f6e1f1b480 microblaze: Checking DTS against PVR for write-back cache
WB cache has special flag in PVR. There is added checking mechanism
for PVR and DTS.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-12-14 08:45:05 +01:00
Michal Simek
e051af576a microblaze: Extend cpuinfo for support write-back caches
There is missing checking agains PVR but this is not important
for now. There are some missing checking too.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-12-14 08:44:58 +01:00
Michal Simek
44e4e196a9 microblaze: Fix cache_line_lenght
We used cache_line as cache_line_lenght. For this reason
we did cache flushing 4 times longer than was necessary.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-12-14 08:44:57 +01:00
Michal Simek
6cec713b16 microblaze: Detect new 7.20.d version
Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-12-14 08:44:57 +01:00
Michal Simek
2fd7c761a2 microblaze: ftrace: add static function tracer
If -pg of gcc is enabled with CONFIG_FUNCTION_TRACER=y. a calling to
_mcount will be inserted into each kernel function. so, there is a
possibility to trace the kernel functions in _mcount.

This patch add the specific _mcount support for static function
tracing. by default, ftrace_trace_function is initialized as
ftrace_stub(an empty function), so, the default _mcount will introduce
very little overhead. after enabling ftrace in user-space, it will jump
to a real tracing function and do static function tracing for us.

Commit message from Wu Zhangjin <wuzhangjin@gmail.com>

Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-12-14 08:40:09 +01:00
Michal Simek
a3cd613b2e microblaze: Add TRACE_IRQFLAGS_SUPPORT
There are just two major changes
Renamed local_irq functions to raw_local_irq in irq.c.
Added TRACE_IRQFLAGS_SUPPORT to Kconfig.debug.

Look at Documentation/irqflags-tracing.txt

Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-12-14 08:40:09 +01:00
John Williams
f97b4f7de4 microblaze: Updated CPU version and FPGA family codes in PVR
Signed-off-by: John Williams <john.williams@petalogix.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-09-22 10:00:45 +02:00
Michal Simek
65d3db0601 microblaze: Typo fix for cpu param inconsistency
Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-07-27 09:03:19 +02:00
Michal Simek
94ad8eb854 microblaze: Detect new Microblaze 7.20 versions
Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-07-27 07:39:55 +02:00
Tobias Klauser
595e8fabea microblaze: Storage class should be before const qualifier
The C99 specification states in section 6.11.5:

The placement of a storage-class specifier other than at the
beginning of the declaration specifiers in a declaration is an
obsolescent feature.

Signed-off-by: Tobias Klauser <tklauser@distanz.ch>
Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-05-01 16:38:13 +02:00
Michal Simek
6dfb79aa11 microblaze: Do not check use_dcache
It is not necessary to check cpuinfo.use_dcache because
this checking is done in function which call that functions

Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-04-23 16:27:31 +02:00
Michal Simek
fbeda67782 microblaze: Do not use PVR configuration for broken MB version
Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-04-23 16:27:28 +02:00
Michal Simek
79533fd4cb microblaze: Fix USR1/2 pvr printing message
Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-04-23 16:09:18 +02:00
Michal Simek
5f8ffb5f66 microblaze_v8: Makefiles for Microblaze cpu
Reviewed-by: Ingo Molnar <mingo@elte.hu>
Acked-by: Randy Dunlap <randy.dunlap@oracle.com>
Acked-by: John Linn <john.linn@xilinx.com>
Acked-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com>
Acked-by: John Williams <john.williams@petalogix.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-03-27 14:25:51 +01:00
Michal Simek
b0c62724a5 microblaze_v8: PVR support, cpuinfo support
Reviewed-by: Ingo Molnar <mingo@elte.hu>
Acked-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com>
Acked-by: John Linn <john.linn@xilinx.com>
Acked-by: John Williams <john.williams@petalogix.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-03-27 14:25:18 +01:00
Michal Simek
8beb8503bf microblaze_v8: cache support
Reviewed-by: Ingo Molnar <mingo@elte.hu>
Acked-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com>
Acked-by: John Linn <john.linn@xilinx.com>
Acked-by: John Williams <john.williams@petalogix.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-03-27 14:25:16 +01:00
Michal Simek
406107dacd microblaze_v8: Cpuinfo handling
Reviewed-by: Ingo Molnar <mingo@elte.hu>
Acked-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com>
Acked-by: John Linn <john.linn@xilinx.com>
Acked-by: John Williams <john.williams@petalogix.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-03-27 14:25:11 +01:00