Xiaojie Yuan
4caca70668
drm/amdgpu: add DP audio support for si dce6 (v3)
...
v2: refine dce_v6_0_audio_endpt_wreg() and unify inconsistent method names
v3: fix num_pins for tahiti, pitcairn, verde and oland
Signed-off-by: Xiaojie Yuan <Xiaojie.Yuan@amd.com >
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Junwei Zhang <Jerry.Zhang@amd.com >
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:58 -04:00
Alex Deucher
6a124e675a
drm/amdgpu/gfx8: move CP_PQ_STATUS after doorbell range setting (v2)
...
I'm not sure if the order matters, but it seems like it makes
more sense to set this after the range is programmed.
v2: rebase (Alex)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:57 -04:00
Rex Zhu
4f339b2936
drm/amdgpu: set cpg doorbell for fiji and polaris.
...
add set_doorbell functions for mec and cpg.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:56 -04:00
Alex Deucher
a99f249d49
drm/amdgpu/gfx8: unify the HQD deactivation code
...
This could be used in Andres' priority scheduling patch
as well.
Reviewed-by: Andres Rodriguez <andresx7@gmail.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:55 -04:00
Alex Deucher
d5dc36a45e
drm/amdgpu/gfx8: enable cp/rlc ints after we disable clockgating
...
Even if we disable clockgating, we still need to make sure the
cp/rlc interrupts are enabled for powergating which might still
be enabled.
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:55 -04:00
Alex Deucher
dfa6c82ee5
drm/amdgpu/gfx7: enable cp/rlc ints after we disable clockgating
...
Even if we disable clockgating, we still need to make sure the
cp/rlc interrupts are enabled for powergating which might still
be enabled.
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:54 -04:00
Alex Deucher
d17c0faf1d
drm/amdgpu/gfx8: move MEC doorbell range setting
...
It's global, not queue specific, so move it out of the
kiq register init function.
Tested-and-Reviewed-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:53 -04:00
Alex Deucher
a545e491bb
drm/amdgpu/gfx8: fix resume of KIQ and KCQs
...
No need to reset the wptr and clear the rings. The UNMAP_QUEUES
packet writes the current MQD state back the MQD on suspend,
so there is no need to reset it as well.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:52 -04:00
Alex Deucher
9d11ca9c09
drm/amdgpu/gfx8: properly disable the KCQs in hw_fini
...
Use the UNMAP_QUEUES packet to have the KIQ properly
disable them.
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:51 -04:00
Alex Deucher
3d7e30b381
drm/amdgpu/gfx8: use new KIQ packet defines
...
Rather than open coding them.
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:51 -04:00
Alex Deucher
346586d567
drm/amdgpu/gfx8: move SET_RESOURCES into the same command stream
...
As the KCQ setup. This way we only have to wait once for the
entire MEC.
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:50 -04:00
Alex Deucher
c3a49ab54b
drm/amdgpu/gfx8: wait once for all KCQs to be created
...
Rather than waiting for each queue.
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:49 -04:00
Alex Deucher
3930011594
drm/amdgpu: split gfx_v8_0_kiq_init_queue into two
...
One for KIQ and one for the KCQ. This simplifies the logic and
allows for future optimizations.
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:48 -04:00
Alex Deucher
f776952b76
drm/amdgpu/gfx8: wait for completion in KIQ init
...
We need to make sure the various init sequences submitted
to KIQ complete before testing the rings.
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:47 -04:00
Alex Deucher
4fdca894bb
Revert "drm/amd/amdgpu: Disable GFX_PG on Carrizo until compute issues solved"
...
Re-enable GFX PG. It's working properly with MEC now that KIQ is
enabled.
Reviewed-by: Samuel Li <samuel.li@amd.com >
This reverts commit e9ef19aa1bdeac380662a112f1d03a7c3477527f.
2017-05-24 17:39:47 -04:00
David Panariti
b4e40676e4
drm/amdgpu: Switch baremetal to use KIQ for compute ring management. (v3)
...
KIQ is the Kernel Interface Queue for managing the MEC. Rather than setting
up rings via direct MMIO of ring registers, the rings are configured via
special packets sent to the KIQ. The allows the MEC to better manage shared
resources and certain power events.
v2: squash in s3/s4 fix from Rex
v3: further fixes from Rex
Signed-off-by: David Panariti <David.Panariti@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Acked-by: Tom St Denis <tom.stdenis@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:46 -04:00
Alex Deucher
a576fe5151
drm/amdgpu/gfx8: set doorbell range for polaris as well
...
Add missing chips to the doorbell range setup. These
were missed in the KIQ code. Fixes power and performance
regressions with KIQ. Spotted by Rex.
Tested-and-Reviewed-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:45 -04:00
Alex Deucher
ed6f55d1a9
drm/amdgpu/gfx8: add additional MQD initialization
...
Need to properly set the MTYPE and ROQ space setting.
This should fix performance regressions with KIQ enabled.
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:44 -04:00
Eric Huang
b6dc60cf79
drm/amd/powerplay: fix pcie dpm table for vega10
...
This resolves pcie low speed problem.
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com >
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:43 -04:00
Rex Zhu
9312d9a6a0
drm/amd/powerplay: update vega10 smu interface version to E.
...
need update smu firmware to version 0x1c20.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Reviewws-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:43 -04:00
Rex Zhu
14641ac4eb
drm/amd/powerplay: delete dead code in vega10_thermal.c
...
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:42 -04:00
Rex Zhu
fbf66a3c9c
drm/amd/powerplay: Add Vega10 Powertune Table v3 support.
...
Handle the latest powerplay table format; includes Boost
State support.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Reviewws-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:41 -04:00
Rex Zhu
676b4087fc
drm/amd/powerplay: convert from number of lanes to lane bits on vega10
...
We need a mask.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Reviewws-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:40 -04:00
Rex Zhu
9c2cc3a10c
drm/amd/powerplay: fix bug in processing CKS_Enable bit.
...
Typo in the mask.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:39 -04:00
Rex Zhu
ab5cf3a551
drm/amd/powerplay: add avfs fuse overdriver func.
...
Add a function to look up the AVFS fuse values for vega10
These are used to populate the avfs fuse table in the smu.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:38 -04:00
Eric Huang
d6c025d243
drm/amd/powerplay: add power profile support for Vega10 (v2)
...
This implements the workload specific interface of optimized
compute power profile for Vega10.
v2: squash in fix (Tom)
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:38 -04:00
Alex Deucher
ea289b39a6
drm/amdgpu/gfx9: drop duplicate gfx info init (v3)
...
Taken care of by gpu info firmware now.
v2: rebase
v3: rework based on latest firmware
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com >
Tested-by: Junwei Zhang <Jerry.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:37 -04:00
Alex Deucher
e2a75f88c3
drm/amdgpu: parse the gpu_info firmware (v4)
...
And populate the gfx structures from it.
v2: update the structures updated by the table
v3: rework based on new table structure
v4: simplify things
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com >
Tested-by: Junwei Zhang <Jerry.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:36 -04:00
Alex Deucher
8ae1a33648
drm/amdgpu: add gpu_info firmware (v3)
...
Add a new gpu info firmware to store gpu specific configuration
data. This allows us to store hw constants in a unified place.
v2: adjust structure and elements
v3: further restructure
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com >
Tested-by: Junwei Zhang <Jerry.Zhang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:35 -04:00
Dan Carpenter
2f590f8419
drm/amd/powerplay: fix a signedness bugs
...
Smatch complains about a signedness bug here:
vega10_hwmgr.c:4202 vega10_force_clock_level()
warn: always true condition '(i >= 0) => (0-u32max >= 0)'
Fixes: 7b52db39a4dan.carpenter@oracle.com >
Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:34 -04:00
Chunming Zhou
ca7962d8cc
drm/amdgpu: fix NULL pointer panic of emit_gds_switch
...
[ 338.384770] BUG: unable to handle kernel NULL pointer dereference at (null)
[ 338.384817] IP: [< (null)>] (null)
[ 338.385505] RIP: 0010:[<0000000000000000>] [< (null)>] (null)
[ 338.385950] Call Trace:
[ 338.385993] [<ffffffffa05d2313>] ? amdgpu_vm_flush+0x283/0x400 [amdgpu]
[ 338.386025] [<ffffffff811818d3>] ? printk+0x4d/0x4f
[ 338.386074] [<ffffffffa05d4906>] amdgpu_ib_schedule+0x4a6/0x4d0 [amdgpu]
[ 338.386140] [<ffffffffa0673e54>] amdgpu_job_run+0x64/0x180 [amdgpu]
[ 338.386203] [<ffffffffa0672e09>] amd_sched_main+0x2e9/0x4a0 [amdgpu]
[ 338.386232] [<ffffffff810bfce0>] ? prepare_to_wait_event+0x110/0x110
[ 338.386295] [<ffffffffa0672b20>] ? amd_sched_select_entity+0xe0/0xe0 [amdgpu]
[ 338.386327] [<ffffffff8109b423>] kthread+0xd3/0xf0
[ 338.386349] [<ffffffff8109b350>] ? kthread_park+0x60/0x60
[ 338.386376] [<ffffffff817e1ee5>] ret_from_fork+0x25/0x30
[ 338.386401] Code: Bad RIP value.
[ 338.386420] RIP [< (null)>] (null)
[ 338.386443] RSP <ffffc90001bd7d40>
[ 338.386458] CR2: 0000000000000000
[ 338.398508] ---[ end trace 4c66fcdc74b9a0a2 ]---
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:34 -04:00
Lyude
e12fcff799
drm/radeon: Unbreak HPD handling for r600+
...
We end up reading the interrupt register for HPD5, and then writing it
to HPD6 which on systems without anything using HPD5 results in
permanently disabling hotplug on one of the display outputs after the
first time we acknowledge a hotplug interrupt from the GPU.
This code is really bad. But for now, let's just fix this. I will
hopefully have a large patch series to refactor all of this soon.
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Lyude <lyude@redhat.com >
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:33 -04:00
Alex Deucher
ae5037dcfe
drm/amd/powerplay/smu7: disable mclk switching for high refresh rates
...
Even if the vblank period would allow it, it still seems to
be problematic on some cards.
bug: https://bugs.freedesktop.org/show_bug.cgi?id=96868
Cc: stable@vger.kernel.org
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:32 -04:00
Alex Deucher
14efcf11e9
drm/amd/powerplay/smu7: add vblank check for mclk switching (v2)
...
Check to make sure the vblank period is long enough to support
mclk switching.
v2: drop needless initial assignment (Nils)
bug: https://bugs.freedesktop.org/show_bug.cgi?id=96868
Cc: stable@vger.kernel.org
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:32 -04:00
Alex Deucher
ab03d9fe50
drm/radeon/ci: disable mclk switching for high refresh rates (v2)
...
Even if the vblank period would allow it, it still seems to
be problematic on some cards.
v2: fix logic inversion (Nils)
bug: https://bugs.freedesktop.org/show_bug.cgi?id=96868
Cc: stable@vger.kernel.org
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:31 -04:00
Alex Deucher
7121316b6d
drm/amdgpu/ci: disable mclk switching for high refresh rates (v2)
...
Even if the vblank period would allow it, it still seems to
be problematic on some cards.
v2: fix logic inversion (Nils)
bug: https://bugs.freedesktop.org/show_bug.cgi?id=96868
Cc: stable@vger.kernel.org
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 17:39:30 -04:00
Christian König
32601d48d7
drm/amdgpu: fix fundamental suspend/resume issue
...
Reinitializing the VM manager during suspend/resume is a very very bad
idea since all the VMs are still active and kicking.
This can lead to random VM faults after resume when new processes
become the same client ID assigned.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
Cc: stable@vger.kernel.org
2017-05-24 17:39:30 -04:00
Dan Carpenter
3083696a1e
drm/amd/powerplay: fix a signedness bugs
...
Smatch complains about a signedness bug here:
vega10_hwmgr.c:4202 vega10_force_clock_level()
warn: always true condition '(i >= 0) => (0-u32max >= 0)'
Fixes: 7b52db39a4dan.carpenter@oracle.com >
Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 16:49:34 -04:00
Chunming Zhou
7c4378f452
drm/amdgpu: fix NULL pointer panic of emit_gds_switch
...
[ 338.384770] BUG: unable to handle kernel NULL pointer dereference at (null)
[ 338.384817] IP: [< (null)>] (null)
[ 338.385505] RIP: 0010:[<0000000000000000>] [< (null)>] (null)
[ 338.385950] Call Trace:
[ 338.385993] [<ffffffffa05d2313>] ? amdgpu_vm_flush+0x283/0x400 [amdgpu]
[ 338.386025] [<ffffffff811818d3>] ? printk+0x4d/0x4f
[ 338.386074] [<ffffffffa05d4906>] amdgpu_ib_schedule+0x4a6/0x4d0 [amdgpu]
[ 338.386140] [<ffffffffa0673e54>] amdgpu_job_run+0x64/0x180 [amdgpu]
[ 338.386203] [<ffffffffa0672e09>] amd_sched_main+0x2e9/0x4a0 [amdgpu]
[ 338.386232] [<ffffffff810bfce0>] ? prepare_to_wait_event+0x110/0x110
[ 338.386295] [<ffffffffa0672b20>] ? amd_sched_select_entity+0xe0/0xe0 [amdgpu]
[ 338.386327] [<ffffffff8109b423>] kthread+0xd3/0xf0
[ 338.386349] [<ffffffff8109b350>] ? kthread_park+0x60/0x60
[ 338.386376] [<ffffffff817e1ee5>] ret_from_fork+0x25/0x30
[ 338.386401] Code: Bad RIP value.
[ 338.386420] RIP [< (null)>] (null)
[ 338.386443] RSP <ffffc90001bd7d40>
[ 338.386458] CR2: 0000000000000000
[ 338.398508] ---[ end trace 4c66fcdc74b9a0a2 ]---
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com >
Reviewed-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 16:49:09 -04:00
Lyude
3d18e33735
drm/radeon: Unbreak HPD handling for r600+
...
We end up reading the interrupt register for HPD5, and then writing it
to HPD6 which on systems without anything using HPD5 results in
permanently disabling hotplug on one of the display outputs after the
first time we acknowledge a hotplug interrupt from the GPU.
This code is really bad. But for now, let's just fix this. I will
hopefully have a large patch series to refactor all of this soon.
Reviewed-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Lyude <lyude@redhat.com >
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 16:46:43 -04:00
Alex Deucher
2275a3a2fe
drm/amd/powerplay/smu7: disable mclk switching for high refresh rates
...
Even if the vblank period would allow it, it still seems to
be problematic on some cards.
bug: https://bugs.freedesktop.org/show_bug.cgi?id=96868
Cc: stable@vger.kernel.org
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 16:46:01 -04:00
Alex Deucher
09be4a5219
drm/amd/powerplay/smu7: add vblank check for mclk switching (v2)
...
Check to make sure the vblank period is long enough to support
mclk switching.
v2: drop needless initial assignment (Nils)
bug: https://bugs.freedesktop.org/show_bug.cgi?id=96868
Cc: stable@vger.kernel.org
Acked-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 16:45:28 -04:00
Alex Deucher
58d7e3e427
drm/radeon/ci: disable mclk switching for high refresh rates (v2)
...
Even if the vblank period would allow it, it still seems to
be problematic on some cards.
v2: fix logic inversion (Nils)
bug: https://bugs.freedesktop.org/show_bug.cgi?id=96868
Cc: stable@vger.kernel.org
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 16:45:03 -04:00
Alex Deucher
0a646f331d
drm/amdgpu/ci: disable mclk switching for high refresh rates (v2)
...
Even if the vblank period would allow it, it still seems to
be problematic on some cards.
v2: fix logic inversion (Nils)
bug: https://bugs.freedesktop.org/show_bug.cgi?id=96868
Cc: stable@vger.kernel.org
Acked-by: Christian König <christian.koenig@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
2017-05-24 16:44:26 -04:00
Christian König
b3c85a0fb2
drm/amdgpu: fix fundamental suspend/resume issue
...
Reinitializing the VM manager during suspend/resume is a very very bad
idea since all the VMs are still active and kicking.
This can lead to random VM faults after resume when new processes
become the same client ID assigned.
Signed-off-by: Christian König <christian.koenig@amd.com >
Reviewed-by: Alex Deucher <alexander.deucher@amd.com >
Signed-off-by: Alex Deucher <alexander.deucher@amd.com >
Cc: stable@vger.kernel.org
2017-05-24 15:49:24 -04:00
Chris Wilson
2e0bb5b38f
drm/i915/selftests: Silence compiler warning in igt_ctx_exec
...
The compiler doesn't always spot the guard that object is allocated on
the first pass, leading to:
drivers/gpu/drm/i915/selftests/i915_gem_context.c: warning: 'obj' may be used uninitialized in this function [-Wuninitialized]: => 370:8
v2: Make it more obvious by setting obj to NULL on the first pass and
any later pass where we need to reallocate.
Reported-by: Geert Uytterhoeven <geert@linux-m68k.org >
Fixes: 791ff39ae3chris@chris-wilson.co.uk >
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Cc: Matthew Auld <matthew.auld@intel.com >
c: <drm-intel-fixes@lists.freedesktop.org > # v4.12-rc1+
Link: http://patchwork.freedesktop.org/patch/msgid/20170523194412.1195-1-chris@chris-wilson.co.uk
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
(cherry picked from commit ca83d5840cjani.nikula@intel.com >
2017-05-24 15:34:22 +03:00
Daniel Vetter
d38162e4b5
Revert "drm/i915: Restore lost "Initialized i915" welcome message"
...
This reverts commit bc5ca47c0a75f6dfe3e6krisman@collabora.co.uk >
Date: Wed Dec 28 12:32:11 2016 -0200
drm: Deduplicate driver initialization message
but somehow he missed Chris' patch to add the message meanwhile.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101025
Fixes: 75f6dfe3e6krisman@collabora.co.uk >
Cc: Daniel Vetter <daniel.vetter@ffwll.ch >
Cc: Jani Nikula <jani.nikula@linux.intel.com >
Cc: Chris Wilson <chris@chris-wilson.co.uk >
Cc: <stable@vger.kernel.org > # v4.11+
Reviewed-by: Gabriel Krisman Bertazi <krisman@collabora.co.uk >
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/20170517131557.7836-1-daniel.vetter@ffwll.ch
(cherry picked from commit 6bdba81979jani.nikula@intel.com >
2017-05-24 15:34:21 +03:00
Chris Wilson
22284f400a
drm/i915: Convert i915_gem_object_ops->flags values to use BIT()
...
Having just watched someone add a new value, 0x3, without realising that
the flags were bit values, I have come to appreciate the value in using
BIT.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Link: http://patchwork.freedesktop.org/patch/msgid/20170523103116.32239-1-chris@chris-wilson.co.uk
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
2017-05-24 12:02:32 +01:00
Chris Wilson
ca83d5840c
drm/i915/selftests: Silence compiler warning in igt_ctx_exec
...
The compiler doesn't always spot the guard that object is allocated on
the first pass, leading to:
drivers/gpu/drm/i915/selftests/i915_gem_context.c: warning: 'obj' may be used uninitialized in this function [-Wuninitialized]: => 370:8
v2: Make it more obvious by setting obj to NULL on the first pass and
any later pass where we need to reallocate.
Reported-by: Geert Uytterhoeven <geert@linux-m68k.org >
Fixes: 791ff39ae3chris@chris-wilson.co.uk >
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
Cc: Matthew Auld <matthew.auld@intel.com >
c: <drm-intel-fixes@lists.freedesktop.org > # v4.12-rc1+
Link: http://patchwork.freedesktop.org/patch/msgid/20170523194412.1195-1-chris@chris-wilson.co.uk
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com >
2017-05-24 12:01:40 +01:00
Changbin Du
e274086e47
drm/i915/gvt: clean up unsubmited workloads before destroying kmem cache
...
This is to fix a memory leak issue caused by unfreed gvtg workload objects.
Walk through the workload list and free all of the remained workloads
before destroying kmem cache.
[179.885211] INFO: Object 0xffff9cef10003b80 @offset=7040
[179.885657] kmem_cache_destroy gvt-g_vgpu_workload: Slab cache still has objects
[179.886146] CPU: 2 PID: 2318 Comm: win_lucas Tainted: G B W 4.11.0+ #1
[179.887223] Call Trace:
[179.887394] dump_stack+0x63/0x90
[179.887617] kmem_cache_destroy+0x1cf/0x1e0
[179.887960] intel_vgpu_clean_execlist+0x15/0x20 [i915]
[179.888365] intel_gvt_destroy_vgpu+0x4c/0xd0 [i915]
[179.888688] intel_vgpu_remove+0x2a/0x30 [kvmgt]
[179.888988] mdev_device_remove_ops+0x23/0x50 [mdev]
[179.889309] mdev_device_remove+0xe4/0x190 [mdev]
[179.889615] remove_store+0x7d/0xb0 [mdev]
[179.889885] dev_attr_store+0x18/0x30
[179.890129] sysfs_kf_write+0x37/0x40
[179.890371] kernfs_fop_write+0x107/0x180
[179.890632] __vfs_write+0x37/0x160
[179.890865] ? kmem_cache_alloc+0xd7/0x1b0
[179.891116] ? apparmor_file_permission+0x1a/0x20
[179.891372] ? security_file_permission+0x3b/0xc0
[179.891628] vfs_write+0xb8/0x1b0
[179.891812] SyS_write+0x55/0xc0
[179.891992] entry_SYSCALL_64_fastpath+0x1e/0xad
Signed-off-by: Changbin Du <changbin.du@intel.com >
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com >
2017-05-24 10:33:37 +08:00
