Commit Graph

25262 Commits

Author SHA1 Message Date
Eric Huang
60123300db drm/amd/powerplay: add uvd/vce dpm enabling flag to fix the performance issue for CZ
Set the UVD and VCE DPM flags otherwise UVD and VCE DPM won't get enabled.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Cc: stable@vger.kernel.org
2016-03-16 18:02:21 -04:00
Christian König
742c085fa8 drm/amdgpu: switch back to 32bit hw fences v2
We don't need to extend them to 64bits any more, so avoid the extra overhead.

v2: update commit message.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2016-03-16 18:00:10 -04:00
Christian König
480d0bf07e drm/amdgpu: remove amdgpu_fence_is_signaled
It's just overhead to check the fence value
when we signal them directly anyway.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2016-03-16 18:00:01 -04:00
Christian König
91cc6418a0 drm/amdgpu: drop the extra fence range check v2
Amdgpu doesn't support using scratch registers for fences any more.
So we won't see values like 0xdeadbeef as fence value any more.

v2: reschedule timer even if no change detected

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2016-03-16 17:59:52 -04:00
Christian König
4a7d74f176 drm/amdgpu: signal fences directly in amdgpu_fence_process
Because of the scheduler we need to signal all fences immediately
anyway, so try to avoid the waitqueue overhead.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2016-03-16 17:59:41 -04:00
Christian König
f09c2be4d4 drm/amdgpu: cleanup amdgpu_fence_wait_empty v2
Just wait for last fence instead of waiting for the sequence manually.

v2: don't use amdgpu_sched_jobs for the mask

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2016-03-16 17:59:32 -04:00
Christian König
c89377d10a drm/amdgpu: keep all fences in an RCU protected array v2
Just keep all HW fences in a RCU protected array as a
first step to replace the wait queue.

v2: update commit message, move fixes into separate patch.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2016-03-16 17:59:22 -04:00
Christian König
e6151a08bb drm/amdgpu: add number of hardware submissions to amdgpu_fence_driver_init_ring
Make this a parameter instead of using the global variable directly.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2016-03-16 17:59:12 -04:00
Christian König
189e0fb763 drm/amdgpu: RCU protected amd_sched_fence_release
Fences must be freed RCU protected, otherwise the reservation_object_*_rcu()
functions can run into problems.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-16 17:59:01 -04:00
Christian König
b44135351a drm/amdgpu: RCU protected amdgpu_fence_release
Fences must be freed RCU protected, otherwise the reservation_object_*_rcu()
functions can run into problems.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-16 17:58:52 -04:00
Christian König
ca08e04d56 drm/amdgpu: merge amdgpu_fence_process and _activity
No need to keep the two separate any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2016-03-16 17:58:43 -04:00
Christian König
d9713ef6b9 drm/amdgpu: cleanup amdgpu_fence_activity
The comment about the loop counter was never valid, even when you have
multiple threads this loop only runs as long as the sequence increases.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2016-03-16 17:58:12 -04:00
Christian König
22e5a2f46a drm/amdgpu: move fence structure into amdgpu_fence.c
No need to have that in the header file any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-14 14:08:30 -04:00
Christian König
77163f074a drm/amdgpu: remove amdgpu_fence_wait_next
Not used any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-14 13:43:47 -04:00
Christian König
f104fbcb8f drm/amdgpu: remove amdgpu_ring_from_fence
Not used any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-14 13:43:36 -04:00
Christian König
6ba60b891c drm/amdgpu: stop using the ring index in the SA
The ring index will always collide as hash into the fence list, so use
the context number instead. That can still cause collisions, but they
are less likely than using ring indices.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-14 13:43:27 -04:00
Christian König
f4247c5046 drm/amdgpu: stop waiting on UVD messages before mapping them
amdgpu_bo_kmap() now always waits for moves to finish.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-14 13:43:18 -04:00
Christian König
587f3c70aa drm/amdgpu: always wait before kmap a BO
When a BO is currently moving we otherwise would blindly
access the new location without checking.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-14 13:43:09 -04:00
Josh Poimboeuf
102534b085 drm/radeon: refactor SI tiling table initialization
Simplify the control flow of si_tiling_mode_table_init() similar to how
it was done in gfx_v7_0.c and gfx_v8_0.c.

Signed-off-by: Josh Poimboeuf <jpoimboe@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-14 13:41:18 -04:00
Josh Poimboeuf
f0e201f2d3 drm/radeon: refactor CIK tiling table initialization
Simplify the control flow of cik_tiling_mode_table_init() similar to how
it was done in gfx_v7_0.c and gfx_v8_0.c.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Josh Poimboeuf <jpoimboe@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-14 13:40:40 -04:00
Christian König
358c258a81 drm/amdgpu: allow write access to mapped userptrs
With the updated MMU notifier we should also be able to
handle the writeback case correctly.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-14 13:35:04 -04:00
Alex Deucher
00dfedc1e4 drm/amd/powerplay: use pp_endian.h for Tonga
Drop local versions of these macros.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-14 13:35:04 -04:00
Alex Deucher
1445abf0cc drm/amd/powerplay: use pp_endian.h for Fiji
Drop local versions of these macros.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-14 13:35:03 -04:00
Alex Deucher
2119364de5 drm/amd/powerplay: add a common pp endian header
To replace the duplicated versions of this in all asic
variants.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-14 13:35:03 -04:00
rezhu
b5be3a6bef drm/amd/powerplay: mv avfs status to smumgr.h
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-14 13:35:02 -04:00
Alex Deucher
e5f243bd2e drm/radeon: rework fbdev handling on chips with no connectors
Move all the logic to radeon_fb.c and add checks to functions
called frome elsewhere.

bug:
https://bugzilla.kernel.org/show_bug.cgi?id=112781

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-03-14 13:34:19 -04:00
Christian König
00b7c4ff7d drm/amdgpu: split pipeline sync out of SDMA vm_flush() as well
Code it similar to how we did it for the gfx and compute engines.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-10 10:36:13 -05:00
Christian König
32b41ac21f drm/amdgpu: Revert "add mutex for ba_va->valids/invalids"
Not needed any more because we need to protect the elements on the list anyway.

This reverts commit 38bf516c75b4ef0f5c716e05fa9baab7c52d6c39.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-09 13:04:02 -05:00
Christian König
2025021582 drm/amdgpu: Revert "add lock for interval tree in vm"
Not needed any more because we need to protect the elements on the list anyway.

This reverts commit fe237ed7efec8ac147a4572fdf81173a7f8ddda7.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-09 13:04:02 -05:00
Christian König
e17841b975 drm/amdgpu: Revert "add spin lock to protect freed list in vm (v3)"
Not needed any more because we need to protect the elements on the list anyway.

This reverts commit dae6ecf9e6c9b677e577826c3ac665c6dd9c490b.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-09 13:04:01 -05:00
Christian König
b5a5ec5504 drm/amdgpu: reserve the PD during unmap and remove
We not only need to protect the mapping tree and freed list itself,
but also the items on those list.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-09 13:04:01 -05:00
Felix Kuehling
fb29b57c34 drm/amdgpu: Fix two bugs in amdgpu_vm_bo_split_mapping
Off-by-one: last is inclusive, so the maximum is start + max_size - 1
Wrong unit: addr is in bytes, max_size is in pages

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-09 13:04:00 -05:00
Mario Kleiner
459ee1c3fd drm/radeon: Don't drop DP 2.7 Ghz link setup on some cards.
As observed on Apple iMac10,1, DCE-3.2, RV-730,
link rate of 2.7 Ghz is not selected, because
the args.v1.ucConfig flag setting for 2.7 Ghz
gets overwritten by a following assignment of
the transmitter to use.

Move link rate setup a few lines down to fix this.
In practice this didn't have any positive or
negative effect on display setup on the tested
iMac10,1 so i don't know if backporting to stable
makes sense or not.

Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-03-09 13:04:00 -05:00
Alex Deucher
bedf2a65c1 drm/amdgpu: disable runtime pm on PX laptops without dGPU power control
Some PX laptops don't provide an ACPI method to control dGPU power.  On
those systems, the driver is responsible for handling the dGPU power
state.  Disable runtime PM on them until support for this is implemented.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-03-09 13:03:52 -05:00
Alex Deucher
e64c952efb drm/radeon: disable runtime pm on PX laptops without dGPU power control
Some PX laptops don't provide an ACPI method to control dGPU power.  On
those systems, the driver is responsible for handling the dGPU power
state.  Disable runtime PM on them until support for this is implemented.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-03-09 13:03:19 -05:00
Tom St Denis
92821c261d drm/amd/amdgpu: Fix indentation in do_set_base() (DCEv8)
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-08 11:01:57 -05:00
Tom St Denis
ff923479ee drm/amd/amdgpu: make afmt_init cleanup if alloc fails (DCEv8)
If the allocation fails free memory and return error code.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-08 11:01:56 -05:00
Tom St Denis
74c1e84279 drm/amd/amdgpu: Move config init flag to bottom of sw_init (DCEv8)
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-08 11:01:56 -05:00
Tom St Denis
84cffef127 drm/amd/amdgpu: Don't proceed into audio_fini if audio is disabled (DCEv8)
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-08 11:01:55 -05:00
Tom St Denis
849dc32b20 drm/amd/amdgpu: Fix identation in do_set_base() (DCEv10)
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-08 11:01:55 -05:00
Tom St Denis
720a6ce3ce drm/amd/amdgpu: Make afmt_init cleanup if alloc fails (DCEv10)
Make the function free memory and return an error code if the allocation
fails.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-08 11:01:54 -05:00
Tom St Denis
98822a2f74 drm/amd/amdgpu: Move initialized flag to bottom of sw_init (DCEv10)
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-08 11:01:54 -05:00
Tom St Denis
441ce96f14 drm/amd/amdgpu: Don't proceed in audio_fini if disabled (DCEv10)
If audio is disabled we shouldn't proceed into the fini function.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-08 11:01:53 -05:00
Tom St Denis
e484f8d479 drm/amd/amdgpu: Fix indentation in dce_v11_0_crtc_do_set_base()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-08 11:01:53 -05:00
Tom St Denis
041ab0a494 drm/amd/amdgpu: Make afmt_init() cleanup if alloc fails (DCEv11)
Updated DCEv11 afmt_init to cleanup if any kzalloc
fails and then return an error code.  Don't continue initializing
the audio stack in that case.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-08 11:01:52 -05:00
Tom St Denis
c437b9d6c0 drm/amd/amdgpu: Move init flag to after init in sw_init() (DCEv11)
Don't set config_init to true until all config statements pass.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-08 11:01:52 -05:00
Tom St Denis
bcc71beb2a drm/amd/amdgpu: Whitespace typo fix in sw_init (DCEv11)
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-08 11:01:51 -05:00
Tom St Denis
29f646dfb2 drm/amd/amdgpu: Don't proceed in audio_fini in DCEv11 if disabled
If amdgpu_audio is disabled then the audio structure is not initialized
so we shouldn't read it in the fini function.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-08 11:01:51 -05:00
Christian König
2f568dbd6b drm/amdgpu: move get_user_pages out of amdgpu_ttm_tt_pin_userptr v6
That avoids lock inversion between the BO reservation lock
and the anon_vma lock.

v2:
* Changed amdgpu_bo_list_entry.user_pages to an array of pointers
* Lock mmap_sem only for get_user_pages
* Added invalidation of unbound userpointer BOs
* Fixed memory leak and page reference leak

v3 (chk):
* Revert locking mmap_sem only for_get user_pages
* Revert adding invalidation of unbound userpointer BOs
* Sanitize and fix error handling

v4 (chk):
* Init userpages pointer everywhere.
* Fix error handling when get_user_pages() fails.
* Add invalidation of unbound userpointer BOs again.

v5 (chk):
* Add maximum number of tries.

v6 (chk):
* Fix error handling when we run out of tries.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> (v4)
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-08 11:01:50 -05:00
Christian König
d564a06e1c drm/amdgpu: if a GDS switch is needed emit a pipeline sync as well
Otherwise we might change the GDS settings while they are still in use.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2016-03-08 11:01:50 -05:00