Commit Graph

1166 Commits

Author SHA1 Message Date
Ralf Baechle
5e0e61dd2c Merge branch 'next/kvm' into mips-for-linux-next 2013-05-09 17:56:40 +02:00
Sanjay Lal
f9afbd45b0 MIPS: If KVM is enabled then use the KVM specific routine to flush the TLBs on a ASID wrap.
Signed-off-by: Sanjay Lal <sanjayl@kymasys.com>
Cc: kvm@vger.kernel.org
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08 03:55:36 +02:00
Sanjay Lal
9843b030cc KVM/MIPS32: KVM Guest kernel support.
Both Guest kernel and Guest Userspace execute in UM. The memory map is as follows:
Guest User address space:   0x00000000 -> 0x40000000
Guest Kernel Unmapped:      0x40000000 -> 0x60000000
Guest Kernel Mapped:        0x60000000 -> 0x80000000
- Guest Usermode virtual memory is limited to 1GB.

Signed-off-by: Sanjay Lal <sanjayl@kymasys.com>
Cc: kvm@vger.kernel.org
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08 03:55:35 +02:00
Sanjay Lal
740765ce45 KVM/MIPS32: Arch specific KVM data structures.
Signed-off-by: Sanjay Lal <sanjayl@kymasys.com>
Cc: kvm@vger.kernel.org
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08 03:55:34 +02:00
Ralf Baechle
fc0460d0df MIPS: IP27: Remove pfn_t.
In the Linux kernel traditionally pfns are represented by an unsigned long.
However a few bits of the SGI IP27 platform code that were ported from
IRIX are using pfn_t for historic reasons.  This is conflicting with
KVM's use of pfn_t.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08 03:51:58 +02:00
Ralf Baechle
9b3539e0e5 Merge branch 'mips-next-3.10' of git://git.linux-mips.org/pub/scm/john/linux-john into mips-for-linux-next 2013-05-08 01:27:46 +02:00
John Crispin
51e3960784 MIPS: ralink: add memory definition for MT7620
Populate struct soc_info with the data that describes our RAM window.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5183/
2013-05-08 01:19:12 +02:00
John Crispin
fe98f612a1 MIPS: ralink: add memory definition for RT3883
Populate struct soc_info with the data that describes our RAM window.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5182/
2013-05-08 01:19:12 +02:00
John Crispin
38d5b81cde MIPS: ralink: add memory definition for RT2880
Populate struct soc_info with the data that describes our RAM window.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5181/
2013-05-08 01:19:11 +02:00
John Crispin
dafecee8bb MIPS: ralink: add memory definition for RT305x
Populate struct soc_info with the data that describes our RAM window.

As memory detection fails on RT5350 we read the amount of available memory
from the system controller.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5180/
2013-05-08 01:19:11 +02:00
John Crispin
4d9f77d252 MIPS: add detect_memory_region()
Add a generic way of detecting the available RAM. This function is based on the
implementation already used by ath79.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5178/
2013-05-08 01:19:11 +02:00
Gabor Juhos
de3eb02a53 MIPS: ralink: add cpu-feature-overrides.h
Add cpu-feature-overrides.h for RT288x, RT305x and RT3883.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5175/
2013-05-08 01:19:10 +02:00
John Crispin
594bde683d MIPS: ralink: adds support for MT7620 SoC family
Add support code for mt7620 SOC.

The code detects the SoC and registers the clk / pinmux settings.

Signed-off-by: John Crispin <blogic@openwrt.org>
Acked-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5177/
2013-05-08 01:19:09 +02:00
John Crispin
293840b999 MIPS: ralink: adds support for RT3883 SoC family
Add support code for rt3883 SOC.

The code detects the SoC and registers the clk / pinmux settings.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5185/
2013-05-08 01:19:09 +02:00
John Crispin
80fb55a951 MIPS: ralink: adds support for RT2880 SoC family
Add support code for rt2880 SOC.

The code detects the SoC and registers the clk / pinmux settings.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5176/
2013-05-08 01:19:09 +02:00
John Crispin
8ddc2513fb MIPS: ralink: add RT5350 sdram register defines
Add a few missing defines that are needed to make memory detection work on the
RT5350.

Signed-off-by: John Crispin <blogic@openwrt.org>
Acked-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5169/
2013-05-08 01:19:08 +02:00
John Crispin
bb19fea238 MIPS: ralink: add RT3352 register defines
Add a few missing defines that are needed to make USB and clock detection work
on the RT3352.

Signed-off-by: John Crispin <blogic@openwrt.org>
Acked-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5166/
2013-05-08 01:19:07 +02:00
John Crispin
9169a5d011 MIPS: move mips_{set,get}_machine_name() to a more generic place
Previously this functionality was only available to users of the mips_machine
api. Moving the code to prom.c allows us to also add a OF wrapper.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5164/
2013-05-08 01:19:07 +02:00
Huacai Chen
224786779d MIPS: Init new mmu_context for each possible CPU to avoid memory corruption
Currently, init_new_context() only for each online CPU, this may cause
memory corruption when CPU hotplug and fork() happens at the same time.
To avoid this, we make init_new_context() cover each possible CPU.

Scenario:
1, CPU#1 is being offline;
2, On CPU#0, do_fork() call dup_mm() and copy a mm_struct to the child;
3, On CPU#0, dup_mm() call init_new_context(), since CPU#1 is offline
   and init_new_context() only covers the online CPUs, child has the
   same asid as its parent on CPU#1 (however, child's asid should be 0);
4, CPU#1 is being online;
5, Now, if both parent and child run on CPU#1, memory corruption (e.g.
   segfault, bus error, etc.) will occur.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Acked-by: David Daney <david.daney@cavium.com>
Patchwork: http://patchwork.linux-mips.org/patch/4995/
Acked-by: John Crispin <blogic@openwrt.org>
2013-05-08 01:19:06 +02:00
Huacai Chen
8759934e2b MIPS: Build uasm-generated code only once to avoid CPU Hotplug problem
This and the next patch resolve memory corruption problems while CPU
hotplug. Without these patches, memory corruption can triggered easily
as below:

On a quad-core MIPS platform, use "spawn" of UnixBench-5.1.3 (http://
code.google.com/p/byte-unixbench/) and a CPU hotplug script like this
(hotplug.sh):
while true; do
echo 0 >/sys/devices/system/cpu/cpu1/online
echo 0 >/sys/devices/system/cpu/cpu2/online
echo 0 >/sys/devices/system/cpu/cpu3/online
sleep 1
echo 1 >/sys/devices/system/cpu/cpu1/online
echo 1 >/sys/devices/system/cpu/cpu2/online
echo 1 >/sys/devices/system/cpu/cpu3/online
sleep 1
done

Run "hotplug.sh" and then run "spawn 10000", spawn will get segfault
after a few minutes.

This patch:
Currently, clear_page()/copy_page() are generated by Micro-assembler
dynamically. But they are unavailable until uasm_resolve_relocs() has
finished because jump labels are illegal before that. Since these
functions are shared by every CPU, we only call build_clear_page()/
build_copy_page() only once at boot time. Without this patch, programs
will get random memory corruption (segmentation fault, bus error, etc.)
while CPU Hotplug (e.g. one CPU is using clear_page() while another is
generating it in cpu_cache_init()).

For similar reasons we modify build_tlb_refill_handler()'s invocation.

V2:
1, Rework the code to make CPU#0 can be online/offline.
2, Introduce cpu_has_local_ebase feature since some types of MIPS CPU
   need a per-CPU tlb_refill_handler().

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Hongbing Hu <huhb@lemote.com>
Acked-by: David Daney <david.daney@cavium.com>
Patchwork: http://patchwork.linux-mips.org/patch/4994/
Acked-by: John Crispin <blogic@openwrt.org>
2013-05-08 01:19:06 +02:00
Jayachandran C
c80dd3b679 MIPS: Netlogic: Merge platform usb.h to usb-init.c
The definitions are not used anywhere else, and merging it will
make adding the new USB definitions for XLPII series easier.
While there, cleanup some whitespace in usb-init.c. There is no
change to logic due to this commit.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/5027/
Acked-by: John Crispin <blogic@openwrt.org>
2013-05-08 01:19:05 +02:00
Jayachandran C
033e6f2887 MIPS: Netlogic: Remove unused code
Remove unused functions and redundant comments from
arch/mips/include/asm/netlogic/haldefs.h

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/5029/
Acked-by: John Crispin <blogic@openwrt.org>
2013-05-08 01:19:05 +02:00
Jayachandran C
1ad4af852b MIPS: Netlogic: Add 32-bit support for XLP
Update asm/netlogic/haldefs.h to extend register access functions
nlm_{read,write}_reg64() for 32-bit compilation. When compiled for 32-bit
the functions will read 64 IO registers with interrupts disabled.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/5026/
Acked-by: John Crispin <blogic@openwrt.org>
2013-05-08 01:19:05 +02:00
Jayachandran C
3c0553e734 MIPS: Netlogic: Avoid using fixed PIC IRT index
The index for a device interrupt in the PIC interrupt routing table
changes for different chips in the XLP family.  Avoid using the fixed
entries and derive the index value from the SoC device header.

Add workarounds for some devices which do not report the IRT index
correctly.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/5025/
Acked-by: John Crispin <blogic@openwrt.org>
2013-05-08 01:19:04 +02:00
Jayachandran C
e6904ff6c6 MIPS: Netlogic: Remove unused EIMR/EIRR functions
Remove the definitions of {read,write}_c0_{eirr,eimr}. These functions
are now unused after the PIC and IRQ code has been updated to use
optimized EIMR/EIRR functions which work on both 32-bit and 64-bit.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/5021/
Acked-by: John Crispin <blogic@openwrt.org>
2013-05-08 01:19:04 +02:00
Jayachandran C
33ff712aef MIPS: Netlogic: Optimize and fix write_c0_eimr()
Remove the irq save/restore from write_c0_eimr(), as it is always called
with interrupts off.

This allows us to remove workaround in write_c0_eimr() to fix up the
flags used by local_irq_save. This fixup worked on XLR, but will break
when 32-bit support is added to r2 cpus like XLP.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/5022/
Acked-by: John Crispin <blogic@openwrt.org>
2013-05-08 01:19:04 +02:00
Jonas Gorski
042df4fa28 MIPS: BCM63XX: merge bcm63xx_clk.h into bcm63xx/clk.c
All the header file does is provide the internal structure of clk,
which shouldn't be used by anyone except clk.c itself anyway.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Patchwork: http://patchwork.linux-mips.org/patch/5055/
Acked-by: John Crispin <blogic@openwrt.org>
2013-05-08 01:19:04 +02:00
Jonas Gorski
ab8ed9820f MIPS: BCM63XX: add flash detection for BCM6362
BCM6362 support booting from SPI flash and NAND.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5012/
Acked-by: John Crispin <blogic@openwrt.org>
2013-05-08 01:19:03 +02:00
Jonas Gorski
a156ba61f0 MIPS: BCM63XX: enable pcie for BCM6362
The PCIe controller is almost the same as the BCM6328 one, with only
the SERDES register being at a different location.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5011/
Acked-by: John Crispin <blogic@openwrt.org>
2013-05-08 01:19:03 +02:00
Jonas Gorski
08a41d1206 MIPS: BCM63XX: enable SPI controller for BCM6362
The SPI controller shares the same register layout as the 6358 one.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5010/
Acked-by: John Crispin <blogic@openwrt.org>
2013-05-08 01:19:03 +02:00
Jonas Gorski
2c8aaf71b0 MIPS: BCM63XX: add basic BCM6362 support
Add basic support for detecting and booting the BCM6362.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5009/
Acked-by: John Crispin <blogic@openwrt.org>
2013-05-08 01:19:03 +02:00
Jonas Gorski
6605428c50 MIPS: BCM63XX: fix revision ID width
The REVID is only 8 bit wide.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5007/
Acked-by: John Crispin <blogic@openwrt.org>
2013-05-08 01:19:03 +02:00
Jonas Gorski
8a398d757d MIPS: BCM63XX: remove duplicate spi register definitions
BCM6338 and BCM6348, and BCM6358 and everything after that share the
same register layout. To not have to redefine them for each new chip
and keep the code size small, only use the definitions for the first
chip with the certain layout.

Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5006/
Acked-by: John Crispin <blogic@openwrt.org>
2013-05-08 01:19:02 +02:00
David Daney
3d39019a16 MIPS: Remove redundant instructions from arch_spin_{,try}lock.
We were doing:
   SRL  $r,$?,16
   ANDI $r,$r,0xffff

The logical right shift by 16 leaves the upper 16 bits clear, so the
subsequent masking out of those bits is redundant, and can safely be
removed.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-04-26 17:18:24 +02:00
Ralf Baechle
e01961ceea MIPS: Remove further use of .subsection
7837314d14 [MIPS: Get rid of branches to
.subsections] removed most uses of .subsection] removed most uses of
.subsection in inline assembler code.

It left the instances in spinlock.h alone because we knew their use was
in fairly small files where .subsection use was fine but of course this
was a fragile assumption.  LTO breaks this assumption resulting in build
errors due to exceeded branch range, so remove further instances of
.subsection.

The two functions that still use .macro don't currently cause issues
however this use is still fragile.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-04-11 15:39:52 +02:00
Ralf Baechle
02b849f761 MIPS: Get rid of the use of .macro in C code.
It fails with LTO and probably has always been a fragile.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-04-11 15:39:51 +02:00
Ralf Baechle
0bfbf6a256 MIPS: Make declarations and definitions of tlbmiss_handler_setup_pgd match.
tlbmiss_handler_setup_pgd is run-time generated code and it was convenient
to pretend the symbol was an array in the generator but a function for
the users.  LTO gcc won't tolerate this kind of lie anymore so solve the
problem through a cast and function pointer instead.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-04-11 13:04:11 +02:00
Ralf Baechle
ad04c2e9e5 MIPS: Use inline function to access current thread pointer.
With LTE this fixes this issue:

  LDFINAL vmlinux.o
arch/mips/built-in.o (symbol from plugin): In function `sgimc_init':
(.text+0x0): multiple definition of `$28'
init/built-in.o (symbol from plugin):(.text+0x0): first defined here
kernel/built-in.o (symbol from plugin): In function `get_task_mm':
(.text+0x0): multiple definition of `$28'
init/built-in.o (symbol from plugin):(.text+0x0): first defined here
mm/built-in.o (symbol from plugin): In function `iov_iter_single_seg_count':
(.text+0x0): multiple definition of `$28'
init/built-in.o (symbol from plugin):(.text+0x0): first defined here
fs/built-in.o (symbol from plugin): In function `finish_no_open':
(.text+0x0): multiple definition of `$28'
init/built-in.o (symbol from plugin):(.text+0x0): first defined here
ipc/built-in.o (symbol from plugin): In function `ipc_init_ids':
(.text+0x0): multiple definition of `$28'
init/built-in.o (symbol from plugin):(.text+0x0): first defined here
security/built-in.o (symbol from plugin): In function `key_schedule_gc':
(.text+0x0): multiple definition of `$28'
init/built-in.o (symbol from plugin):(.text+0x0): first defined here
crypto/built-in.o (symbol from plugin): In function `crypto_find_alg':
(.text+0x0): multiple definition of `$28'
init/built-in.o (symbol from plugin):(.text+0x0): first defined here
block/built-in.o (symbol from plugin): In function `elv_rb_find':
(.text+0x0): multiple definition of `$28'
init/built-in.o (symbol from plugin):(.text+0x0): first defined here
argv_split.o (symbol from plugin): In function `argv_free':
(.text+0x0): multiple definition of `$28'
init/built-in.o (symbol from plugin):(.text+0x0): first defined here
dec_and_lock.o (symbol from plugin): In function `_atomic_dec_and_lock':
(.text+0x0): multiple definition of `$28'
init/built-in.o (symbol from plugin):(.text+0x0): first defined here
extable.o (symbol from plugin): In function `sort_extable':
(.text+0x0): multiple definition of `$28'
init/built-in.o (symbol from plugin):(.text+0x0): first defined here
flex_proportions.o (symbol from plugin): In function `fprop_global_init':
(.text+0x0): multiple definition of `$28'
init/built-in.o (symbol from plugin):(.text+0x0): first defined here
idr.o (symbol from plugin): In function `idr_for_each':
(.text+0x0): multiple definition of `$28'
init/built-in.o (symbol from plugin):(.text+0x0): first defined here
is_single_threaded.o (symbol from plugin): In function `current_is_single_threaded':
(.text+0x0): multiple definition of `$28'
init/built-in.o (symbol from plugin):(.text+0x0): first defined here
kobject.o (symbol from plugin): In function `kobject_get':
(.text+0x0): multiple definition of `$28'
init/built-in.o (symbol from plugin):(.text+0x0): first defined here
kobject_uevent.o (symbol from plugin): In function `add_uevent_var':
(.text+0x0): multiple definition of `$28'
init/built-in.o (symbol from plugin):(.text+0x0): first defined here
plist.o (symbol from plugin): In function `plist_add':
(.text+0x0): multiple definition of `$28'
init/built-in.o (symbol from plugin):(.text+0x0): first defined here
radix-tree.o (symbol from plugin): In function `radix_tree_lookup_slot':
(.text+0x0): multiple definition of `$28'
init/built-in.o (symbol from plugin):(.text+0x0): first defined here
ratelimit.o (symbol from plugin): In function `___ratelimit':
(.text+0x0): multiple definition of `$28'
init/built-in.o (symbol from plugin):(.text+0x0): first defined here
rwsem-spinlock.o (symbol from plugin): In function `__init_rwsem':
(.text+0x0): multiple definition of `$28'
init/built-in.o (symbol from plugin):(.text+0x0): first defined here
show_mem.o (symbol from plugin): In function `show_mem':
(.text+0x0): multiple definition of `$28'
init/built-in.o (symbol from plugin):(.text+0x0): first defined here
timerqueue.o (symbol from plugin): In function `timerqueue_iterate_next':
(.text+0x0): multiple definition of `$28'
init/built-in.o (symbol from plugin):(.text+0x0): first defined here
vsprintf.o (symbol from plugin): In function `simple_strtoull':
(.text+0x0): multiple definition of `$28'
init/built-in.o (symbol from plugin):(.text+0x0): first defined here
delay.o (symbol from plugin): In function `__delay':
(.text+0x0): multiple definition of `$28'
init/built-in.o (symbol from plugin):(.text+0x0): first defined here
mips-atomic.o (symbol from plugin): In function `arch_local_irq_disable':
(.text+0x0): multiple definition of `$28'
init/built-in.o (symbol from plugin):(.text+0x0): first defined here
uncached.o (symbol from plugin): In function `run_uncached':
(.text+0x0): multiple definition of `$28'
init/built-in.o (symbol from plugin):(.text+0x0): first defined here
lib/built-in.o (symbol from plugin): In function `_bcd2bin':
(.text+0x0): multiple definition of `$28'
init/built-in.o (symbol from plugin):(.text+0x0): first defined here
arch/mips/lib/built-in.o (symbol from plugin): In function `ioread8':
(.text+0x0): multiple definition of `$28'
init/built-in.o (symbol from plugin):(.text+0x0): first defined here
drivers/built-in.o (symbol from plugin): In function `fb_notifier_call_chain':
(.text+0x0): multiple definition of `$28'
init/built-in.o (symbol from plugin):(.text+0x0): first defined here
net/built-in.o (symbol from plugin): In function `sock_from_file':
(.text+0x0): multiple definition of `$28'
init/built-in.o (symbol from plugin):(.text+0x0): first defined here
klist.o (symbol from plugin): In function `klist_init':
(.text+0x0): multiple definition of `$28'
init/built-in.o (symbol from plugin):(.text+0x0): first defined here

It also makes the code a little more readable, so let's merge it.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-04-11 13:00:06 +02:00
Corey Minyard
5bbea36ab9 MIPS: Add linux/mm_types.h to pgtable.h
With the addition of transparent huge pages, pgtable.h uses struct page.
However, it is possible to include pgtable.h without anything defining
struct page.  So add the include to get it.

Signed-off-by: Corey Minyard <cminyard@mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-04-08 16:24:41 +02:00
David Howells
2a1486981c Fix breakage in MIPS siginfo handling
MIPS's siginfo handling has been broken since this commit:

	commit 574c4866e3
	Author: Al Viro <viro@zeniv.linux.org.uk>
	Date:   Sun Nov 25 22:24:19 2012 -0500
	consolidate kernel-side struct sigaction declarations

for 64-bit BE MIPS CPUs.

The UAPI variant looks like this:

	struct sigaction {
		unsigned int	sa_flags;
		__sighandler_t	sa_handler;
		sigset_t	sa_mask;
	};

but the core kernel's variant looks like this:

	struct sigaction {
	#ifndef __ARCH_HAS_ODD_SIGACTION
		__sighandler_t	sa_handler;
		unsigned long	sa_flags;
	#else
		unsigned long	sa_flags;
		__sighandler_t	sa_handler;
	#endif
	#ifdef __ARCH_HAS_SA_RESTORER
		__sigrestore_t sa_restorer;
	#endif
		sigset_t	sa_mask;
	};

The problem is that sa_flags has been changed from an unsigned int to an
unsigned long.

Fix this by making sa_flags unsigned int if __ARCH_HAS_ODD_SIGACTION is
defined.

Whilst we're at it, rename __ARCH_HAS_ODD_SIGACTION to
__ARCH_HAS_IRIX_SIGACTION.

Signed-off-by: David Howells <dhowells@redhat.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: stable@vger.kernel.org
Acked-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-03-19 19:15:52 +01:00
Jonas Gorski
97367519d7 MIPS: BCM63XX: Make nvram checksum failure non fatal
Some vendors modify the nvram layout moving the checksum to a different
place or dropping entirely, so reduce the checksum failure to a warning.

Reported-by: Álvaro Fernández Rojas <noltari@gmail.com>
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: John Crispin <blogic@openwrt.org>
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-03-19 19:15:40 +01:00
Florian Fainelli
63c2b6812f MIPS: Fix code generation for non-DSP capable CPUs
Commit 32a7ede (MIPS: dsp: Add assembler support for DSP ASEs) has
enabled the use of DSP ASE specific instructions such as rddsp and wrdsp
under the idea that all code path that will make use of these two
instructions are properly checking for cpu_has_dsp to ensure that the
particular CPU we are running on *actually* supports DSP ASE.

This commit actually causes the following oops on QEMU Malta emulating a
MIPS 24Kc without the DSP ASE implemented:

[    7.960000] Reserved instruction in kernel
[    7.960000] Cpu 0
[    7.960000] $ 0   : 00000000 00000000 00000014 00000005
[    7.960000] $ 4   : 8fc2de48 00000001 00000000 8f59ddb0
[    7.960000] $ 8   : 8f5ceec4 00000018 00000c00 00800000
[    7.960000] $12   : 00000100 00000200 00000000 00457b84
[    7.960000] $16   : 00000000 8fc2ba78 8f4ec980 00000001
[    7.960000] $20   : 80418f90 00000000 00000000 000002dd
[    7.960000] $24   : 0000009c 7730d7b8
[    7.960000] $28   : 8f59c000 8f59dd38 00000001 80104248
[    7.960000] Hi    : 0000001d
[    7.960000] Lo    : 0000000b
[    7.960000] epc   : 801041ec thread_saved_pc+0x2c/0x38
[    7.960000]     Not tainted
[    7.960000] ra    : 80104248 get_wchan+0x48/0xac
[    7.960000] Status: 1000b703    KERNEL EXL IE
[    7.960000] Cause : 10800028
[    7.960000] PrId  : 00019300 (MIPS 24Kc)
[    7.960000] Modules linked in:
[    7.960000] Process killall (pid: 1574, threadinfo=8f59c000,
task=8fd14558, tls=773aa440)
[    7.960000] Stack : 8fc2ba78 8012b008 0000000c 0000001d 00000000
00000000 8f58a380
                  8f58a380 8fc2ba78 80202668 8f59de78 8f468600 8f59de28
801b2a3c 8f59df00 8f98ba20 74696e69
                  8f468600 8f59de28 801b7308 0081c007 00000000 00000000
00000000 00000000 00000000 00000000
                  00000000 8fc2bbb4 00000001 0000001d 0000000b 77f038cc
7fe80648 ffffffff ffffffff 00000000
                  00000001 0016e000 00000000 ...
[    7.960000] Call Trace:
[    7.960000] [<801041ec>] thread_saved_pc+0x2c/0x38
[    7.960000] [<80104248>] get_wchan+0x48/0xac

The disassembly of thread_saved_pc points to the following:
000006d0 <thread_saved_pc>:
 6d0:   8c820208        lw      v0,520(a0)
 6d4:   3c030000        lui     v1,0x0
 6d8:   24630000        addiu   v1,v1,0
 6dc:   10430008        beq     v0,v1,700 <thread_saved_pc+0x30>
 6e0:   00000000        nop
 6e4:   3c020000        lui     v0,0x0
 6e8:   8c43000c        lw      v1,12(v0)
 6ec:   04620004        bltzl   v1,700 <thread_saved_pc+0x30>
 6f0:   00001021        move    v0,zero
 6f4:   8c840200        lw      a0,512(a0)
 6f8:   00031080        sll     v0,v1,0x2
 6fc:   7c44100a        lwx     v0,a0(v0)   <------------
 700:   03e00008        jr      ra
 704:   00000000        nop

If we specifically disable -mdsp/-mdspr2 for arch/mips/kernel/process.o,
we get the following (non-crashing) assembly:

00000708 <thread_saved_pc>:
 708:   8c820208        lw      v0,520(a0)
 70c:   3c030000        lui     v1,0x0
 710:   24630000        addiu   v1,v1,0
 714:   10430009        beq     v0,v1,73c <thread_saved_pc+0x34>
 718:   00000000        nop
 71c:   3c020000        lui     v0,0x0
 720:   8c42000c        lw      v0,12(v0)
 724:   04420005        bltzl   v0,73c <thread_saved_pc+0x34>
 728:   00001021        move    v0,zero
 72c:   8c830200        lw      v1,512(a0)
 730:   00021080        sll     v0,v0,0x2
 734:   00431021        addu    v0,v0,v1
 738:   8c420000        lw      v0,0(v0)
 73c:   03e00008        jr      ra
 740:   00000000        nop

The specific line that leads a different assembly being produced is:

unsigned long thread_saved_pc(struct task_struct *tsk)
...
	return ((unsigned long *)t->reg29)[schedule_mfi.pc_offset]; <---

The problem here is that the compiler was given the right to use DSP
instructions with the -mdsp / -mdspr2 command-line switches and
performed some optimization for us and used DSP ASE instructions where
we are not checking that the running CPU actually supports DSP ASE.

This patch fixes the issue by partially reverting commit 32a7ede for
arch/mips/kernel/Makefile in order to remove the -mdsp / -mdspr2
compiler command-line switches such that we are now guaranteed that the
compiler will not optimize using DSP ASE reserved instructions. We also
need to fixup the rddsp/wrdsp and m{t,h}{hi,lo}{0,1,2,3} macros in
arch/mips/include/asm/mipsregs.h to tell the assembler that we are going
to explicitely use DSP ASE reserved instructions. The comment in
arch/mips/kernel/Makefile is also updated to reflect that.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Acked-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: blogic@openwrt.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-03-19 19:15:35 +01:00
Ralf Baechle
f4cdb6a00c MIPS: SEAD3: Enable LL/SC.
All synthesizable CPU cores that could be loaded into a SEAD3's FPGA are
MIPS32 or MIPS64 CPUs that have ll/sc.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-03-12 18:58:09 +01:00
Paul Bolle
631b0af98c MIPS: Get rid of CONFIG_CPU_HAS_LLSC again
Commit f7ade3c168 ("MIPS: Get rid of
CONFIG_CPU_HAS_LLSC") did what it promised to do. But since then that
macro and its Kconfig symbol popped up again. Get rid of those again.

Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/4978/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-03-12 18:58:02 +01:00
Linus Torvalds
aebb2afd54 Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle:

 o Add basic support for the Mediatek/Ralink Wireless SoC family.

 o The Qualcomm Atheros platform is extended by support for the new
   QCA955X SoC series as well as a bunch of patches that get the code
   ready for OF support.

 o Lantiq and BCM47XX platform have a few improvements and bug fixes.

 o MIPS has sent a few patches that get the kernel ready for the
   upcoming microMIPS support.

 o The rest of the series is made up of small bug fixes and cleanups
   that relate to various parts of the MIPS code.  The biggy in there is
   a whitespace cleanup.  After I was sent another set of whitespace
   cleanup patches I decided it was the time to clean the whitespace
   "issues" for once and and that touches many files below arch/mips/.

Fix up silly conflicts, mostly due to whitespace cleanups.

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (105 commits)
  MIPS: Quit exporting kernel internel break codes to uapi/asm/break.h
  MIPS: remove broken conditional inside vpe loader code
  MIPS: SMTC: fix implicit declaration of set_vi_handler
  MIPS: early_printk: drop __init annotations
  MIPS: Probe for and report hardware virtualization support.
  MIPS: ath79: add support for the Qualcomm Atheros AP136-010 board
  MIPS: ath79: add USB controller registration code for the QCA955X SoCs
  MIPS: ath79: add PCI controller registration code for the QCA955X SoCs
  MIPS: ath79: add WMAC registration code for the QCA955X SoCs
  MIPS: ath79: register UART for the QCA955X SoCs
  MIPS: ath79: add QCA955X specific glue to ath79_device_reset_{set, clear}
  MIPS: ath79: add GPIO setup code for the QCA955X SoCs
  MIPS: ath79: add IRQ handling code for the QCA955X SoCs
  MIPS: ath79: add clock setup code for the QCA955X SoCs
  MIPS: ath79: add SoC detection code for the QCA955X SoCs
  MIPS: ath79: add early printk support for the QCA955X SoCs
  MIPS: ath79: fix WMAC IRQ resource assignment
  mips: reserve elfcorehdr
  mips: Make sure kernel memory is in iomem
  MIPS: ath79: use dynamically allocated USB platform devices
  ...
2013-03-02 07:44:16 -08:00
Linus Torvalds
9e2d59ad58 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal
Pull signal handling cleanups from Al Viro:
 "This is the first pile; another one will come a bit later and will
  contain SYSCALL_DEFINE-related patches.

   - a bunch of signal-related syscalls (both native and compat)
     unified.

   - a bunch of compat syscalls switched to COMPAT_SYSCALL_DEFINE
     (fixing several potential problems with missing argument
     validation, while we are at it)

   - a lot of now-pointless wrappers killed

   - a couple of architectures (cris and hexagon) forgot to save
     altstack settings into sigframe, even though they used the
     (uninitialized) values in sigreturn; fixed.

   - microblaze fixes for delivery of multiple signals arriving at once

   - saner set of helpers for signal delivery introduced, several
     architectures switched to using those."

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal: (143 commits)
  x86: convert to ksignal
  sparc: convert to ksignal
  arm: switch to struct ksignal * passing
  alpha: pass k_sigaction and siginfo_t using ksignal pointer
  burying unused conditionals
  make do_sigaltstack() static
  arm64: switch to generic old sigaction() (compat-only)
  arm64: switch to generic compat rt_sigaction()
  arm64: switch compat to generic old sigsuspend
  arm64: switch to generic compat rt_sigqueueinfo()
  arm64: switch to generic compat rt_sigpending()
  arm64: switch to generic compat rt_sigprocmask()
  arm64: switch to generic sigaltstack
  sparc: switch to generic old sigsuspend
  sparc: COMPAT_SYSCALL_DEFINE does all sign-extension as well as SYSCALL_DEFINE
  sparc: kill sign-extending wrappers for native syscalls
  kill sparc32_open()
  sparc: switch to use of generic old sigaction
  sparc: switch sys_compat_rt_sigaction() to COMPAT_SYSCALL_DEFINE
  mips: switch to generic sys_fork() and sys_clone()
  ...
2013-02-23 18:50:11 -08:00
Linus Torvalds
9afa3195b9 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial
Pull trivial tree from Jiri Kosina:
 "Assorted tiny fixes queued in trivial tree"

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (22 commits)
  DocBook: update EXPORT_SYMBOL entry to point at export.h
  Documentation: update top level 00-INDEX file with new additions
  ARM: at91/ide: remove unsused at91-ide Kconfig entry
  percpu_counter.h: comment code for better readability
  x86, efi: fix comment typo in head_32.S
  IB: cxgb3: delay freeing mem untill entirely done with it
  net: mvneta: remove unneeded version.h include
  time: x86: report_lost_ticks doesn't exist any more
  pcmcia: avoid static analysis complaint about use-after-free
  fs/jfs: Fix typo in comment : 'how may' -> 'how many'
  of: add missing documentation for of_platform_populate()
  btrfs: remove unnecessary cur_trans set before goto loop in join_transaction
  sound: soc: Fix typo in sound/codecs
  treewide: Fix typo in various drivers
  btrfs: fix comment typos
  Update ibmvscsi module name in Kconfig.
  powerpc: fix typo (utilties -> utilities)
  of: fix spelling mistake in comment
  h8300: Fix home page URL in h8300/README
  xtensa: Fix home page URL in Kconfig
  ...
2013-02-21 17:40:58 -08:00
Ralf Baechle
8bfc245f9a Merge branch 'mips-next-3.9' of git://git.linux-mips.org/pub/scm/john/linux-john into mips-for-linux-next 2013-02-21 12:51:33 +01:00
David Daney
612663a974 MIPS: Quit exporting kernel internel break codes to uapi/asm/break.h
The internal codes are not part of the kernel's ABI.

Signed-off-by: David Daney <david.daney@cavium.com>
Patchwork: http://patchwork.linux-mips.org/patch/4932/
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-20 18:24:24 +01:00
David Daney
1e7decdb27 MIPS: Probe for and report hardware virtualization support.
The presence of the MIPS Virtualization Application-Specific Extension
is indicated by CP0_Config3[23].  Probe for this and report it in
/proc/cpuinfo.

Signed-off-by: David Daney <david.daney@cavium.com>
Patchwork: http://patchwork.linux-mips.org/patch/4904/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-19 09:36:36 +01:00