Commit Graph

1080 Commits

Author SHA1 Message Date
Kumar Gala
748a768384 [POWERPC] Fix modpost warnings from head*.S on ppc32
We get warnings like the following from the various ppc32 head*.S files:

WARNING: vmlinux.o(.text+0x358): Section mismatch: reference to .init.text:early_init (between 'skpinv' and 'interrupt_base')
WARNING: vmlinux.o(.text+0x380): Section mismatch: reference to .init.text:machine_init (between 'skpinv' and 'interrupt_base')
WARNING: vmlinux.o(.text+0x384): Section mismatch: reference to .init.text:MMU_init (between 'skpinv' and 'interrupt_base')
WARNING: vmlinux.o(.text+0x3aa): Section mismatch: reference to .init.text:start_kernel (between 'skpinv' and 'interrupt_base')
WARNING: vmlinux.o(.text+0x3ae): Section mismatch: reference to .init.text:start_kernel (between 'skpinv' and 'interrupt_base')

Added a .text.head section simliar to what other architectures do since
modpost already excludes this from its warnings.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-14 08:53:36 -05:00
Kumar Gala
5e14d21e3f [POWERPC] Add cpu feature for SPE handling
Make it so that SPE support can be determined at runtime.  This is similiar
to how we handle AltiVec.  This allows us to have SPE support built in and
work on processors with and without SPE.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-14 08:53:30 -05:00
Geert Uytterhoeven
06462d9263 [POWERPC] PS3: Add new LV1 error codes
Add new error codes that may be returned by the LV1 hypervisor

Signed-off-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com>
Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-09-14 01:33:25 +10:00
Olof Johansson
0d72ba930c [POWERPC] Add workaround for MPICs with broken register reads
Some versions of PWRficient 1682M have an interrupt controller in which
the first register in each pair for interrupt sources doesn't always
read with the right polarity/sense values.

To work around this, keep a software copy of the register instead.  Since
it's not modified from the mpic itself, it's a feasible solution.  Still,
keep it under a config option to avoid wasting memory on other platforms.

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-09-14 01:33:25 +10:00
Olof Johansson
a416561bf7 [POWERPC] Move lowlevel runlatch calls under cpu feature control
There's no need to call the runlatch on functions on processors that
don't implement them (CPU_FTR_CTRL).

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-09-14 01:33:22 +10:00
Olof Johansson
2e1957fd47 [POWERPC] pasemi: Export more SPRs to sysfs when CONFIG_DEBUG_KERNEL=y
Export some of the implementation-specific registers via sysfs.
Useful when debugging, etc.

Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-09-14 01:33:21 +10:00
Michael Ellerman
52964f87c6 [POWERPC] Add an optional device_node pointer to the irq_host
The majority of irq_host implementations (3 out of 4) are associated
with a device_node, and need to stash it somewhere. Rather than having
it somewhere different for each host, add an optional device_node pointer
to the irq_host structure.

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-09-14 01:33:20 +10:00
Paul Mackerras
b2315372ea Merge branch 'linux-2.6' into for-2.6.24 2007-09-14 01:24:25 +10:00
Masato Noguchi
b7f90a406f [POWERPC] cell/PS3: Fix a bug that causes the PS3 to hang on the SPU Class 0 interrupt.
The Cell BE Architecture spec states that the SPU MFC Class 0 interrupt
is edge-triggered.  The current spu interrupt handler assumes this
behavior and does not clear the interrupt status.

The PS3 hypervisor visualizes all SPU interrupts as level, and on return
from the interrupt handler the hypervisor will deliver a new virtual
interrupt for any unmasked interrupts which for which the status has not
been cleared.  This fix clears the interrupt status in the interrupt
handler.

Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com>
Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-09-11 04:30:36 +10:00
Paul Mackerras
35438c4327 Merge branch 'linux-2.6' into for-2.6.24 2007-08-28 15:56:11 +10:00
Kumar Gala
33d71d26ba [POWERPC] Copy over headers from arch/ppc to arch/powerpc that we need
To build arch/powerpc without including asm-ppc/ we need these files
in asm-powerpc/

Moved some headers under arch/powerpc/platforms if they were only used by
platform or driver files and fixed up the source file includes to match
the new locations

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-08-22 22:43:29 -05:00
Stephen Rothwell
7180e3e636 [POWERPC] Split out iSeries specific exception macros
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-08-22 16:48:35 +10:00
Stephen Rothwell
f9ff0f3048 [POWERPC] Move the exception macros into a header file
It makes head_64.S a bit more readable and will allow us to move the
iSeries exceptions elsewhere.

This also removes the last line of the comment:

 * The following macros define the code that appears as
 * the prologue to each of the exception handlers.  They
 * are split into two parts to allow a single kernel binary
 * to be used for pSeries and iSeries.
 * LOL.  One day... - paulus

Anything is possible. :-)

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-08-22 16:48:35 +10:00
Stephen Rothwell
fc68e8699f [POWERPC] Move iSeries startup code out of head_64.S
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-08-22 16:48:34 +10:00
Scott Wood
804ace8881 [POWERPC] Use strcasecmp() rather than strncasecmp() when determining device node compatibility
The current code assumes "foo-bar" must always be compatible with a node
compatible with "foo", which breaks device trees where this is not so.

The "case" part is also wrong according to Open Firmware, but it's more
likely to have drivers and/or device trees depending on it, and thus
needs to be handled more carefully.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-08-22 15:21:47 +10:00
Scott Wood
12cdac34c6 [POWERPC] Add clrbits8 and setbits8
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-08-22 15:21:47 +10:00
Stephen Rothwell
16a15a30f8 [POWERPC] iSeries: Clean up lparmap mess
We need to have xLparMap in head_64.S so that it is at a fixed address
(because the linker will not resolve (address & 0xffffffff) for us).
But the assembler miscalculates the KERNEL_VSID() expressions.  So put
the confusing expressions into asm-offsets.c.

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-08-22 15:21:46 +10:00
Josh Boyer
aab69292e4 [POWERPC] 40x decrementer fixes
Allow generic_calibrate_decr to work for 40x platforms.  Given that the hardware
behavior is identical, this also changes the set_dec function to reload the PIT
on 40x to match the behavior 44x currently has.

Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-08-20 07:29:11 -05:00
Josh Boyer
4d922c8dc3 [POWERPC] 40x MMU
Add MMU definitions for 40x platforms.  Also fixes two warnings in 40x_mmu.c.

Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
2007-08-20 07:28:48 -05:00
Becky Bruce
86d7a9a9c4 [POWERPC] Fix FSL BookE machine check reporting
Reserved MCSR bits on FSL BookE parts may have spurious values
when mcheck occurs.  Mask these off when printing the MCSR to
avoid confusion.  Also, get rid of the MCSR_GL_CI bit defined
for e500 - this bit doesn't actually have any meaning.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-08-17 13:22:28 -05:00
Stephen Rothwell
e8ff0646e5 [POWERPC] Tidy up CONFIG_PPC_MM_SLICES code
This removes some of the #ifdefs from .c files.

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-08-17 11:01:59 +10:00
Stephen Rothwell
0b8188a44d [POWERPC] Remove get_property and device_is_compatible
They were only needed for backwards compatibility and all in tree uses
have now been changed.

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-08-17 11:01:58 +10:00
Becky Bruce
1ac9f1f71d [POWERPC] Update lmb.h include protection to ASM_POWERPC
This file was protected by _PPC64_LMB_H, which is confusing, as the
32-bit code also uses the lmb these days.  Changed to
_ASM_POWERPC_LMB_H.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-08-17 11:01:58 +10:00
Segher Boessenkool
9f0cbea0d8 [POWERPC] Implement atomic{, 64}_{read, write}() without volatile
Instead, use asm() like all other atomic operations already do.

Also use inline functions instead of macros; this actually
improves code generation (some code becomes a little smaller,
probably because of improved alias information -- just a few
hundred bytes total on a default kernel build, nothing shocking).

Signed-off-by: Segher Boessenkool <segher@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-08-17 11:01:58 +10:00
Linas Vepstas
0f2342c85d [POWERPC] pseries: Eliminate global error_log_cnt variable
Eliminate the use of error_log_cnt as a global var shared across
different directories.  Pass it as a parameter instead.

Signed-off-by: Linas Vepstas <linas@austin.ibm.com>

----

Respin of earlier patch, with the CONFIG_PSERIES junk removed from the
header file.

 arch/powerpc/kernel/nvram_64.c         |   10 +++++-----
 arch/powerpc/platforms/pseries/rtasd.c |    7 ++++---
 include/asm-powerpc/nvram.h            |    6 ++++--
 3 files changed, 13 insertions(+), 10 deletions(-)
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-08-17 11:01:52 +10:00
Segher Boessenkool
f774216d46 [POWERPC] Replace a few #defines with empty inline functions
...so that GCC doesn't complain about unused variables in the
callers of these.

Signed-off-by: Segher Boessenkool <segher@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-08-17 11:01:51 +10:00
Benjamin Herrenschmidt
8f2ea1fd3f [POWERPC] Fix initialization and usage of dma_mask
powerpc has a couple of bugs in the usage of dma_masks that tend to
break when drivers explicitly try to set a 32-bit mask for example.

First, the code that generates the pci devices from the OF device-tree
doesn't initialize the mask properly, then our implementation of
set_dma_mask() was trying to validate the -previous- mask value, not the
one passed in as an argument.

This fixes these problems.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-08-10 21:04:42 +10:00
Andre Detsch
f5996449e3 [POWERPC] cell: Move SPU affinity init to spu_management_of_ops
This patch moves affinity initialization code from spu_base.c to a
new spu_management_of_ops function (init_affinity), which is empty
in the case of PS3. This fixes a linking problem that was happening
when compiling for PS3.
Also, some small code style changes were made.

Signed-off-by: Andre Detsch <adetsch@br.ibm.com>
Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-08-10 21:04:21 +10:00
Michael Neuling
67439b76f2 [POWERPC] Fixes for the SLB shadow buffer code
On a machine with hardware 64kB pages and a kernel configured for a
64kB base page size, we need to change the vmalloc segment from 64kB
pages to 4kB pages if some driver creates a non-cacheable mapping in
the vmalloc area.  However, we never updated with SLB shadow buffer.
This fixes it.  Thanks to paulus for finding this.

Also added some write barriers to ensure the shadow buffer contents
are always consistent.

Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-08-03 19:36:01 +10:00
Paul Mackerras
c0f7c6cb5d [POWERPC] Expand RPN field to 34 bits when using 64k pages
The real page number field in our PTEs when configured for 64kB pages
is currently 32 bits, which turns out to be not quite enough for the
resources that the eHCA driver wants to map.  This expands the RPN
field to include 2 adjacent, previously-unused bits.

Signed-off-by: Paul Mackerras <paulus@samba.org>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2007-08-03 14:08:24 +10:00
Linus Torvalds
8d4fbcfbe0 Fix WARN_ON() on bitfield ops
Alexey Dobriyan noticed that the new WARN_ON() semantics that were
introduced by commit 684f978347 (to also
return the value to be warned on) didn't compile when given a bitfield,
because the typeof doesn't work for bitfields.

So instead of the typeof trick, use an "int" variable together with a
"!!(x)" expression, as suggested by Al Viro.

To make matters more interesting, Paul Mackerras points out that that is
sub-optimal on Power, but the old asm-coded comparison seems to be buggy
anyway on 32-bit Power if the conditional was 64-bit, so I think there
are more problems there.

Regardless, the new WARN_ON() semantics may have been a bad idea.  But
this at least avoids the more serious complications.

Cc: Alexey Dobriyan <adobriyan@sw.ru>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Al Viro <viro@ftp.linux.org.uk>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2007-07-31 21:12:07 -07:00
Stephane Eranian
a583f1b542 remove unused TIF_NOTIFY_RESUME flag
Remove unused TIF_NOTIFY_RESUME flag for all processor architectures.  The
flag was not used excecpt on IA-64 where the patch replaces it with
TIF_PERFMON_WORK.

Signed-off-by: stephane eranian <eranian@hpl.hp.com>
Cc: <linux-arch@vger.kernel.org>
Cc: "Luck, Tony" <tony.luck@intel.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-31 15:39:38 -07:00
Linus Torvalds
9f5577d815 Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (21 commits)
  [POWERPC] spusched: Fix initial timeslice calculation
  [POWERPC] spufs: Fix incorrect initialization of cbe_spu_info.spus
  [POWERPC] Fix Maple platform ISA bus
  [POWERPC] Make pci_iounmap actually unmap things
  [POWERPC] Add function to check if address is an IO port
  [POWERPC] Fix Pegasos keyboard detection
  [POWERPC] iSeries: Fix section mismatch warning in lpevents
  [POWERPC] iSeries: Fix section mismatch warnings
  [POWERPC] iSeries: We need vio_enable_interrupts
  [POWERPC] Fix RTC and device tree on linkstation machines
  [POWERPC] Add of_register_i2c_devices()
  [POWERPC] Fix loop with unsigned long counter variable
  [POWERPC] Fix register labels on show_regs() message for 4xx/Book-E
  [POWERPC] Only allow building of BootX text support on PPC_MULTIPLATFORM
  [POWERPC] Fix the ability to reset on MPC8544 DS and MPC8568 MDS boards
  [POWERPC] Fix mpc7448hpc2 tsi108 device_type bug
  [POWREPC] Fixup a number of modpost warnings on ppc32
  [POWERPC] Fix ethernet PHY support on MPC8544 DS
  [POWERPC] Don't try to allocate resources for a Freescale POWERPC PHB
  Revert "[POWERPC] Don't complain if size-cells == 0 in prom_parse()"
  ...
2007-07-26 14:00:09 -07:00
Sam Ravnborg
045e72acf1 fix 'dynreloc miscount' link error on Powerpc
Nathan Lynch <ntl@pobox.com> reported:
2.6.23-rc1 breaks the build for 64-bit powerpc for me (using
maple_defconfig):

  LD      vmlinux.o
powerpc64-unknown-linux-gnu-ld: dynreloc miscount for
kernel/built-in.o, section .opd
powerpc64-unknown-linux-gnu-ld: can not edit opd Bad value
make: *** [vmlinux.o] Error 1

However, I see a possibly related binutils patch:
http://article.gmane.org/gmane.comp.gnu.binutils/33650

It was tracked down to be caused by the weak prototype
declaration in mm.h:
__attribute__((weak)) const char *arch_vma_name(struct vm_area_struct *vma);

But there is no need to make the declaration weak - only the definition
needs to be marked weak.  So drop the weak declaration.  And in the process
drop the duplicate definition in page.h for powerpc.

Note: the arch_vma_name fix for x86_64 needs to be applied first to avoid
breaking x86_64

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Nathan Lynch <ntl@pobox.com>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-26 11:35:18 -07:00
Al Viro
97f1e7f7d2 make powerpc BUG_ON() OK with pointers and bitwise
Since powerpc insists on printing the _value_ of condition
and on casting it to long...  At least let's make it a force-cast.

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-26 11:11:57 -07:00
Benjamin Herrenschmidt
6dfbde2091 [POWERPC] Add function to check if address is an IO port
This adds a function that tells you if a given kernel virtual address
is hitting a PCI or ISA IO port permanent mapping or not. This is to
be used in the next patch to fix iomap APIs to properly unmap things.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-26 16:17:47 +10:00
Stephen Rothwell
c40b91b59d [POWERPC] iSeries: Fix section mismatch warnings
WARNING: vmlinux.o(.text+0x8124): Section mismatch: reference to .init.text:.iSeries_early_setup (between '.__start_initialization_iSeries' and '.__mmu_off')
WARNING: vmlinux.o(.text+0x8128): Section mismatch: reference to .init.text:.early_setup (between '.__start_initialization_iSeries' and '.__mmu_off')

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-26 16:12:17 +10:00
Stephen Rothwell
56a4c6e31a [POWERPC] iSeries: We need vio_enable_interrupts
Commit 3d0e91f7ac introduced a requirement
for vio_enable_interrupts which iSeires has never needed.  So create a
dummy one.

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-26 16:12:17 +10:00
Kumar Gala
f64fddbeac [POWERPC] Provide ability to setup P2P bridge registers from struct resource
We need the ability to set P2P bridge registers to properly setup the virtual
P2P bridges that exist in PCIe controllers for some of the embedded setups.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 22:30:08 -05:00
Kumar Gala
2e56ff206b [POWERPC] Make endianess of cfg_addr for indirect pci ops runtime
Make it so we do a runtime check to know if we need to write cfg_addr
as big or little endian.  This is needed if we want to allow 86xx support
to co-exist in the same kernel as other 6xx PPCs.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 22:29:09 -05:00
Kumar Gala
d5269966e5 [POWERPC] Removed setup_indirect_pci_nomap
We don't use setup_indirect_pci_nomap in arch/powerpc and it appears
the users that needed it from arch/ppc are now using setup_indirect_pci.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 10:27:08 -05:00
Kumar Gala
62c66c8e55 [POWERPC] Added indirect quirk to handle PCIe PHB that have issue w/no link
Added PPC_INDIRECT_TYPE_NO_PCIE_LINK flag to the indirect pci handling
code to ensure that we don't talk to any device other than the PHB
if we don't have PCIe link.  Some controllers will lockup if they try
to do a config cycle to any device on the bus except the PHB.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 10:27:07 -05:00
Kumar Gala
38805e5f09 [POWERPC] Add the ability to find PCI capabilities early on
Added early_find_capability that wraps pci_bus_find_capability and uses
fake_pci_bus() to allow us to call it before we've fully setup the
pci_controller.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 10:27:07 -05:00
Benjamin Herrenschmidt
7fd7218610 [POWERPC] MPIC protected sources
Some HW platforms, such as the new cell blades, requires some MPIC sources
to be left alone by the operating system. This implements support for
a "protected-sources" property in the mpic controller node containing a list
of source numbers to be protected against operating system interference.

For those interested in the gory details, the MPIC on the southbridge of
those blades has some of the processor outputs routed to the cell, and
at least one routed as a GPIO to the service processor. It will be used
in the GA product for routing some of the southbridge error interrupts
to the service processor which implements some of the RAS stuff, such
as checkstopping when fatal errors occurs before they can propagate.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-22 21:30:59 +10:00
Segher Boessenkool
34f329db54 [POWERPC] of_detach_node()'s device node argument cannot be const
...since it modifies it (when it sets the OF_DETACHED flag).

Signed-off-by: Segher Boessenkool <segher@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-22 21:30:59 +10:00
Christoph Hellwig
486acd4850 [CELL] spufs: rework list management and associated locking
This sorts out the various lists and related locks in the spu code.

In detail:

 - the per-node free_spus and active_list are gone.  Instead struct spu
   gained an alloc_state member telling whether the spu is free or not
 - the per-node spus array is now locked by a per-node mutex, which
   takes over from the global spu_lock and the per-node active_mutex
 - the spu_alloc* and spu_free function are gone as the state change is
   now done inline in the spufs code.  This allows some more sharing of
   code for the affinity vs normal case and more efficient locking
 - some little refactoring in the affinity code for this locking scheme

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-07-20 21:42:28 +02:00
Bob Nelson
1474855d08 [CELL] oprofile: add support to OProfile for profiling CELL BE SPUs
From: Maynard Johnson <mpjohn@us.ibm.com>

This patch updates the existing arch/powerpc/oprofile/op_model_cell.c
to add in the SPU profiling capabilities.  In addition, a 'cell' subdirectory
was added to arch/powerpc/oprofile to hold Cell-specific SPU profiling code.
Exports spu_set_profile_private_kref and spu_get_profile_private_kref which
are used by OProfile to store private profile information in spufs data
structures.

Also incorporated several fixes from other patches (rrn).  Check pointer
returned from kzalloc.  Eliminated unnecessary cast.  Better error
handling and cleanup in the related area.  64-bit unsigned long parameter
was being demoted to 32-bit unsigned int and eventually promoted back to
unsigned long.

Signed-off-by: Carl Love <carll@us.ibm.com>
Signed-off-by: Maynard Johnson <mpjohn@us.ibm.com>
Signed-off-by: Bob Nelson <rrnelson@us.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Acked-by: Paul Mackerras <paulus@samba.org>
2007-07-20 21:42:24 +02:00
Arnd Bergmann
8e68e2f248 [CELL] spufs: extension of spu_create to support affinity definition
This patch adds support for additional flags at spu_create, which relate
to the establishment of affinity between contexts and contexts to memory.
A fourth, optional, parameter is supported. This parameter represent
a affinity neighbor of the context being created, and is used when defining
SPU-SPU affinity.
Affinity is represented as a doubly linked list of spu_contexts.

Signed-off-by: Andre Detsch <adetsch@br.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-07-20 21:42:15 +02:00
Arnd Bergmann
9d92af621f [CELL] cell: add vicinity information on spus
This patch adds affinity data to each spu instance.
A doubly linked list is created, meant to connect the spus
in the physical order they are placed in the BE. SPUs
near to memory should be marked as having memory affinity.
Adjustments of the fields acording to FW properties is done
in separate patches, one for CPBW, one for Malta (patch for
Malta under testing).

Signed-off-by: Andre Detsch <adetsch@br.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-07-20 21:42:12 +02:00
Arnd Bergmann
aa6d5b2025 [CELL] cell: add per BE structure with info about its SPUs
Addition of a spufs-global "cbe_info" array. Each entry contains information
about one Cell/B.E. node, namelly:
* list of spus (both free and busy spus are in this list);
* list of free spus (replacing the static spu_list from spu_base.c)
* number of spus;
* number of reserved (non scheduleable) spus.

SPE affinity implementation actually requires only access to one spu per
BE node (since it implements its own pointer to walk through the other spus
of the ring) and the number of scheduleable spus (n_spus - non_sched_spus)
However having this more general structure can be useful for other
functionalities, concentrating per-cbe statistics / data.

Signed-off-by: Andre Detsch <adetsch@br.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-07-20 21:42:11 +02:00