Commit Graph

59 Commits

Author SHA1 Message Date
Slava Grigorev
2afa3265b2 radeon/audio: fix DP audio on DCE6
Split DCE6 and DCE8 programming of DCCG_AUDIO_DTO1
registers to properly enable DP audio for both DCE
revisions.

Signed-off-by: Slava Grigorev <slava.grigorev@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-03-03 17:28:26 -05:00
Christian König
18ad01effe drm/radeon: enable SRBM timeout interrupt on SI
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-02-25 16:06:08 -05:00
Slava Grigorev
a85d682a65 radeon/audio: consolidate audio_set_dto() functions
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Slava Grigorev <slava.grigorev@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-01-22 10:42:10 -05:00
Alex Deucher
d474ea7e52 drm/radeon: fix VM flush on SI (v3)
We need to wait for the GPUVM flush to complete.  There
was some confusion as to how this mechanism was supposed
to work.  The operation is not atomic.  For GPU initiated
invalidations you need to read back a VM register to
introduce enough latency for the update to complete.

v2: drop gart changes
v3: just read back rather than polling

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-01-08 09:36:50 -05:00
Alex Deucher
ff4b4af16f drm/radeon: fix typo in new fan control registers for SI/CI
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-12-03 14:26:45 -05:00
Alex Deucher
39471ad39d drm/radeon/dpm: add smc fan control for SI (v2)
Enable smc fan control for SI boards.  Should
reduce the fan noise on systems with a higher
default fan profile.

v2: disable by default, add rpm controls

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=73338

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-11-20 13:00:09 -05:00
Alex Deucher
f68fdbe425 drm/radeon: fix register name to match internal name
no functional change.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-10-01 09:00:01 -04:00
Dave Airlie
8d4ad9d4bb Merge commit '9e9a928eed8796a0a1aaed7e0b676db86ba84594' into drm-next
Merge drm-fixes into drm-next.

Both i915 and radeon need this done for later patches.

Conflicts:
	drivers/gpu/drm/drm_crtc_helper.c
	drivers/gpu/drm/i915/i915_drv.h
	drivers/gpu/drm/i915/i915_gem.c
	drivers/gpu/drm/i915/i915_gem_execbuffer.c
	drivers/gpu/drm/i915/i915_gem_gtt.c
2014-06-05 20:28:59 +10:00
Christian König
1c89d27fb9 drm/radeon: add proper support for RADEON_VM_BLOCK_SIZE v2
This patch makes it possible to decide how many address
bits are spend on the page directory vs the page tables.

v2: remove unintended change

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-06-02 10:25:03 -04:00
Alex Deucher
4955bb073f drm/radeon: fix register typo on si
Probably a copy paste typo.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
2014-05-20 14:42:04 +02:00
Christian König
d93f79376f drm/radeon: initial VCE support v4
Only VCE 2.0 support so far.

v2: squashing multiple patches into this one
v3: add IRQ support for CIK, major cleanups,
    basic code documentation
v4: remove HAINAN from chipset list

Signed-off-by: Christian König <christian.koenig@amd.com>
2014-02-18 16:11:22 +01:00
Alex Deucher
e9a321c6b2 drm/radeon: fix DAC interrupt handling on DCE5+
DCE5 and newer hardware only has 1 DAC.  Use the correct
offset.  This may fix display problems on certain board
configurations.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2014-01-29 15:23:05 -05:00
Alex Deucher
4a5c8ea59f drm/radeon: implement pci config reset for SI (v2)
pci config reset is a low level reset that resets
the entire chip from the bus interface.  It can
be more reliable if soft reset fails.

v2: hide behind module parameter

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2014-01-08 18:42:24 -05:00
Dave Airlie
91915260ea Merge tag 'drm-intel-fixes-2013-11-07' of git://people.freedesktop.org/~danvet/drm-intel into drm-next
Bit a bit -fixes pull request in the merge window than usual dua to two
feauture-y things:
- Display CRCs are now enabled on all platforms, including the odd DP case
  on gm45/vlv. Since this is a testing-only feature it should ever hurt,
  but I figured it'll help with regression-testing -fixes. So I left it
  in and didn't postpone it to 3.14.
- Display power well refactoring from Imre. Would have caused major pain
  conflict with the bdw stage 1 patches if I'd postpone this to -next.
  It's only an relatively small interface rework, so shouldn't cause pain.
  It's also been in my tree since almost 3 weeks already.

That accounts for about two thirds of the pull, otherwise just bugfixes:
- vlv backlight fix from Jesse/Jani
- vlv vblank timestamp fix from Jesse
- improved edp detection through vbt from Ville (fixes a vlv issue)
- eDP vdd fix from Paulo
- fixes for dvo lvds on i830M
- a few smaller things all over

Note: This contains a backmerge of v3.12. Since the -internal branch
always applied on top of -nightly I need that unified base to merge bdw
patches. So you'll get a conflict with radeon connector props when pulling
this (and nouveau/master will also conflict a bit when Ben doesn't
rebase). The backmerge itself only had conflicts in drm/i915.

There's also a tiny conflict between Jani's backlight fix and your sysfs
lifetime fix in drm-next.

* tag 'drm-intel-fixes-2013-11-07' of git://people.freedesktop.org/~danvet/drm-intel: (940 commits)
  drm/i915/vlv: use per-pipe backlight controls v2
  drm/i915: make backlight functions take a connector
  drm/i915: move opregion asle request handling to a work queue
  drm/i915/vlv: use PIPE_START_VBLANK interrupts on VLV
  drm/i915: Make intel_dp_is_edp() less specific
  drm/i915: Give names to the VBT child device type bits
  drm/i915/vlv: enable HDA display audio for Valleyview2
  drm/i915/dvo: call ->mode_set callback only when the port is running
  drm/i915: avoid unclaimed registers when capturing the error state
  drm/i915: Enable DP port CRC for the "auto" source on g4x/vlv
  drm/i915: scramble reset support for DP port CRC on vlv
  drm/i915: scramble reset support for DP port CRC on g4x
  drm/i916: add "auto" pipe CRC source
  ...

Conflicts:
	MAINTAINERS
	drivers/gpu/drm/i915/intel_panel.c
	drivers/gpu/drm/nouveau/core/subdev/mc/base.c
	drivers/gpu/drm/radeon/atombios_encoders.c
	drivers/gpu/drm/radeon/radeon_connectors.c
2013-11-08 16:34:39 +10:00
Alex Deucher
d5693761b2 drm/radeon/si: fix define for MC_SEQ_TRAIN_WAKEUP_CNTL
Typo in the register offset.

Noticed-by: Sylvain BERTRAND <sylware@legeek.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2013-11-01 15:25:49 -04:00
Alex Deucher
b188025888 drm/radeon/audio: write audio/video latency info for DCE6/8
Needed by the hda driver to properly set up synchronization
on the audio side.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2013-11-01 12:43:20 -04:00
Alex Deucher
aa3e146d04 drm/radeon: fix typo in CP DMA register headers
Wrong bit offset for SRC endian swapping.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2013-10-09 17:13:46 -04:00
Alex Deucher
290d24576c drm/radeon: update line buffer allocation for dce6
We need to allocate line buffer to each display when
setting up the watermarks.  Failure to do so can lead
to a blank screen.  This fixes blank screen problems
on dce6 asics.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=64850

Based on an initial fix from:
Jay Cornwall <jay.cornwall@amd.com>

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2013-08-30 16:31:01 -04:00
Alex Deucher
e16866ecfb drm/radeon/si: restructure cg code (v3)
Resturcture clockgating code so that it can be
enabled/disabled from other components such as
dpm.

v2: make function static
v3: add fine grained cg controls

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30 16:30:49 -04:00
Alex Deucher
b530602fd4 drm/radeon: add audio support for DCE6/8 GPUs (v12)
Similar to DCE4/5, but supports multiple audio pins
which can be assigned per afmt block.

v2: rework the driver to handle more than one audio
pin.
v3: try different dto reg
v4: properly program dto
v5 (ck): change dto programming order
v6: program speaker allocation block
v7: rebase
v8: rebase on Rafał's changes
v9: integrated Rafał's comments, update to latest
    drm_edid_to_speaker_allocation API
v10: add missing line break in error message
v11: add back audio enabled messages
v12: fix copy paste typo in r600_audio_enable

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Rafał Miłecki <zajec5@gmail.com>
2013-08-30 16:30:45 -04:00
Alex Deucher
fbf6dc7ac7 drm/radeon: add fault decode function for SI (v2)
Helpful for debugging GPUVM errors as we can see what
hw block and page generated the fault in the log.

v2: simplify fault decoding

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2013-07-14 10:11:29 -04:00
Alex Deucher
7982128c3d drm/radeon/dpm: add debugfs support for SI
This allows you to look at the current DPM state via
debugfs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-07-01 16:09:06 -04:00
Alex Deucher
a9e6141092 drm/radeon/kms: add dpm support for SI (v7)
This adds dpm support for SI asics.  This includes:
- dynamic engine clock scaling
- dynamic memory clock scaling
- dynamic voltage scaling
- dynamic pcie gen1/gen2/gen3 switching
- power containment
- shader power scaling

Set radeon.dpm=1 to enable.

v2: enable hainan support, rebase
v3: guard acpi stuff
v4: fix 64 bit math
v5: fix 64 bit div harder
v6: fix thermal interrupt check noticed by Jerome
v7: attempt fix state enable

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27 19:40:05 -04:00
Alex Deucher
9ed36f7505 drm/radeon: minor sid.h cleanup
Consolidate the non-register defines.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27 19:16:36 -04:00
Alex Deucher
f8f84ac5d4 drm/radeon: implement clock and power gating for SI
Only Cape Verde supports power gating.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27 19:16:32 -04:00
Alex Deucher
d719cef316 drm/radeon: update rlc programming sequence on SI
This is required for certain power management features.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27 19:16:29 -04:00
Alex Deucher
e0bcf1654d drm/radeon: add support for ASPM on SI asics (v2)
Enables PCIE ASPM (Active State Power Management) on
SI asics.

v2: fix typo

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27 19:16:27 -04:00
Alex Deucher
b9d305dfb6 drm/radeon: implement pcie gen2/3 support for SI
If both the motherboard and GPU support pcie gen2 or 3,
enable it.  PCIE gen2 and 3 offer more bandwidth than
pcie gen1.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27 19:16:25 -04:00
Alex Deucher
8b02859d77 drm/radeon: fill in GPU init for Hainan (v2)
v2: fix gb_addr_config value

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-05-20 11:13:07 -04:00
Christian König
092fbc4ca2 drm/radeon: fix UPLL_REF_DIV_MASK definition
Stupid copy & paste error over all generations.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-05-02 10:09:48 -04:00
Christian König
9a21059dc4 drm/radeon: add UVD tiling addr config v2
v2: set UVD tiling config for rv730

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2013-04-09 10:31:39 -04:00
Christian König
2539eb02de drm/radeon: add set_uvd_clocks callback for SI
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-04-09 10:31:37 -04:00
Christian König
f2ba57b5ea drm/radeon: UVD bringup v8
Just everything needed to decode videos using UVD.

v6: just all the bugfixes and support for R7xx-SI merged in one patch
v7: UVD_CGC_GATE is a write only register, lockup detection fix
v8: split out VRAM fallback changes, remove support for RV770,
    add support for HEMLOCK, add buffer sizes checks

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-04-09 10:31:33 -04:00
Alex Deucher
7c1c7c18fc drm/radeon/dce6: add missing display reg for tiling setup
A new tiling config register for the display blocks was
added on DCE6.

May fix:
https://bugs.freedesktop.org/show_bug.cgi?id=62889
https://bugs.freedesktop.org/show_bug.cgi?id=57919

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2013-04-09 10:23:50 -04:00
Alex Deucher
454d2e2a32 drm/radeon: add a asic callback to get the xclk
This is required to get the reference clock used
by the gfx engine for things like timestamps. Fixes
support for GL extensions the use timestamps on
certain boards.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-02-20 08:51:20 -05:00
Alex Deucher
014bb20921 drm/radeon: use status regs to determine what to reset (si)
When we attempt the reset the GPU, look at the status registers
to determine what blocks need to be reset.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-01-31 16:24:54 -05:00
Ilija Hadzic
4e872ae2bb drm/radeon: consolidate redundant macros and constants
After refactoring the _cs logic, we ended up with many
macros and constants that #define the same thing.
Clean'em up.

Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-01-31 16:24:46 -05:00
Jerome Glisse
64c56e8ce3 drm/radeon: reset dma engine on gpu reset (v2)
This try to reset the dma engine when performing gpu reset. Hopefully
bringing back the gpu dma engine in sane state.

v2: agd5f: fix dma reset on cayman/TN, add support for SI

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-01-03 13:18:41 -05:00
Jerome Glisse
eaaa6983ab drm/radeon: print dma status reg on lockup (v2)
To help debug dma related lockup.

v2: agd5f: update SI as well

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-01-03 13:18:41 -05:00
Alex Deucher
b997a8ba26 drm/radeon: add register headers for CP DMA on r6xx-SI
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-12-12 17:16:48 -05:00
Alex Deucher
deab48f140 drm/radeon: add dma engine support for vm pt updates on si (v2)
Async DMA has a special packet for contiguous pt updates
which saves overhead.

v2: rebase

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-12-10 17:21:42 -05:00
Alex Deucher
8c5fd7efcc drm/radeon/kms: Add initial support for async DMA on SI
Pretty much the same as cayman.  Some changes to the copy
packets.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-12-10 16:53:41 -05:00
Christian König
ae133a1129 drm/radeon: stop page faults from hanging the system (v2)
Redirect invalid memory accesses to the default page
instead of locking up the memory controller. Also
enable the invalid memory access interrupts and
start spamming system log with it.

v2 (agd5f): fix up against 2 level PT changes

Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2012-12-07 19:48:06 -05:00
Alex Deucher
f418b88aad drm/radeon/si: add some missing regs to the VM reg checker
This register is needed for streamout to work properly.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2012-11-08 10:24:19 -05:00
Alex Deucher
76c44f2c0d drm/radeon: use WRITE_DATA packets for vm flush on SI
This is the preferred packet for writing data to memory
or registers on SI.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-10-02 14:39:18 -04:00
Marek Olšák
6759a0a7a0 drm/radeon/kms: implement timestamp userspace query (v2)
Returns a snapshot of the GPU clock counter.  Needed
for certain OpenGL extensions.

v2: agd5f
- address Jerome's comments
- add function documentation

Signed-off-by: Marek Olšák <maraeo@gmail.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2012-08-13 10:50:56 -04:00
Alex Deucher
a85a7da4c5 drm/radeon: update ib_execute for SI (v2)
When submitting a CONST_IB, emit a SWITCH_BUFFER
packet before the CONST_IB.  This isn't strictly necessary
(the driver will work fine without it), but is good practice
and allows for more flexible DE/CE sychronization options
in the future.  Current userspace drivers do not take
advantage of the CE yet.

v2: - clean up code flow a bit
    - no need to flush caches for CONST IB

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2012-07-18 13:33:39 +02:00
Alex Deucher
1a8ca7502c drm/radeon: fix gpu_init on si
- Properly set up the RBs
- Properly set up the SPI
- Properly set up gb_addr_config

This should fix rendering issues on certain cards.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-06-05 09:25:54 +01:00
Alex Deucher
25a857fbe9 drm/radeon/kms: add support for interrupts on SI
This is mostly identical to evergreen/ni, however
there are some additional fields in the IV vector
for RINGID and VMID.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:54 +00:00
Alex Deucher
347e7592be drm/radeon/kms: Add support for RLC init on SI
RLC handles the interrupt controller and other tasks
on the GPU.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2012-03-21 06:55:54 +00:00