Commit Graph

20 Commits

Author SHA1 Message Date
John Youn
ec791d149b usb: dwc3: Add dis_enblslpm_quirk
Add a quirk to clear the GUSB2PHYCFG.ENBLSLPM bit, which controls
whether the PHY receives the suspend signal from the controller.

Cc: <stable@vger.kernel.org> # v3.18+
Signed-off-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-10-09 16:06:59 -05:00
Nikhil Badola
db2be4e9e3 usb: dwc3: Add frame length adjustment quirk
Add adjust_frame_length_quirk for writing to fladj register
which adjusts (micro)frame length to value provided by
"snps,quirk-frame-length-adjustment" property thus avoiding
USB 2.0 devices to time-out over a longer run

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-09-27 10:54:31 -05:00
Heikki Krogerus
3e10a2ce98 usb: dwc3: add hsphy_interface property
Platforms that have configured DWC_USB3_HSPHY_INTERFACE with
value 3, i.e. UTMI+ and ULPI, need to inform the driver of
the actual HSPHY interface type with the property. "utmi" if
the interface is UTMI+ or "ulpi" if the interface is ULPI.

Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Acked-by: David Cohen <david.a.cohen@linux.intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-05-13 12:06:42 -05:00
Robert Baldyga
eac68e8f97 usb: dwc3: make LPM configurable in DT
This patch removes "Enable USB3 LPM Capability" option from Kconfig
and adds snps,usb3_lpm_capable devicetree property instead of it.

USB3 LPM (Link Power Management) capability is hardware property, and
it's platform dependent, so if our hardware supports this feature, we
want rather to configure it in devicetree than having it as Kconfig option.

Signed-off-by: Robert Baldyga <r.baldyga@samsung.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2015-03-10 15:33:33 -05:00
Huang Rui
460d098cb6 usb: dwc3: make HIRD threshold configurable
HIRD threshold should be configurable by different platforms.

From DesignWare databook:
When HIRD_Threshold[4] is set to 1b1 and HIRD value is greater than or
equal to the value in HIRD_Threshold[3:0], dwc3 asserts output signals
utmi_l1_suspend_n to put PHY into Deep Low-Power mode in L1.

When HIRD_Threshold[4] is set to 1b0 or the HIRD value is less than
HIRD_Threshold[3:0], dwc3 asserts output signals utmi_sleep_n on L1.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03 10:03:41 -06:00
Huang Rui
0effe0a3e7 usb: dwc3: add disable usb2 suspend phy quirk
This patch adds disable usb2 suspend phy quirk, and some special platforms
can configure that if it is needed.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03 10:03:39 -06:00
Huang Rui
59acfa2081 usb: dwc3: add disable usb3 suspend phy quirk
This patch adds disable usb3 suspend phy quirk, and some special platforms
can configure that if it is needed.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03 10:03:39 -06:00
Huang Rui
6b6a0c9a3f usb: dwc3: add Tx de-emphasis quirk
This patch adds Tx de-emphasis quirk, and the Tx de-emphasis value is
configurable according to PIPE3 specification.

Value		Description
0		-6dB de-emphasis
1		-3.5dB de-emphasis
2		No de-emphasis
3		Reserved

It can be configured on DT or platform data.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03 10:03:39 -06:00
Huang Rui
14f4ac53df usb: dwc3: add rx_detect to polling lfps quirk
This patch adds RX_DETECT to Polling.LFPS control quirk, and some special
platforms can configure that if it is needed.

[ balbi@ti.com : added DeviceTree binding documentation ]

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03 10:03:38 -06:00
Huang Rui
fb67afca17 usb: dwc3: add lfps filter quirk
This patch adds LFPS filter quirk, and some special platforms can configure
that if it is needed.

[ balbi@ti.com : added DeviceTree binding documentation ]

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03 10:03:38 -06:00
Huang Rui
41c06ffdf9 usb: dwc3: add delay phy power change quirk
This patch adds delay PHY power change from P0 to P1/P2/P3 when link state
changing from U0 to U1/U2/U3 respectively, and some special platforms can
configure that if it is needed.

[ balbi@ti.com : added DeviceTree binding documentation ]

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03 10:03:37 -06:00
Huang Rui
a2a1d0f583 usb: dwc3: add delay p1p2p3 quirk
This patch adds delay P0 to P1/P2/P3 quirk for U2/U2/U3, and some special
platforms can configure that if it is needed.

[ balbi@ti.com : added DeviceTree binding documentation ]

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03 10:03:37 -06:00
Huang Rui
df31f5b3a6 usb: dwc3: add request p1p2p3 quirk
This patch adds request P1/P2/P3 quirk for U2/U2/U3, and some special
platforms can configure that if it is needed.

[ balbi@ti.com : added DeviceTree binding documentation ]

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03 10:03:37 -06:00
Huang Rui
b5a65c4063 usb: dwc3: add P3 in U2 SS inactive quirk
This patch adds P3 in U2 SS inactive quirk, and some special platforms can
configure that if it is needed.

[ balbi@ti.com : added DeviceTree binding documentation ]

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03 10:03:36 -06:00
Huang Rui
9a5b2f3167 usb: dwc3: add u2exit lfps quirk
This patch adds u2exit lfps quirk, and some special platforms can configure
that if it is needed.

[ balbi@ti.com : added DeviceTree binding documentation ]

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03 10:03:36 -06:00
Huang Rui
80caf7d21a usb: dwc3: add lpm erratum support
When parameter DWC_USB3_LPM_ERRATA_ENABLE is enabled in Andvanced
Configuration of coreConsultant, it supports of xHCI BESL Errata Dated
10/19/2011 is enabled in host mode. In device mode it adds the capability
to send NYET response threshold based on the BESL value received in the LPM
token, and the threhold is configurable for each soc platform.

This patch adds an entry that soc platform is able to define the lpm
capacity with their own device tree or bus glue layer.

[ balbi@ti.com : added devicetree documentation, spelled threshold
		completely, made sure threshold is only applied to
		proper core revisions. ]

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03 10:03:36 -06:00
Huang Rui
3b81221a52 usb: dwc3: add disscramble quirk
This patch adds disscramble quirk, and it only needs to be enabled at fpga
board on some vendor platforms.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-03 10:03:36 -06:00
Ruchika Kharwar
a45c82b84c usb: dwc3: adapt to use dr_mode device tree helper
This patch adapts the dwc3 to use the device tree helper
"of_usb_get_dr_mode" for the mode of operation of the dwc3 instance
being probed.

[ balbi@ti.com : make of_usb_get_dr_mode() conditional on
	dev->of_node and let pdata pass dr_mode too ]

Reviewed-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Ruchika Kharwar <ruchika@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-07-29 13:56:51 +03:00
Felipe Balbi
f7e846f095 usb: dwc3: make maximum-speed a per-instance attribute
in order to allow different instances of the
core work in different maximum speeds, we will
move the maximum_speed module_parameter to
both DeviceTree (making use the new maximum-speed
DT property) and platform_data.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-07-29 13:56:47 +03:00
Felipe Balbi
6462cbd54d usb: dwc3: let non-DT platforms pass tx-fifo-resize flag;
in case we're not in a DT boot, we should
still be able to tell the driver how to behave.

In order to be able to pass flags to the driver,
we introduce platform_data structure which the
core driver should use.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2013-07-29 13:56:46 +03:00