These two bits are merged at the external interface level for the
IRQ, Interrupt, and GpioInt resource descriptors. However, these
bits are logically independent and there is no need to keep them
merged internally. Therefore, this change splits the bits into
"sharable" and "wake capable" fields within the resource manager.
This simplifies drive code that needs to examine these bits.
Aaron Lu, Bob Moore.
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Update all copyrights to 2012.
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Lin Ming <ming.m.lin@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
FixedDMA, GPIO descriptors, SerialBus descriptors
Signed-off-by: Lin Ming <ming.m.lin@intel.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
