More multiplatform enablement for ARM platforms. The ones converted in
this branch are:
- bcm2835
- cns3xxx
- sirf
- nomadik
- msx
- spear
- tegra
- ux500
We're getting close to having most of them converted!
One of the larger platforms remaining is Samsung Exynos, and there are
a bunch of supporting patches in this merge window for it. There was a
patch in this branch to a early version of multiplatform conversion,
but it ended up being reverted due to need of more bake time. The
revert commit is part of the branch since it would have required
rebasing multiple dependent branches and they were stable by then.
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Merge tag 'multiplatform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC multiplatform updates from Olof Johansson:
"More multiplatform enablement for ARM platforms. The ones converted
in this branch are:
- bcm2835
- cns3xxx
- sirf
- nomadik
- msx
- spear
- tegra
- ux500
We're getting close to having most of them converted!
One of the larger platforms remaining is Samsung Exynos, and there are
a bunch of supporting patches in this merge window for it. There was
a patch in this branch to a early version of multiplatform conversion,
but it ended up being reverted due to need of more bake time. The
revert commit is part of the branch since it would have required
rebasing multiple dependent branches and they were stable by then"
* tag 'multiplatform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (70 commits)
mmc: sdhci-s3c: Fix operation on non-single image Samsung platforms
clocksource: nomadik-mtu: fix up clocksource/timer
Revert "ARM: exynos: enable multiplatform support"
ARM: SPEAr13xx: Fix typo "ARCH_HAVE_CPUFREQ"
ARM: exynos: enable multiplatform support
rtc: s3c: make header file local
mtd: onenand/samsung: make regs-onenand.h file local
thermal/exynos: remove unnecessary header inclusions
mmc: sdhci-s3c: remove platform dependencies
ARM: samsung: move mfc device definition to s5p-dev-mfc.c
ARM: exynos: move debug-macro.S to include/debug/
ARM: exynos: prepare for sparse IRQ
ARM: exynos: introduce EXYNOS_ATAGS symbol
ARM: tegra: build assembly files with -march=armv7-a
ARM: Push selects for TWD/SCU into machine entries
ARM: ux500: build hotplug.o for ARMv7-a
ARM: ux500: move to multiplatform
ARM: ux500: make remaining headers local
ARM: ux500: make irqs.h local to platform
ARM: ux500: get rid of <mach/[hardware|db8500-regs].h>
...
Here is a collection of cleanup patches. Among the pieces that stand out are:
- The deletion of h720x platforms
- Split of at91 non-dt platforms to their own Kconfig file to keep them separate
- General cleanups and refactoring of i.MX and MXS platforms
- Some restructuring of clock tables for OMAP
- Convertion of PMC driver for Tegra to dt-only
- Some renames of sunxi -> sun4i (Allwinner A10)
- ... plus a bunch of other stuff that I haven't mentioned
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Merge tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanup from Olof Johansson:
"Here is a collection of cleanup patches. Among the pieces that stand
out are:
- The deletion of h720x platforms
- Split of at91 non-dt platforms to their own Kconfig file to keep
them separate
- General cleanups and refactoring of i.MX and MXS platforms
- Some restructuring of clock tables for OMAP
- Convertion of PMC driver for Tegra to dt-only
- Some renames of sunxi -> sun4i (Allwinner A10)
- ... plus a bunch of other stuff that I haven't mentioned"
* tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (119 commits)
ARM: i.MX: remove unused ARCH_* configs
ARM i.MX53: remove platform ahci support
ARM: sunxi: Rework the restart code
irqchip: sunxi: Rename sunxi to sun4i
irqchip: sunxi: Make use of the IRQCHIP_DECLARE macro
clocksource: sunxi: Rename sunxi to sun4i
clocksource: sunxi: make use of CLKSRC_OF
clocksource: sunxi: Cleanup the timer code
ARM: at91: remove trailing semicolon from macros
ARM: at91/setup: fix trivial typos
ARM: EXYNOS: remove "config EXYNOS_DEV_DRM"
ARM: EXYNOS: change the name of USB ohci header
ARM: SAMSUNG: Remove unnecessary code for dma
ARM: S3C24XX: Remove unused GPIO drive strength register definitions
ARM: OMAP4+: PM: Restore CPU power state to ON with clockdomain force wakeup method
ARM: S3C24XX: Removed unneeded dependency on CPU_S3C2412
ARM: S3C24XX: Removed unneeded dependency on CPU_S3C2410
ARM: S3C24XX: Removed unneeded dependency on ARCH_S3C24XX for boards
ARM: SAMSUNG: Fix typo "CONFIG_SAMSUNG_DEV_RTC"
ARM: S5P64X0: Fix typo "CONFIG_S5P64X0_SETUP_SDHCI"
...
Pull compat cleanup from Al Viro:
"Mostly about syscall wrappers this time; there will be another pile
with patches in the same general area from various people, but I'd
rather push those after both that and vfs.git pile are in."
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal:
syscalls.h: slightly reduce the jungles of macros
get rid of union semop in sys_semctl(2) arguments
make do_mremap() static
sparc: no need to sign-extend in sync_file_range() wrapper
ppc compat wrappers for add_key(2) and request_key(2) are pointless
x86: trim sys_ia32.h
x86: sys32_kill and sys32_mprotect are pointless
get rid of compat_sys_semctl() and friends in case of ARCH_WANT_OLD_COMPAT_IPC
merge compat sys_ipc instances
consolidate compat lookup_dcookie()
convert vmsplice to COMPAT_SYSCALL_DEFINE
switch getrusage() to COMPAT_SYSCALL_DEFINE
switch epoll_pwait to COMPAT_SYSCALL_DEFINE
convert sendfile{,64} to COMPAT_SYSCALL_DEFINE
switch signalfd{,4}() to COMPAT_SYSCALL_DEFINE
make SYSCALL_DEFINE<n>-generated wrappers do asmlinkage_protect
make HAVE_SYSCALL_WRAPPERS unconditional
consolidate cond_syscall and SYSCALL_ALIAS declarations
teach SYSCALL_DEFINE<n> how to deal with long long/unsigned long long
get rid of duplicate logics in __SC_....[1-6] definitions
Pull SMP/hotplug changes from Ingo Molnar:
"This is a pretty large, multi-arch series unifying and generalizing
the various disjunct pieces of idle routines that architectures have
historically copied from each other and have grown in random, wildly
inconsistent and sometimes buggy directions:
101 files changed, 455 insertions(+), 1328 deletions(-)
this went through a number of review and test iterations before it was
committed, it was tested on various architectures, was exposed to
linux-next for quite some time - nevertheless it might cause problems
on architectures that don't read the mailing lists and don't regularly
test linux-next.
This cat herding excercise was motivated by the -rt kernel, and was
brought to you by Thomas "the Whip" Gleixner."
* 'smp-hotplug-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (40 commits)
idle: Remove GENERIC_IDLE_LOOP config switch
um: Use generic idle loop
ia64: Make sure interrupts enabled when we "safe_halt()"
sparc: Use generic idle loop
idle: Remove unused ARCH_HAS_DEFAULT_IDLE
bfin: Fix typo in arch_cpu_idle()
xtensa: Use generic idle loop
x86: Use generic idle loop
unicore: Use generic idle loop
tile: Use generic idle loop
tile: Enter idle with preemption disabled
sh: Use generic idle loop
score: Use generic idle loop
s390: Use generic idle loop
powerpc: Use generic idle loop
parisc: Use generic idle loop
openrisc: Use generic idle loop
mn10300: Use generic idle loop
mips: Use generic idle loop
microblaze: Use generic idle loop
...
ARM processors with LPAE enabled use 3 levels of page tables, with an
entry in the top level (pgd) covering 1GB of virtual space. Because of
the branch relocation limitations on ARM, the loadable modules are
mapped 16MB below PAGE_OFFSET, making the corresponding 1GB pgd shared
between kernel modules and user space.
If free_pgtables() is called with the default ceiling 0,
free_pgd_range() (and subsequently called functions) also frees the page
table shared between user space and kernel modules (which is normally
handled by the ARM-specific pgd_free() function). This patch changes
defines the ARM USER_PGTABLES_CEILING to TASK_SIZE when CONFIG_ARM_LPAE
is enabled.
Note that the pgd_free() function already checks the presence of the
shared pmd page allocated by pgd_alloc() and frees it, though with
ceiling 0 this wasn't necessary.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Hugh Dickins <hughd@google.com>
Cc: <stable@vger.kernel.org> [3.3+]
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
We use the vfp_host pointer to store the host VFP context, should
the guest start using VFP itself.
Actually, we can use this pointer in a more generic way to store
CPU speficic data, and arm64 is using it to dump the whole host
state before switching to the guest.
Simply rename the vfp_host field to host_cpu_context, and the
corresponding type to kvm_cpu_context_t. No change in functionnality.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
Most of the capabilities are common to both arm and arm64, but
we still need to handle the exceptions.
Introduce kvm_arch_dev_ioctl_check_extension, which both architectures
implement (in the 32bit case, it just returns 0).
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
Now that we have the necessary infrastructure to boot a hotplugged CPU
at any point in time, wire a CPU notifier that will perform the HYP
init for the incoming CPU.
Note that this depends on the platform code and/or firmware to boot the
incoming CPU with HYP mode enabled and return to the kernel by following
the normal boot path (HYP stub installed).
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
Our HYP init code suffers from two major design issues:
- it cannot support CPU hotplug, as we tear down the idmap very early
- it cannot perform a TLB invalidation when switching from init to
runtime mappings, as pages are manipulated from PL1 exclusively
The hotplug problem mandates that we keep two sets of page tables
(boot and runtime). The TLB problem mandates that we're able to
transition from one PGD to another while in HYP, invalidating the TLBs
in the process.
To be able to do this, we need to share a page between the two page
tables. A page that will have the same VA in both configurations. All we
need is a VA that has the following properties:
- This VA can't be used to represent a kernel mapping.
- This VA will not conflict with the physical address of the kernel text
The vectors page seems to satisfy this requirement:
- The kernel never maps anything else there
- The kernel text being copied at the beginning of the physical memory,
it is unlikely to use the last 64kB (I doubt we'll ever support KVM
on a system with something like 4MB of RAM, but patches are very
welcome).
Let's call this VA the trampoline VA.
Now, we map our init page at 3 locations:
- idmap in the boot pgd
- trampoline VA in the boot pgd
- trampoline VA in the runtime pgd
The init scenario is now the following:
- We jump in HYP with four parameters: boot HYP pgd, runtime HYP pgd,
runtime stack, runtime vectors
- Enable the MMU with the boot pgd
- Jump to a target into the trampoline page (remember, this is the same
physical page!)
- Now switch to the runtime pgd (same VA, and still the same physical
page!)
- Invalidate TLBs
- Set stack and vectors
- Profit! (or eret, if you only care about the code).
Note that we keep the boot mapping permanently (it is not strictly an
idmap anymore) to allow for CPU hotplug in later patches.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
There is no point in freeing HYP page tables differently from Stage-2.
They now have the same requirements, and should be dealt with the same way.
Promote unmap_stage2_range to be The One True Way, and get rid of a number
of nasty bugs in the process (good thing we never actually called free_hyp_pmds
before...).
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
After the HYP page table rework, it is pretty easy to let the KVM
code provide its own idmap, rather than expecting the kernel to
provide it. It takes actually less code to do so.
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
In order to be able to correctly profile what is happening on the
host, we need to be able to identify when we're running on the guest,
and log these events differently.
Perf offers a simple way to register callbacks into KVM. Mimic what
x86 does and enjoy being able to profile your KVM host.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
Merging in fixes since there's a conflict in the omap4 clock tables caused by
it.
* fixes: (245 commits)
ARM: highbank: fix cache flush ordering for cpu hotplug
ARM: OMAP4: hwmod data: make 'ocp2scp_usb_phy_phy_48m" as the main clock
arm: mvebu: Fix the irq map function in SMP mode
Fix GE0/GE1 init on ix2-200 as GE0 has no PHY
ARM: S3C24XX: Fix interrupt pending register offset of the EINT controller
ARM: S3C24XX: Correct NR_IRQS definition for s3c2440
ARM i.MX6: Fix ldb_di clock selection
ARM: imx: provide twd clock lookup from device tree
ARM: imx35 Bugfix admux clock
ARM: clk-imx35: Bugfix iomux clock
+ Linux 3.9-rc6
Signed-off-by: Olof Johansson <olof@lixom.net>
Conflicts:
arch/arm/mach-omap2/cclock44xx_data.c
ARM processors with LPAE enabled use 3 levels of page tables, with an
entry in the top level (pgd) covering 1GB of virtual space. Because of
the branch relocation limitations on ARM, the loadable modules are
mapped 16MB below PAGE_OFFSET, making the corresponding 1GB pgd shared
between kernel modules and user space.
If free_pgtables() is called with the default ceiling 0,
free_pgd_range() (and subsequently called functions) also frees the page
table shared between user space and kernel modules (which is normally
handled by the ARM-specific pgd_free() function). This patch changes
defines the ARM USER_PGTABLES_CEILING to TASK_SIZE when CONFIG_ARM_LPAE
is enabled.
Note that the pgd_free() function already checks the presence of the
shared pmd page allocated by pgd_alloc() and frees it, though with
ceiling 0 this wasn't necessary.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Hugh Dickins <hughd@google.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: <stable@vger.kernel.org> # 3.3+
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This provides helper methods to coordinate between CPUs coming down
and CPUs going up, as well as documentation on the used algorithms,
so that cluster teardown and setup
operations are not done for a cluster simultaneously.
For use in the power_down() implementation:
* __mcpm_cpu_going_down(unsigned int cluster, unsigned int cpu)
* __mcpm_outbound_enter_critical(unsigned int cluster)
* __mcpm_outbound_leave_critical(unsigned int cluster)
* __mcpm_cpu_down(unsigned int cluster, unsigned int cpu)
The power_up_setup() helper should do platform-specific setup in
preparation for turning the CPU on, such as invalidating local caches
or entering coherency. It must be assembler for now, since it must
run before the MMU can be switched on. It is passed the affinity level
for which initialization should be performed.
Because the mcpm_sync_struct content is looked-up and modified
with the cache enabled or disabled depending on the code path, it is
crucial to always ensure proper cache maintenance to update main memory
right away. The sync_cache_*() helpers are used to that end.
Also, in order to prevent a cached writer from interfering with an
adjacent non-cached writer, we ensure each state variable is located to
a separate cache line.
Thanks to Nicolas Pitre and Achin Gupta for the help with this
patch.
Signed-off-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Reviewed-by: Will Deacon <will.deacon@arm.com>
This is the basic API used to handle the powering up/down of individual
CPUs in a (multi-)cluster system. The platform specific backend
implementation has the responsibility to also handle the cluster level
power as well when the first/last CPU in a cluster is brought up/down.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
CPUs in cluster based systems, such as big.LITTLE, have special needs
when entering the kernel due to a hotplug event, or when resuming from
a deep sleep mode.
This is vectorized so multiple CPUs can enter the kernel in parallel
without serialization.
The mcpm prefix stands for "multi cluster power management", however
this is usable on single cluster systems as well. Only the basic
structure is introduced here. This will be extended with later patches.
In order not to complexify things more than they currently have to,
the planned work to make runtime adjusted MPIDR based indexing and
dynamic memory allocation for cluster states is postponed to a later
cycle. The MAX_NR_CLUSTERS and MAX_CPUS_PER_CLUSTER static definitions
should be sufficient for those systems expected to be available in the
near future.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
Algorithms used by the MCPM layer rely on state variables which are
accessed while the cache is either active or inactive, depending
on the code path and the active state.
This patch introduces generic cache maintenance helpers to provide the
necessary cache synchronization for such state variables to always hit
main memory in an ordered way.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Dave Martin <dave.martin@linaro.org>
Pull ARM fixes from Russell King:
"A set of fixes from various people - Will Deacon gets a prize for
removing code this time around. The biggest fix in this lot is
sorting out the ARM740T mess. The rest are relatively small fixes."
* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
ARM: 7699/1: sched_clock: Add more notrace to prevent recursion
ARM: 7698/1: perf: fix group validation when using enable_on_exec
ARM: 7697/1: hw_breakpoint: do not use __cpuinitdata for dbg_cpu_pm_nb
ARM: 7696/1: Fix kexec by setting outer_cache.inv_all for Feroceon
ARM: 7694/1: ARM, TCM: initialize TCM in paging_init(), instead of setup_arch()
ARM: 7692/1: iop3xx: move IOP3XX_PERIPHERAL_VIRT_BASE
ARM: modules: don't export cpu_set_pte_ext when !MMU
ARM: mm: remove broken condition check for v4 flushing
ARM: mm: fix numerous hideous errors in proc-arm740.S
ARM: cache: remove ARMv3 support code
ARM: tlbflush: remove ARMv3 support
These patches get us closer to adding multiplatform support on
the Exynos platform, they are part of a longer series of
patches. This would get all the simple stuff out of the
way, and I don't think there is a big risk of introducing
regressions with these.
A lot of the other patches have already been merged into
subsystem trees. After this series in in arm-soc, what is
left comes down to
* The ASoC conversion to dmaengine won't make it unless someone
who knows that code better steps up to do it right away. This
means that we won't have audio in a 3.10 multiplatform kernel
on Exynos, but it will still work for users that don't enable
multiplatform.
* The irqchip (combiner), clk and clksource patches are all based
on top of other changesets we pulled in from your trees, so I
would not make them part of the next/multiplatform branch. We can
apply them on top of the next/drivers branch once they are
tested successfully.
* A trivial patch is needed in the end to actually make
CONFIG_ARCH_EXYNOS visible in multiplatform configurations.
We will do that as a separate patch once everything else is
there.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The move is necessary to support early debug output on exynos
with multiplatform configurations. This implies also moving the
plat/debug-macro.S file, but we are leaving the remaining users of that
file in place, to avoid adding large numbers of extra configuration
options to Kconfig.debug
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- use the mvebu-mbus driver
- prep for LPAE support
Depends:
- mvebu/cleanup (tags/cleanup_for_v3.10)
- mvebu/drivers (tags/drivers_for_v3.10)
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Merge tag 'soc_for_v3.10' of git://git.infradead.org/users/jcooper/linux into next/soc2
From Jason Cooper:
mvebu soc changes for v3.10
- use the mvebu-mbus driver
- prep for LPAE support
Depends:
- mvebu/cleanup (tags/cleanup_for_v3.10)
- mvebu/drivers (tags/drivers_for_v3.10)
* tag 'soc_for_v3.10' of git://git.infradead.org/users/jcooper/linux:
ARM: mvebu: Align the internal registers virtual base to support LPAE
ARM: mvebu: Limit the DMA zone when LPAE is selected
arm: plat-orion: remove addr-map code
arm: mach-mv78xx0: convert to use the mvebu-mbus driver
arm: mach-orion5x: convert to use mvebu-mbus driver
arm: mach-dove: convert to use mvebu-mbus driver
arm: mach-kirkwood: convert to use mvebu-mbus driver
arm: mach-mvebu: convert to use mvebu-mbus driver
bus: mvebu: fix mistake in PCIe window target attribute for Kirkwood
bus: mvebu-mbus: Restore checking for coherency fabric hardware
ARM: Orion: add dbg_show function to gpio-orion driver
bus: introduce an Marvell EBU MBus driver
arm: mach-orion5x: use mv_mbus_dram_info() in PCI code
arm: plat-orion: use mv_mbus_dram_info() in PCIe code
arm: plat-orion: only build addr-map.c when needed
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch adds the base support for the ARMv7-M
architecture. It consists of the corresponding arch/arm/mm/ files and
various #ifdef's around the kernel. Exception handling is implemented by
a subsequent patch.
[ukleinek: squash in some changes originating from commit
b5717ba (Cortex-M3: Add support for the Microcontroller Prototyping System)
from the v2.6.33-arm1 patch stack, port to post 3.6, drop zImage
support, drop reorganisation of pt_regs, assert CONFIG_CPU_V7M doesn't
leak into installed headers and a few cosmetic changes]
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Jonathan Austin <jonathan.austin@arm.com>
Tested-by: Jonathan Austin <jonathan.austin@arm.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
the following changes:
- Add sched_clock selection logic to select the highest frequency clock
- Use full 64-bit arch timer counter for sched_clock
- Convert arch timer, sp804 and integrator-cp timers to CLKSRC_OF and
adapt all users to use clocksource_of_init
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Merge tag 'clksrc-cleanup-for-3.10-part2' of git://sources.calxeda.com/kernel/linux into late/clksrc
This is the 2nd part of ARM timer clean-ups for 3.10. This series has
the following changes:
- Add sched_clock selection logic to select the highest frequency clock
- Use full 64-bit arch timer counter for sched_clock
- Convert arch timer, sp804 and integrator-cp timers to CLKSRC_OF and
adapt all users to use clocksource_of_init
* tag 'clksrc-cleanup-for-3.10-part2' of git://sources.calxeda.com/kernel/linux:
devtree: add binding documentation for sp804
ARM: integrator-cp: convert use CLKSRC_OF for timer init
ARM: versatile: use OF init for sp804 timer
ARM: versatile: add versatile dtbs to dtbs target
ARM: vexpress: remove extra timer-sp control register clearing
ARM: dts: vexpress: disable CA9 core tile sp804 timer
ARM: vexpress: remove sp804 OF init
ARM: highbank: use OF init for sp804 timer
ARM: timer-sp: convert to use CLKSRC_OF init
OF: add empty of_device_is_available for !OF
ARM: convert arm/arm64 arch timer to use CLKSRC_OF init
ARM: make machine_desc->init_time default to clocksource_of_init
ARM: arch_timer: use full 64-bit counter for sched_clock
ARM: make sched_clock just call a function pointer
ARM: sched_clock: allow changing to higher frequency counter
Signed-off-by: Olof Johansson <olof@lixom.net>
This has a nasty set of conflicts with the exynos MCT code, which was
moved in a separate branch, and then fixed up when merged in, but still
conflicts a bit here. It should have been sorted out by this merge though.
Looks like our L_PTE_S2_RDWR definition is slightly wrong,
and is actually write only (see ARM ARM Table B3-9, Stage 2 control
of access permissions). Didn't make a difference for normal pages,
as we OR the flags together, but I'm still wondering how it worked
for Stage-2 mapped devices, such as the GIC.
Brown paper bag time, again.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
In order to be able to support the LPAE, the internal registers
virtual base must be aligned to 2MB. In LPAE section size is 2MB, in
earlyprintk we map the internal registers and it must be section
aligned.
Signed-off-by: Lior Amsalem <alior@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
* Enable anatop, well bisa and RBC for suspend to optimize the power
consumption a little bit
* Clock changes for TVE, LDB, PATA, SRTC support
* Add System Reset Controller (SRC) support for imx5 and imx6
* Add initial imx6dl support based on imx6q code
* Kconfig for cpufreq-cpu0, defconfig updates and few other changes
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Merge tag 'imx-soc-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc2
From Shawn Guo:
The imx soc changes for 3.10:
* Enable anatop, well bisa and RBC for suspend to optimize the power
consumption a little bit
* Clock changes for TVE, LDB, PATA, SRTC support
* Add System Reset Controller (SRC) support for imx5 and imx6
* Add initial imx6dl support based on imx6q code
* Kconfig for cpufreq-cpu0, defconfig updates and few other changes
* tag 'imx-soc-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6: (275 commits)
ARM i.MX53: set CLK_SET_RATE_PARENT flag on the tve_ext_sel clock
ARM i.MX53: tve_di clock is not part of the CCM, but of TVE
ARM i.MX53: make tve_ext_sel propagate rate change to PLL
ARM i.MX53: Remove unused tve_gate clkdev entry
ARM i.MX5: Remove tve_sel clock from i.MX53 clock tree
ARM: i.MX5: Add PATA and SRTC clocks
ARM: imx: do not bring up unavailable cores
ARM: imx: add initial imx6dl support
ARM: imx1: mm: add call to mxc_device_init
ARM: imx_v4_v5_defconfig: Add CONFIG_GPIO_SYSFS
ARM: imx_v6_v7_defconfig: Select CONFIG_PERF_EVENTS
ARM: i.MX53 Add the cko1, cko2 clock outputs.
staging: drm/imx: Use SRC to reset IPU
ARM i.MX6q: Add GPU, VPU, IPU, and OpenVG resets to System Reset Controller (SRC)
ARM: imx: do not use regmap_read for ANADIG_DIGPROG
ARM i.MX6q: set the LDB serial clock parent to the video PLL
ARM i.MX6q: Add audio/video PLL post dividers for i.MX6q rev 1.1
ARM i.MX6q: fix ldb di divider and selector clocks
ARM i.MX53: fix ldb di divider and selector clocks
ARM i.MX: Add imx_clk_divider_flags and imx_clk_mux_flags
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Trivial change/change conflict in arch/arm/mach-imx/mach-imx6q.c resolved.
This adds CLKSRC_OF based init for sp804 timer. The clock initialization is
refactored to support retrieving the clock(s) from the DT.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
This converts arm and arm64 to use CLKSRC_OF DT based initialization for
the arch timer. A new function arch_timer_arch_init is added to allow for
arch specific setup.
This has a side effect of enabling sched_clock on omap5 and exynos5. There
should not be any reason not to use the arch timers for sched_clock.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Simon Horman <horms@verge.net.au>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-samsung-soc@vger.kernel.org
Cc: linux-omap@vger.kernel.org
Cc: linux-sh@vger.kernel.org
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Move debug uart code from mach-pxa/mach-mmp to debug directory.
Since they are similar, merge them together.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Acked-by: Eric Mico <eric.y.miao@gmail.com>
This converts sched_clock to simply a call to a function pointer in order
to allow overriding it. This will allow for use with 64-bit counters where
overflow handling is not needed.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* It enables the multiplatform build for mach-mxs platform.
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Merge tag 'mxs-multiplatform-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/multiplatform
From Shawn Guo <shawn.guo@linaro.org>:
The mxs multiplatform support for 3.10:
* It enables the multiplatform build for mach-mxs platform.
* tag 'mxs-multiplatform-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: mxs: enable multiplatform build
ARM: mxs: rename debug-macro.S for multiplatform build
ARM: mxs: call mxs_pm_init() as a machine_desc hook
Conflicts:
arch/arm/Kconfig.debug
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From Linus Walleij <linus.walleij@linaro.org>:
Ux500 multiplatform support. This tag builds upon the MFD-specific base
tag "ux500-multiplatform-mfd". This removes all <mach/*> dependencies
and makes the ux500 fully multi-platform.
* tag 'ux500-multiplatform-asoc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: build hotplug.o for ARMv7-a
ARM: ux500: move to multiplatform
ARM: ux500: make remaining headers local
ARM: ux500: make irqs.h local to platform
ARM: ux500: get rid of <mach/[hardware|db8500-regs].h>
staging: ste_rmi4: kill platform_data hack
ARM: ux500: move mach/msp.h to <linux/platform_data/*>
clk: ux500: pass clock base adresses in init call
ARM: ux500: make debug macro stand-alone
ARM: ux500: move debugmacro to debug includes
ARM: ux500: split out prcmu initialization
mfd: db8500-prcmu: drop unused includes
ARM: ux500: move PM-related PRCMU functions to machine
mfd: db8500-prcmu: get base address from resource
mfd: prcmu: pass a base and size with the early initcall
Conflicts:
arch/arm/Kconfig
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This branch (patch) converts BCM2835 to support being built into a
multi-platform single zImage. This mostly entails a few small Kconfig
tweaks, move the earlyprintk implementation to the standard multi-
platform location, and deleting some unnecessary files.
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Merge tag 'bcm2835-for-3.10-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi into next/multiplatform
From Stephen Warren <swarren@wwwdotorg.org>:
ARM: bcm2835: convert to multi-platform
This branch (patch) converts BCM2835 to support being built into a
multi-platform single zImage. This mostly entails a few small Kconfig
tweaks, move the earlyprintk implementation to the standard multi-
platform location, and deleting some unnecessary files.
* tag 'bcm2835-for-3.10-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi:
ARM: bcm2835: convert to multi-platform
Conflicts:
arch/arm/Kconfig
arch/arm/Kconfig.debug
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Both zynq and shmobile have conflicts against the gic cleanup
series, resolved here.
Conflicts:
arch/arm/mach-shmobile/smp-emev2.c
arch/arm/mach-shmobile/smp-r8a7779.c
arch/arm/mach-shmobile/smp-sh73a0.c
arch/arm/mach-zynq/platsmp.c
drivers/gpio/gpio-pl061.c
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Some boards are running with secure firmware running in TrustZone secure
world, which changes the way some things have to be initialized.
This patch adds an interface for platforms to specify available firmware
operations and call them.
A wrapper macro, call_firmware_op(), checks if the operation is provided
and calls it if so, otherwise returns -ENOSYS to allow fallback to
legacy operation..
By default no operations are provided.
Example of use:
In code using firmware ops:
__raw_writel(virt_to_phys(exynos4_secondary_startup),
CPU1_BOOT_REG);
/* Call Exynos specific smc call */
if (call_firmware_op(cpu_boot, cpu) == -ENOSYS)
cpu_boot_legacy(...); /* Try legacy way */
gic_raise_softirq(cpumask_of(cpu), 1);
In board-/platform-specific code:
static int platformX_do_idle(void)
{
/* tell platformX firmware to enter idle */
return 0;
}
static int platformX_cpu_boot(int i)
{
/* tell platformX firmware to boot CPU i */
return 0;
}
static const struct firmware_ops platformX_firmware_ops = {
.do_idle = exynos_do_idle,
.cpu_boot = exynos_cpu_boot,
/* other operations not available on platformX */
};
static void __init board_init_early(void)
{
register_firmware_ops(&platformX_firmware_ops);
}
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
From Michal Simek <michal.simek@xilinx.com>:
This branch is based on zynq/clksrc/cleanup parts because
there are some dependencies on moving timer to generic location.
I could based it on standard Linux tagged version but you will get
several conflicts you will have to resolve.
If you are OK to resolving these problems, please let me know
I will create another branch with core-smp changes which are not based
on zynq/clksrc/cleanup branch.
* 'zynq/core-smp' of git://git.xilinx.com/linux-xlnx:
arm: zynq: Add hotplug support
arm: zynq: Add smp support
arm: zynq: Add smp_twd timer
arm: zynq: Get rid of xilinx function prefix
arm: zynq: Add support for system reset
arm: zynq: Move slcr initialization to separate file
arm: zynq: Load scu baseaddress at run time
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From Michal Simek <michal.simek@xilinx.com>:
* 'zynq/clksrc/cleanup' of git://git.xilinx.com/linux-xlnx:
arm: zynq: Move timer to generic location
arm: zynq: Do not use xilinx specific function names
arm: zynq: Move timer to clocksource interface
arm: zynq: Use standard timer binding
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Use the generic idle loop and replace enable/disable_hlt with the
respective core functions.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Paul McKenney <paulmck@linux.vnet.ibm.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Reviewed-by: Cc: Srivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Russell King <linux@arm.linux.org.uk>
Tested-by: Kevin Hilman <khilman@linaro.org> # OMAP
Link: http://lkml.kernel.org/r/20130321215233.826238797@linutronix.de
This pushes the knowledge of physical addresses down into
the debug macro so we can get rid of the <mach/hardware.h>
dependency.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This moves the Ux500 debug macro to the debug headers to
make way for multiplatform support.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Many ARMv7 cores have hardware page table walkers that can read the L1
cache. This is discoverable from the ID_MMFR3 register, although this
can be expensive to access from the low-level set_pte functions and is a
pain to cache, particularly with multi-cluster systems.
A useful observation is that the multi-processing extensions for ARMv7
require coherent table walks, meaning that we can make use of ALT_SMP
patching in proc-v7-* to patch away the cache flush safely for these
cores.
Reported-by: Albin Tonnerre <Albin.Tonnerre@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
commit 91d1aa43 (context_tracking: New context tracking susbsystem)
generalized parts of the RCU userspace extended quiescent state into
the context tracking subsystem. Context tracking is then used
to implement adaptive tickless (a.k.a extended nohz)
To support the new context tracking subsystem on ARM, the user/kernel
boundary transtions need to be instrumented.
For exceptions and IRQs in usermode, the existing usr_entry macro is
used to instrument the user->kernel transition. For the return to
usermode path, the ret_to_user* path is instrumented. Using the
usr_entry macro, this covers interrupts in userspace, data abort and
prefetch abort exceptions in userspace as well as undefined exceptions
in userspace (which is where FP emulation and VFP are handled.)
For syscalls, the slow return path is covered by instrumenting the
ret_to_user path. In addition, the syscall entry point is
instrumented which covers the user->kernel transition for both fast
and slow syscalls, and an additional instrumentation point is added
for the fast syscall return path (ret_fast_syscall).
Cc: Mats Liljegren <mats.liljegren@enea.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
To ease page table updates with 64-bit descriptors, CPUs implementing
LPAE are required to implement ldrd/strd as atomic operations.
This patch uses these accessors instead of the exclusive variants when
performing atomic64_{read,set} on LPAE systems.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The PCI specifications says that an I/O region must be aligned on a 4
KB boundary, and a memory region aligned on a 1 MB boundary.
However, the Marvell PCIe interfaces rely on address decoding windows
(which allow to associate a range of physical addresses with a given
device). For PCIe memory windows, those windows are defined with a 1
MB granularity (which matches the PCI specs), but PCIe I/O windows can
only be defined with a 64 KB granularity, so they have to be 64 KB
aligned. We therefore need to tell the PCI core about this special
alignement requirement.
The PCI core already calls pcibios_align_resource() in the ARM PCI
core, specifically for such purposes. So this patch extends the ARM
PCI core so that it calls a ->align_resource() hook registered by the
PCI driver, exactly like the existing ->map_irq() and ->swizzle()
hooks.
A particular PCI driver can register a align_resource() hook, and do
its own specific alignement, depending on the specific constraints of
the underlying hardware.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Commit 70264367a2 ("ARM: 7653/2: do not scale loops_per_jiffy when
using a constant delay clock") fixed a problem with our timer-based
delay loop, where loops_per_jiffy is scaled by cpufreq yet used directly
by the timer delay ops.
This patch fixes the problem in a more elegant way by keeping a private
ticks_per_jiffy field in the delay ops, independent of loops_per_jiffy
and therefore not subject to scaling. The loop-based delay continues to
use loops_per_jiffy directly, as it should.
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
On Cortex-A15 (r0p0..r3p2) the TLBI/DSB are not adequately shooting down
all use of the old entries. This patch implements the erratum workaround
which consists of:
1. Dummy TLBIMVAIS and DSB on the CPU doing the TLBI operation.
2. Send IPI to the CPUs that are running the same mm (and ASID) as the
one being invalidated (or all the online CPUs for global pages).
3. CPU receiving the IPI executes a DMB and CLREX (part of the exception
return code already).
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* 'gic' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64:
irqchip: gic: Perform the gic_secondary_init() call via CPU notifier
irqchip: gic: Call handle_bad_irq() directly
arm: Move chained_irq_(enter|exit) to a generic file
arm: Move the set_handle_irq and handle_arch_irq declarations to asm/irq.h
+ Linux 3.9-rc3
Signed-off-by: Olof Johansson <olof@lixom.net>
This series enables multiplatform support on the SIRF prima2/marco/atlas6
platform. The code was already quite tidy, so this is a relatively simple
change, and it follows similar changes we made to other ARMv7 based
platforms recently.
* prima2/multiplatform:
ARM: sirf: enable support in multi_v7_defconfig
ARM: sirf: enable multiplatform support
ARM: sirf: use clocksource_of infrastructure
ARM: sirf: move debug-macro.S to include/debug/sirf.S
ARM: sirf: enable sparse IRQ
ARM: sirf: move irq driver to drivers/irqchip
ARM: sirf: fix prima2 interrupt lookup
pinctrl: sirf: convert to linear irq domain
clocksource: make CLOCKSOURCE_OF_DECLARE type safe
ARM/dts: prima2: add .dtsi for atlas6 and .dts for atla6-evb board
arm: prima2: add new SiRFatlas6 machine in common board
ARM: smp_twd: convert to use CLKSRC_OF init
clocksource: tegra20: use the device_node pointer passed to init
clocksource: pass DT node pointer to init functions
clocksource: add empty version of clocksource_of_init
Conflicts:
arch/arm/configs/multi_v7_defconfig
arch/arm/mach-spear/spear13xx.c
Tested-by: Barry Song <Barry.Song@csr.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
These functions have been introduced by commit 10a8c383 (irq: introduce
entry and exit functions for chained handlers) in asm/mach/irq.h. This
patch moves them to linux/irqchip/chained_irq.h so that generic irqchip
drivers do not rely on architecture specific header files.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Rob Herring <rob.herring@calxeda.com>
This patch prepares the removal of <asm/mach/irq.h> include in the
GIC and VIC irqchip drivers.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Rob Herring <rob.herring@calxeda.com>
This is only used by 740t, which is a v4 core and (by my reading of the
datasheet for the CPU) ignores CRm for the cp15 cache flush operation,
making the v4 cache implementation in cache-v4.S sufficient for this
CPU.
Tested with 740T core-tile on Integrator/AP baseboard.
Acked-by: Hyok S. Choi <hyok.choi@samsung.com>
Acked-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
The new style ll_debug implementation for multiplatform requires the
platform glue to be in include/debug, so let's move it there to
separate the debugging logic from the platform code.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Barry Song <Baohua.Song@csr.com>
I've looked at all the platforms recently to see what their
state is. cns3xxx seems quite clean but not very actively
maintained. Since it is really easy to convert to multiplatform,
that's what I did here.
* cns3xxx/multiplatform:
ARM: cns3xxx: initial DT support
ARM: cns3xxx: enable multiplatform support
ARM: cns3xxx: move debug_ll code to include/debug/
ARM: cns3xxx: enable sparse IRQ support
ARM: cns3xxx: make mach header files local
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Get rid of the last header files in the <mach/*> namespace
- Move the debug macro to the common place
- Make the necessary Kconfig fixes and move the platform Kconfig
fragment down to the mach directory.
- Include necessary defconfig update to get the platform going.
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Merge tag 'nomadik-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/multiplatform
From Linus Walleij <linus.walleij@linaro.org>:
Multiplatform support for the Nomadik
- Get rid of the last header files in the <mach/*> namespace
- Move the debug macro to the common place
- Make the necessary Kconfig fixes and move the platform Kconfig
fragment down to the mach directory.
- Include necessary defconfig update to get the platform going.
* tag 'nomadik-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: nomadik: delete remnant include files
ARM: nomadik: convert to multiplatform
ARM: nomadik: move debugmacro to debug includes
ARM: nomadik: delete IRQ header
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Instead of giving zero support of uncompress debug for multiplatform
build, the patch turns uncompress debug into one part of DEBUG_LL
support. When DEBUG_LL is turned on for a particular platform,
uncompress debug works too for that platform.
OMAP and Tegra are exceptions here. OMAP low-level debug code places
data in the .data section, and that is not allowed in decompressor.
And Tegra code has reference to variable that's unavailable in
decompressor but only in kernel. That's why Kconfig symbol
DEBUG_UNCOMPRESS controlling multiplatform uncompress debug support is
defined with !DEBUG_OMAP2PLUS_UART && !DEBUG_TEGRA_UART.
It creates arch/arm/boot/compressed/debug.S with CONFIG_DEBUG_LL_INCLUDE
included there, implements a generic putc() using those macros, which
will be built when DEBUG_UNCOMPRESS is defined.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Following the approach handling DEBUG_LL inclusion, the patch creates
a Kconfig symbol CONFIG_UNCOMPRESS_INCLUDE for choosing the correct
uncompress header. For traditional build, mach/uncompress.h will be
included in arch/arm/boot/compressed/misc.c. For multiplatform build,
debug/uncompress.h which contains a suite of empty functions will be
used. In this way, a platform with particular uncompress.h
implementation could choose its own uncompress.h with this Kconfig
option.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This is needed in order to keep debug_ll functionality on
cns3xxx working when we enable ARCH_MULTIPLATFORM.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This allows BCM2835 be included in a kernel build that supports multiple
SoCs at once, which is useful for distro kernels.
This change:
* Moves bcm2835's debug-macro.S into ARM's include/debug/, and hooks it
into the relevant menu.
* Moves bcm2835's Kconfig into its own directory, as seems typical for
multi-platform conversions.
* Removes bcm2835_soc.h, and moves the content to the files where it was
used; just one usage per define.
* Deletes some headers and Makefile.boot that aren't needed now that we
support multi-platform.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
* Compile warnings and errors (one on x86, two on ARM)
* WARNING in xen-pciback
* Use the acpi_processor_get_performance_info instead of the 'register' version
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Merge tag 'stable/for-linus-3.9-rc2-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen
Pull Xen fixes from Konrad Rzeszutek Wilk:
- Compile warnings and errors (one on x86, two on ARM)
- WARNING in xen-pciback
- Use the acpi_processor_get_performance_info instead of the 'register'
version
* tag 'stable/for-linus-3.9-rc2-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen:
xen/acpi: remove redundant acpi/acpi_drivers.h include
xen: arm: mandate EABI and use generic atomic operations.
acpi: Export the acpi_processor_get_performance_info
xen/pciback: Don't disable a PCI device that is already disabled.
Rob Herring has observed that c81611c4e9 "xen: event channel arrays are
xen_ulong_t and not unsigned long" introduced a compile failure when building
without CONFIG_AEABI:
/tmp/ccJaIZOW.s: Assembler messages:
/tmp/ccJaIZOW.s:831: Error: even register required -- `ldrexd r5,r6,[r4]'
Will Deacon pointed out that this is because OABI does not require even base
registers for 64-bit values. We can avoid this by simply using the existing
atomic64_xchg operation and the same containerof trick as used by the cmpxchg
macros. However since this code is used on memory which is shared with the
hypervisor we require proper atomic instructions and cannot use the generic
atomic64 callbacks (which are based on spinlocks), therefore add a dependency
on !GENERIC_ATOMIC64. Since we already depend on !CPU_V6 there isn't much
downside to this.
While thinking about this we also observed that OABI has different struct
alignment requirements to EABI, which is a problem for hypercall argument
structs which are shared with the hypervisor and which must be in EABI layout.
Since I don't expect people to want to run OABI kernels on Xen depend on
CONFIG_AEABI explicitly too (although it also happens to be enforced by the
!GENERIC_ATOMIC64 requirement too).
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Rob Herring <robherring2@gmail.com>
Acked-by: Stefano Stabellini <Stefano.Stabellini@eu.citrix.com>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Now that we have OF based init with CLKSRC_OF, convert smp_twd init
function to use it and covert all callers of
twd_local_timer_of_register.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Viresh Kumar <viresh.linux@gmail.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: John Stultz <johnstul@us.ibm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-omap@vger.kernel.org
Cc: spear-devel@list.st.com
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
v8 is capable of invalidating Stage-2 by IPA, but v7 is not.
Change kvm_tlb_flush_vmid() to take an IPA parameter, which is
then ignored by the invalidation code (and nuke the whole TLB
as it always did).
This allows v8 to implement a more optimized strategy.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
arm64 cannot represent the kernel VAs in HYP mode, because of the lack
of TTBR1 at EL2. A way to cope with this situation is to have HYP VAs
to be an offset from the kernel VAs.
Introduce macros to convert a kernel VA to a HYP VA, make the HYP
mapping functions use these conversion macros. Also change the
documentation to reflect the existence of the offset.
On ARM, where we can have an identity mapping between kernel and HYP,
the macros are without any effect.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
In order to keep the VFP allocation code common, use an abstract type
for the VFP containers. Maps onto struct vfp_hard_struct on ARM.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Make the split of the pgd_ptr an implementation specific thing
by moving the init call to an inline function.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Move low level MMU-related operations to kvm_mmu.h. This makes
the MMU code reusable by the arm64 port.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
This one got lost in the move to handle_exit, so let's reintroduce it
using an accessor to the immediate value field like the other ones.
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
The exit handler selection code cannot be shared with arm64
(two different modes, more exception classes...).
Move it to a separate file (handle_exit.c).
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
Bit 8 is cache maintenance, bit 9 is external abort.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
Instead of directly accessing the fault registers, use proper accessors
so the core code can be shared.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
On 32bit ARM, unsigned long is guaranteed to be a 32bit quantity.
On 64bit ARM, it is a 64bit quantity.
In order to be able to share code between the two architectures,
convert the registers to be unsigned long, so the core code can
be oblivious of the change.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
