Commit Graph

1 Commits

Author SHA1 Message Date
Geert Uytterhoeven
cedd162b4d clk: renesas: Add r8a7790 CPG Core Clock Definitions
Add all R-Car H2 Clock Pulse Generator Core Clock Outputs, as listed in
Table 7.2a ("List of Clocks [R-Car H2]") of the R-Car Gen2 Hardware
User's Manual rev. 2.00.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
2017-05-24 10:19:42 +02:00