Commit Graph

71 Commits

Author SHA1 Message Date
Linus Torvalds
482c3e8835 ARM: 64-bit DT updates for v4.10
A couple of interesting new SoC platforms are now supported, these are
 the respective DTS sources:
 
 - Samsung Exynos5433 mobile phone platform, including an (almost) fully
   supported phone reference board.
 - Hisilicon Hip07 server platform and D05 board, the latest iteration
   of their product line, now with 64 Cortex-A72 cores across two
   sockets.
 - Allwinner A64 SoC, the first 64-bit chip from their "sunxi" product
   line, used in Android tablets and ultra-cheap development boards
 - NXP LS1046A Communication processor, improving on the earlier LS1043A
   with faster CPU cores
 - Qualcomm MSM8992 (Snapdragon 808) and MSM8994 (Snapdragon 810)
   mobile phone SoCs
 - Early support for the Nvidia Tegra Tegra186 SoC
 - Amlogic S905D is a minor variant of their existing Android consumer
   product line
 - Rockchip PX5 automotive platform, a close relative of their popular
   rk3368 Android tablet chips
 
 Aside from the respective evaluation platforms for the above
 chips, there are only a few consumer devices and boards added
 this time:
 
 - Huawei Nexus 6P (Angler) mobile phone
 - LG Nexus 5x (Bullhead) mobile phone
 - Nexbox A1 and A95X Android TV boxes
 - Pine64 development board based on Allwinner A64
 - Globalscale Marvell ESPRESSOBin community board based on Armada 3700
 - Renesas "R-Car Starter Kit Pro" (M3ULCB) low-cost automotive  board
 
 For the existing platforms, we get bug fixes and new peripheral support
 for Juno, Renesas, Uniphier, Amlogic, Samsung, Broadcom, Rockchip, Berlin,
 and ZTE.
 
 Conflicts:
 - Documentation/devicetree/bindings/arm/shmobile.txt: a
   rename/add conflict, keep both modifications and maintain
   alphabetical ordering.
 - arch/arm64/boot/dts/*/*.dtsi: nodes were added in netdev,
   mmc and clk, keep both sides in each case.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIVAwUAWFMYq2CrR//JCVInAQJ38BAAzKC2AmZw2U5t8de1RuC7OOefHnWxzXaI
 hpH5sLLIF10D52VrztqG2EauQWa2K0OYpkO5Up+d8WVdRm6dL2Y9wTMOhdadqWmb
 zPthdGuSpI6yRiST51Umr1pvt5rm/0KYMAiP1B1ySIWCeOyxFmm9er6ZU3By6kbx
 bbXEzY2vs22GJ3+rNxYOVGm1hlhgBaoYnkth2AIXwiGt5OUn4yDs/17+WqNZlg7S
 Bj9vdvn+A/IeiaGZGRUn8J2HxUCeIxJzwntKJyoRfVu6BH+qlrPLhFh/N3Ttzb+3
 Xjh+uQgikEp/2pkaq6oNJLATOXCAL8+UIAL+ZMJ1jiVI7Q1WBQITj14QgNgbkupX
 1Bg25eS3I3HSmOg1tnUeEzF3N3hK8jlb9lA0HZm9m6RuegFsVIGHfte7xOdRbZki
 dHAVy0xAoBPoXWnUfoekc1/L4AfsBh57GfbIBhf+xZs2eKp7Jw22eVwc9YsdDpc1
 3s6aEbAsQWU7IgSWWEOJMi/q7Z6By7db3dIGLqtwszVvqzjkcszXQZSxjaOHlseK
 j6Ci6yQ3UeG05QviySFyVsOxfHrL5SczYexsbkKE/kXfQZXR7x+GQzjm/BwYvEkO
 Q+gHAbGBI5IM6hTBDLnHkn+WkXYk3EhyTcFykxs2ykJhWsOd9ReBuCTxr4Wey40U
 Q80HYHv/leY=
 =geT0
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM 64-bit DT updates from Arnd Bergmann:
 "A couple of interesting new SoC platforms are now supported, these are
  the respective DTS sources:

   - Samsung Exynos5433 mobile phone platform, including an (almost)
     fully supported phone reference board.
   - Hisilicon Hip07 server platform and D05 board, the latest iteration
     of their product line, now with 64 Cortex-A72 cores across two
     sockets.
   - Allwinner A64 SoC, the first 64-bit chip from their "sunxi" product
     line, used in Android tablets and ultra-cheap development boards
   - NXP LS1046A Communication processor, improving on the earlier
     LS1043A with faster CPU cores
   - Qualcomm MSM8992 (Snapdragon 808) and MSM8994 (Snapdragon 810)
     mobile phone SoCs
   - Early support for the Nvidia Tegra Tegra186 SoC
   - Amlogic S905D is a minor variant of their existing Android consumer
     product line
   - Rockchip PX5 automotive platform, a close relative of their popular
     rk3368 Android tablet chips

  Aside from the respective evaluation platforms for the above chips,
  there are only a few consumer devices and boards added this time:

   - Huawei Nexus 6P (Angler) mobile phone
   - LG Nexus 5x (Bullhead) mobile phone
   - Nexbox A1 and A95X Android TV boxes
   - Pine64 development board based on Allwinner A64
   - Globalscale Marvell ESPRESSOBin community board based on Armada 3700
   - Renesas "R-Car Starter Kit Pro" (M3ULCB) low-cost automotive board

  For the existing platforms, we get bug fixes and new peripheral
  support for Juno, Renesas, Uniphier, Amlogic, Samsung, Broadcom,
  Rockchip, Berlin, and ZTE"

* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (168 commits)
  arm64: dts: fix build errors from missing dependencies
  ARM64: dts: meson-gxbb: add SCPI pre-1.0 compatible
  ARM64: dts: meson-gxl: Add support for Nexbox A95X
  ARM64: dts: meson-gxm: Add support for the Nexbox A1
  ARM: dts: artpec: add pcie support
  arm64: dts: berlin4ct-dmp: add missing unit name to /memory node
  arm64: dts: berlin4ct-stb: add missing unit name to /memory node
  arm64: dts: berlin4ct: add missing unit name to /soc node
  arm64: dts: qcom: msm8916: Add ddr support to sdhc1
  arm64: dts: exynos: Enable HS400 mode for eMMC for TM2
  ARM: dts: Add xo to sdhc clock node on qcom platforms
  ARM64: dts: Add support for Meson GXM
  dt-bindings: add rockchip RK1108 Evaluation board
  arm64: dts: NS2: Add PCI PHYs
  arm64: dts: NS2: enable sdio1
  arm64: dts: exynos: Add the mshc_2 node for supporting T-Flash
  arm64: tegra: Add NVIDIA P2771 board support
  arm64: tegra: Enable PSCI on P3310
  arm64: tegra: Add NVIDIA P3310 processor module support
  arm64: tegra: Add GPIO controllers on Tegra186
  ...
2016-12-15 15:58:28 -08:00
Linus Torvalds
3ec5e8d82b ARM: SoC non-urgent fixes for v4.10
As usual, we queue up a few fixes that don't seem urgent enough to go in
 through -rc, or that just came a little too late given their size.
 
 The zx fixes make the platform finally boot on real hardware, the
 davinci and imx31 get the DT support working better for some of
 the machines that are still normally used with classic board files.
 One tegra fix is important for new bootloader versions, but the
 bug has been around for a while without anyone noticing.
 
 The other changes are mostly cosmetic.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIVAwUAWFLum2CrR//JCVInAQJTJhAAmLTsJE0O9akmxytLzlMsy+xhIHvXBfkx
 mCDr0sVwHFVm2vcH0bPlK4sNrjGYjIV0Qfsh4Br9NzohCxe6s8xFvPA78aYk5AZp
 kiHRv8Gap3dYTV2p6P2loeQ3o0zN7kl9/gUPOy6v4La84kUyZi9RRpyhA+HlEuwW
 loQQ6LaSVQb8dMo8Lz5GdOk4YfWyy1DSoZ1uNwD/2bqgfIDQ5MPdjwQzHeK259xE
 8WfVKtS4RXl54Psj26BfHRrH8VE8cMxfZ3eZwGykiXpOusrjNVbIEPJK8nKHuGHJ
 Ui/nAMzvCD23bsVX2JCYAKa/zRWjXqpvrHEzLJsaWq1VqtmWFS7g9wi1DjZmBBoC
 eJZI8Sg/7qL8Rkc69XSzyRUdMxdS6JfWQ6HrM/qzouja6MoRdFdbzl1WiPyYaVGd
 gBa7Lx6hQJgSWkeu0mvERdDAzjf4weeZyMFOFov0CwzMZ4VTKCR6Rk4lc8I1A/Hz
 0QcCmUj7uXC+gA6U+ZBlvDkG+e1u0Me5i+0gCCphd3UaReB5WaEriNubEwEMitci
 QI9BGIMzG974UXU9CCIwcnpFvJKSRwuZsQmPpulP1vbfIb8ajZXQ779PW5szE6qI
 h9VMtnKlDbOUEzdj6l/sCs2mWrobCr8/44cWOz7R8b31ZhBZxyJRWhIE/YvZFEvF
 Dq5OzaCNLxM=
 =i2l2
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC non-urgent fixes from Arnd Bergmann:
 "As usual, we queue up a few fixes that don't seem urgent enough to go
  in through -rc, or that just came a little too late given their size.

  The zx fixes make the platform finally boot on real hardware, the
  davinci and imx31 get the DT support working better for some of the
  machines that are still normally used with classic board files. One
  tegra fix is important for new bootloader versions, but the bug has
  been around for a while without anyone noticing.

  The other changes are mostly cosmetic"

* tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (22 commits)
  arm64: tegra: Add missing Smaug revision
  arm64: tegra: Add VDD_GPU regulator to Jetson TX1
  arm64: dts: zte: clean up gic-v3 redistributor properties
  arm64: dts: zx: Fix gic GICR property
  bus: vexpress-config: fix device reference leak
  soc: ti: qmss: fix the case when !SMP
  ARM: lpc32xx: drop duplicate header device.h
  ARM: ixp4xx: drop duplicate header gpio.h
  ARM: socfpga: fix spelling mistake in error message
  ARM: dts: imx6q-cm-fx6: fix fec pinctrl
  ARM: dts: imx7d-pinfunc: fix UART pinmux defines
  ARM: dts: imx6qp: correct LDB clock inputs
  ARM: OMAP2+: pm-debug: Use seq_putc() in two functions
  ARM: OMAP2+: Remove the omapdss_early_init_of() function
  mfd: tps65217: Fix mismatched interrupt number
  ARM: zx: Fix error handling
  ARM: spear: Fix error handling
  ARM: davinci: da850: Fix pwm name matching
  ARM: clk: imx31: properly init clocks for machines with DT
  clk: imx31: fix rewritten input argument of mx31_clocks_init()
  ...
2016-12-15 15:15:13 -08:00
Alexandre Courbot
816c60c131 arm64: tegra: Add missing Smaug revision
The "google,smaug-rev2" string is missing from the compatible list of
Smaug's DT. The differences of rev2 are not relevant at our current
level of support and it boots just fine, so add it.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2016-12-08 00:23:34 +01:00
Alexandre Courbot
5e6b9a89af arm64: tegra: Add VDD_GPU regulator to Jetson TX1
Add the VDD_GPU regulator (a GPIO-enabled PWM regulator) to the Jetson
TX1 board. This addition allows the GPU to be used provided the
bootloader properly enabled the GPU node.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
[as pointed out by Thierry on IRC, nobody has reported a bug
 in the field, but using a new bootloader with a .dtb that
 has the incorrect data, it will crash on boot]
Fixes: 336f79c7b6 ("arm64: tegra: Add NVIDIA Jetson TX1 Developer Kit support")
Cc: stable@vger.kernel.org #v4.5+
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2016-12-08 00:23:33 +01:00
Thierry Reding
af099eab35 arm64: tegra: Enable PCIe on Jetson TX1
Enable the x4 PCIe and M.2 Key E slots on Jetson TX1. The Key E slot is
currently untested due to lack of hardware.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bjorn Helgaas <helgaas@kernel.org>
2016-12-07 12:07:23 -06:00
Thierry Reding
589a2d3f18 arm64: tegra: Add PCIe host bridge on Tegra210
Add the PCIe host bridge found on Tegra X1. It implements two root ports
that support x4 and x1 configurations, respectively.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Bjorn Helgaas <helgaas@kernel.org>
2016-12-07 12:07:15 -06:00
Joseph Lo
99575bceeb arm64: tegra: Add NVIDIA P2771 board support
The NVIDIA P2771 is composed of a P3310 processor module that connects
to the P2597 I/O board. It comes with a 1200x1920 MIPI DSI panel that is
connected via the P2597's display connector and has several connectors
such as HDMI, USB 3.0, PCIe and ethernet.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-21 10:43:42 +01:00
Thierry Reding
0dfde13325 arm64: tegra: Enable PSCI on P3310
The P3310 processor module comes ships with a firmware that implements
PSCI 1.0. Enable and use it to bring up all CPUs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-21 10:43:41 +01:00
Joseph Lo
df205de62b arm64: tegra: Add NVIDIA P3310 processor module support
The NVIDIA P3310 is a processor module used in several reference designs
that features a Tegra186 SoC, 8 GiB of LPDDR4 RAM, 32 GiB eMMC and other
essentials such as ethernet, WiFi and a PMIC. It is typically connected
to an I/O board (such as the P2597) that provides the connecters needed
to hook it up to the outside world.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-21 10:43:41 +01:00
Thierry Reding
fc4bb754c8 arm64: tegra: Add GPIO controllers on Tegra186
Tegra186 has two GPIO controllers that are no longer compatible with the
controller found on earlier generations. One of these controllers exists
in an always-on partition of the SoC whereas the other can be clock- and
powergated.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-21 10:43:40 +01:00
Thierry Reding
99425dfd6b arm64: tegra: Add SDHCI controllers on Tegra186
Tegra186 has a total of four SDHCI controllers that each support SD 4.2
(up to UHS-I speed), SDIO 4.1 (up to UHS-I speed), eSD 2.1, eMMC 5.1 and
SDHOST 4.1 (up to UHS-I speed).

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-21 10:43:39 +01:00
Thierry Reding
40cc83b34c arm64: tegra: Add I2C controllers on Tegra186
Tegra186 has a total of nine I2C controllers that are compatible with
the I2C controllers introduced in Tegra114. Two of these controllers
share pads with two DPAUX controllers (for AUX transactions).

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-21 10:43:39 +01:00
Thierry Reding
a7a77e2e83 arm64: tegra: Add serial ports on Tegra186
The initial patch only added UARTA, but there's no reason we shouldn't
be adding all of them. While at it, also specify the missing clocks and
resets for UARTA.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-21 10:43:38 +01:00
Thierry Reding
cd6fe32e34 arm64: tegra: Add CPU nodes for Tegra186
Tegra186 has six CPUs: two CPUs are second generation Denver CPUs that
support ARMv8 and four CPUs are Cortex-A57 CPUs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-21 10:43:37 +01:00
Joseph Lo
39cb62cb89 arm64: tegra: Add Tegra186 support
This adds the initial support of Tegra186 SoC. It provides enough to
enable the serial console and boot from an initial ramdisk.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
[treding@nvidia.com: remove leading 0 from unit-addresses]
[treding@nvidia.com: remove unused nvidia,bpmp property]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-21 10:43:36 +01:00
Linus Torvalds
2d2474a194 Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux
Pull thermal managament updates from Zhang Rui:

 - Enhance thermal "userspace" governor to export the reason when a
   thermal event is triggered and delivered to user space. From Srinivas
   Pandruvada

 - Introduce a single TSENS thermal driver for the different versions of
   the TSENS IP that exist, on different qcom msm/apq SoCs'. Support for
   msm8916, msm8960, msm8974 and msm8996 families is also added. From
   Rajendra Nayak

 - Introduce hardware-tracked trip points support to the device tree
   thermal sensor framework. The framework supports an arbitrary number
   of trip points. Whenever the current temperature is changed, the trip
   points immediately below and above the current temperature are found,
   driver callback is invoked to program the hardware to get notified
   when either of the two trip points are triggered. Hardware-tracked
   trip points support for rockchip thermal driver is also added at the
   same time. From Sascha Hauer, Caesar Wang

 - Introduce a new thermal driver, which enables TMU (Thermal Monitor
   Unit) on QorIQ platform. From Jia Hongtao

 - Introduce a new thermal driver for Maxim MAX77620. From Laxman
   Dewangan

 - Introduce a new thermal driver for Intel platforms using WhiskeyCove
   PMIC. From Bin Gao

 - Add mt2701 chip support to MTK thermal driver. From Dawei Chien

 - Enhance Tegra thermal driver to enable soctherm node and set
   "critical", "hot" trips, for Tegra124, Tegra132, Tegra210. From Wei
   Ni

 - Add resume support for tango thermal driver. From Marc Gonzalez

 - several small fixes and improvements for rockchip, qcom, imx, rcar,
   mtk thermal drivers and thermal core code. From Caesar Wang, Keerthy,
   Rocky Hao, Wei Yongjun, Peter Robinson, Bui Duc Phuc, Axel Lin, Hugh
   Kang

* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux: (48 commits)
  thermal: int3403: Process trip change notification
  thermal: int340x: New Interface to read trip and notify
  thermal: user_space gov: Add additional information in uevent
  thermal: Enhance thermal_zone_device_update for events
  arm64: tegra: set hot trips for Tegra210
  arm64: tegra: set critical trips for Tegra210
  arm64: tegra: add soctherm node for Tegra210
  arm64: tegra: set hot trips for Tegra132
  arm64: tegra: set critical trips for Tegra132
  arm64: tegra: use tegra132-soctherm for Tegra132
  arm: tegra: set hot trips for Tegra124
  arm: tegra: set critical trips for Tegra124
  thermal: tegra: add hw-throttle for Tegra132
  thermal: tegra: add hw-throttle function
  of: Add bindings of hw throttle for Tegra soctherm
  thermal: mtk_thermal: Check return value of devm_thermal_zone_of_sensor_register
  thermal: Add Mediatek thermal driver for mt2701.
  dt-bindings: thermal: Add binding document for Mediatek thermal controller
  thermal: max77620: Add thermal driver for reporting junction temp
  thermal: max77620: Add DT binding doc for thermal driver
  ...
2016-10-12 11:05:23 -07:00
Wei Ni
cbd0f00017 arm64: tegra: set hot trips for Tegra210
Enable throttle function for SOC_THERM.
Set "hot" trips for cpu and gpu thermal zones, which
can trigger the SOC_THERM hardware throttle.

Signed-off-by: Wei Ni <wni@nvidia.com>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
2016-09-27 14:02:32 +08:00
Wei Ni
5e03f663ca arm64: tegra: set critical trips for Tegra210
Set general "critical" trip temperatures for cpu, gpu, mem and pllx
thermal zones on Tegra210, these trips can trigger shut down or reset.

Signed-off-by: Wei Ni <wni@nvidia.com>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
2016-09-27 14:02:32 +08:00
Wei Ni
e2bed1ebbf arm64: tegra: add soctherm node for Tegra210
Adds soctherm node for Tegra210, and add cpu,
gpu, mem, pllx as thermal-zones. Set critical
trip temperatures for them.

Signed-off-by: Wei Ni <wni@nvidia.com>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
2016-09-27 14:02:32 +08:00
Wei Ni
f4357938d0 arm64: tegra: set hot trips for Tegra132
Enable throttle function for SOC_THERM.
Set "hot" trips for cpu and gpu thermal zones, which
can trigger the SOC_THERM hardware throttle.

Signed-off-by: Wei Ni <wni@nvidia.com>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
2016-09-27 14:02:32 +08:00
Wei Ni
a6ebde2540 arm64: tegra: set critical trips for Tegra132
Set general "critical" trip temperatures for cpu, gpu, mem and pllx
thermal zones on Tegra132, these trips can trigger shut down or reset.

Signed-off-by: Wei Ni <wni@nvidia.com>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
2016-09-27 14:02:32 +08:00
Wei Ni
0fa2bfcd1a arm64: tegra: use tegra132-soctherm for Tegra132
The Tegra132 has the specific settings for soctherm,
so change to use campatible "nvidia,tegra132-soctherm" for it.
And adds cpu, gpu, mem and pllx thermal zones.

Signed-off-by: Wei Ni <wni@nvidia.com>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
2016-09-27 14:02:32 +08:00
Jon Hunter
4d3457826a arm64: tegra: Enable XUSB controller on Tegra210 Smaug
Enable the XUSB controller on Tegra210 Smaug. The Smaug has a USB Type-C
connector with one of the USB2.0 lanes and one of the USB3.0 lanes
populated.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-08-24 16:56:52 +02:00
Jon Hunter
3ce510a06a arm64: tegra: Add the various audio devices for Tegra210 Smaug
The Tegra210 Smaug includes the Realtek RT5677 audio codec, Nuvoton
NAU8825 headset codec and the Maxim MAX98357a audio amplifier. Add
the nodes for these devices for the Tegra210 Smaug.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
[treding@nvidia.com: use interrupts property consistently]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-08-24 16:55:32 +02:00
Jon Hunter
b4f10afdad arm64: tegra: Enable DPAUX for Tegra210 Smaug
The Tegra210 Smaug uses I2C6 for interfacing to various audio chips.
I2C6 shares pads with the DPAUX interface and to allow I2C6 to request
the pads owned by DPAUX, the DPAUX device needs to be enabled. Enable
DPAUX for Tegra210 Smaug.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-08-24 16:53:32 +02:00
Jon Hunter
9fab004dcb arm64: tegra: Add ACONNECT, ADMA and AGIC nodes Tegra210 Smaug
Populate the ACONNECT, ADMA and AGIC nodes for Tegra210 Smaug which
are used for audio use-cases.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-08-24 16:52:52 +02:00
Jon Hunter
96d1f078ff arm64: tegra: Add SOR power-domain for Tegra210
Add node for SOR power-domain for Tegra210 and populate the SOR
power-domain phandle for DPAUX, DSI, MIPI-CAL and SOR and nodes that are
dependent on this power-domain.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-08-24 16:51:26 +02:00
Jon Hunter
19e61213f6 arm64: tegra: Add ADMA node for Tegra210
Populate the ADMA node for Tegra210. The ADMA is used by the Audio
Processing Engine (APE) on Tegra210 for moving data between the APE
and system memory.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-08-24 16:49:57 +02:00
Jon Hunter
bcdbde4335 arm64: tegra: Add AGIC node for Tegra210
Populate the Audio GIC (AGIC) node for Tegra210. This interrupt
controller is used by the Audio Processing Engine to route interrupts
to the main CPU interrupt controller. The AGIC is based on the ARM
GIC400 and so uses the clock name "clk" as specified by the GIC binding
document for GIC400 devices.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-08-24 16:37:08 +02:00
Jon Hunter
98313c940a arm64: tegra: Drop clock and reset names for XUSB powergates
Drop the clock and reset names for the Tegra210 XUSB powergates because
these are not currently used and not required by the Tegra PMC binding
documentation.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-08-24 16:32:28 +02:00
Stephen Warren
016655121e arm64: tegra: Simplify Tegra210 GPIO compatible value
The compatible value need only include an entry for the specific HW
generation, plus the oldest HW version that introduced changes it is
backwards-compatible with; intermediate versions aren't necessary. Since
Tegra124 GPIO is backwards-compatible with Tegra30 GPIO, there's no need
to include the Tegra124 value in the Tegra210 DTS. This makes the kernel
DT better match the copy of the DT files included in U-Boot.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-08-16 15:10:40 +02:00
Thierry Reding
3499359418 arm64: tegra: Enable HDMI on Jetson TX1
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:27 +02:00
Thierry Reding
237d5cc779 arm64: tegra: Add sor1_src clock
The sor1 IP block needs the sor1_src clock to configure the clock tree
depending on whether it's running in HDMI or DP mode.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:26 +02:00
Jon Hunter
241f02ba98 arm64: tegra: Add XUSB powergates on Tegra210
The Tegra210 XUSB subsystem has 3 power partitions which are XUSBA
(super-speed logic), XUSBB (USB device logic) and XUSBC (USB host
logic). Populate the device-tree nodes for these XUSB partitions.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:26 +02:00
Jon Hunter
66b2d6e9c9 arm64: tegra: Add DPAUX pinctrl bindings
Add the DPAUX pinctrl states for the DPAUX nodes defining all three
possible states of "aux", "i2c" and "off". Also add the 'i2c-bus'
node for the DPAUX nodes so that the I2C driver core does not attempt
to parse the pinctrl state nodes.

Populate the nodes for the pinctrl clients of the DPAUX pin controller.
There are two clients for each DPAUX instance, namely the SOR and one of
the I2C adapters. The SOR clients may used the DPAUX pins in either AUX
or I2C modes and so for these devices we don't define any of the generic
pinctrl states (default, idle, etc) because the SOR driver will directly
set the state needed. For I2C clients only the I2C mode is used and so
we can simplify matters by using the generic pinctrl states for default
and idle.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:25 +02:00
Jon Hunter
0f13309022 arm64: tegra: Add ACONNECT bus node for Tegra210
Add the ACONNECT bus node for Tegra210 which is used to interface to
the various devices in the Audio Processing Engine (APE).

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:25 +02:00
Jon Hunter
c2b8244553 arm64: tegra: Add audio powergate node for Tegra210
Add the audio powergate for Tegra210.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:24 +02:00
Rhyland Klein
1b4c842022 arm64: tegra: Add regulators for Tegra210 Smaug
Add regulators to the Tegra210 Smaug DTS file including support for the
MAX77620 PMIC.

Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:24 +02:00
Jon Hunter
9168e1db75 arm64: tegra: Correct Tegra210 XUSB mailbox interrupt
The XUSB mailbox interrupt for Tegra210 is 40 and not 49 which is for
the XUSB pad controller. For some Tegra210 boards, this is causing USB
connect and disconnect events to go undetected. Fix this by changing the
interrupt number for the XUSB mailbox to 40.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:23 +02:00
Thierry Reding
d23e054c66 arm64: tegra: Enable XUSB controller on Jetson TX1
Enable the XUSB controller on Jetson TX1. One of the USB 3.0 lanes goes
to an internal ethernet interface, while a second USB 3.0 lane supports
the USB-A receptacle on the I/O board.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:22 +02:00
Thierry Reding
5593eb76b6 arm64: tegra: Enable debug serial on Jetson TX1
Add a chosen node to the device tree that contains a stdout-path
property which defines the debug serial port.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:22 +02:00
Thierry Reding
e7a99ac299 arm64: tegra: Add Tegra210 XUSB controller
Add a device tree node for the Tegra XUSB controller. It contains a
phandle to the XUSB pad controller for control of the PHYs assigned
to the USB ports.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:21 +02:00
Thierry Reding
4e07ac9076 arm64: tegra: Add Tegra210 XUSB pad controller
Add a device tree node for the XUSB pad controller found on Tegra210.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:21 +02:00
Thierry Reding
7596723ecd arm64: tegra: Add DSI panel on Jetson TX1
Some variants of the Jetson TX1 ship with a 8.0" WUXGA TFT LCD panel
connected via four DSI lanes.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:20 +02:00
Thierry Reding
6d5aef5b95 arm64: tegra: p2597: Add SDMMC power supplies
Add power supplies for the SD/MMC card slot. Note that vmmc-supply is
currently restricted to 3.3 V because we don't support switching the
mode yet.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:20 +02:00
Thierry Reding
7793426943 arm64: tegra: Add PMIC support on Jetson TX1
Add a device tree node for the MAX77620 PMIC found on the p2180
processor module (Jetson TX1). Also add supporting power supplies,
such as the main 5 V system supply.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:19 +02:00
Arnd Bergmann
8ed589854a arm64: tegra: Enable GM20B GPU on Tegra210
Complement the GM20B GPU device tree node on Tegra210 with missing
 properties to make it usable.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABCAAGBQJXI3yjAAoJEN0jrNd/PrOhmUEQAK73RCf3YtRpEFMWOFIrU6cG
 5YsUw5auf65Bc98mFn9a+3lEUMl7QBpLrY3QialllK+CA4pQDs74fwk3rEZ0pSIK
 BUQMaKpkoYsfEqbsV3zEYLfVXkoK5oss1Vd6KfjR0qH4dDQJ8cAEPHkm0KGs4Mxo
 ud1AsZ/0L/3zQEvSZqdEks7N+g+yBXtSzx7CnQ8y9OEHdLQAvh5f1WD5rKc8ir+z
 P/ufsl16J365Sv4JTOzWQhnOaQXgSyzM+CECGZtcCTd0GTel1y6O+SRgIkKv9nD5
 jeFcPMuMYvPKD4FeZgedMia1NQd1mkwWA5gEb4KwOfxgGFUKkYft6hy2Zx4wUVm2
 I9tvDhzzOJduJUu3F69Zws6ztHUPB5zM3hIrSPptkOVME6k063TBGVItGH0NgJAT
 fubvqi0xbVHhZ6jGSY6kwwo1nnIB2DtPcgF8Gm0bHctF4Zveyo3Vq5iyaTWPjEhj
 l+qc1rTgmQf2lFvMUXEsIQbl8b8m/UcWK2hrGj7Wq0qvD8CwP4wg0S8uRm+hDBX0
 ZUk0lIqC1PBDZkVETkzNEpXI6eKeixaXYgr6jsCCFUZdBmeFJ/4m+Kbn5xCNObGJ
 pwGkhSZceBABgGz/p/yfAS0RRlmfYotg4yRa0JHkVgfK2oqOtAl5QiQzN4fMyRkt
 vAPrcTd61LCB4hiC31K3
 =yX4c
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-4.7-gm20b' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt64

Merge "arm64: tegra: Enable GM20B GPU on Tegra210" from Thierry Reding:

Complement the GM20B GPU device tree node on Tegra210 with missing
properties to make it usable.

* tag 'tegra-for-4.7-gm20b' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Add IOMMU node to GM20B on Tegra210
  arm64: tegra: Add reference clock to GM20B on Tegra210
  dt-bindings: Add documentation for GM20B GPU
  dt-bindings: gk20a: Document iommus property
  dt-bindings: gk20a: Fix typo in compatible name
2016-05-10 22:18:14 +02:00
Alexandre Courbot
30f949bc66 arm64: tegra: Add IOMMU node to GM20B on Tegra210
The operating system driver can take advantage of the IOMMU to remove
the need for physically contiguous memory buffers.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-04-26 18:41:43 +02:00
Alexandre Courbot
4a0778e98f arm64: tegra: Add reference clock to GM20B on Tegra210
This clock is required for the GPU to operate.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-04-26 18:41:05 +02:00
Rhyland Klein
8d53957c66 arm64: tegra: Enable cros-ec and charger on Smaug
Add nodes for the ChromeOS Embedded Controller and for the gas gauge
connected to the I2C bus that it controls.

Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-04-15 15:36:38 +02:00