The timer code relies on #defines from mach/iomap.h, cpu_is_*()
checks, and a global irq #define. All this makes this file
impossible to compile in a mult-target build. Therefore, make a
sys_timer struct for each SoC so that machine descriptors can
reference the correct timer. Then go through and replace all the
defines with raw values that are passed to a common
initialization function.
This paves the way to adding DT support to this code as well as
allows us to compile this file on multiple targets at the same
time.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
The MSM code has some antiquated register writes to set up the
PPIs to be edge triggered. Now that we have the percpu irq
interface we don't need this code so let's remove it and update
the percpu irq user (msm_timer) to set the irq type.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
This board file has never been compiled. Let's just remove it
along with the one Kconfig reference to it in io.c.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
This is dead code that isn't initialized or setup (although it is
compiled). Remove it and the data structures it references.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Using list_move_tail() instead of list_del() + list_add_tail().
spatch with a semantic match is used to found this problem.
(http://coccinelle.lip6.fr/)
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: David Brown <davidb@codeaurora.org>
Add this entry to the Makefile so that we can build the dtb
automatically with 'make dtbs'.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Commit 041f777 (ARM: msm: convert SMP platforms to
CONFIG_MULTI_IRQ_HANDLER, 2011-09-06) forgot to add the
.handle_irq for the DT machine record. Add it so we get
interrupts instead of panics on DT enabled bootloaders.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
The uart mapping runs into the space allocated for lowmem on some
8960 boards when we have more than 512Mb of memory. We were
getting lucky before and our mapping wasn't part of DDR. Move the
mapping up into the vmalloc area which will always be outside of
the lowmem mapping regardless of how much lowmem actually exists.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Forcing arm_pm_idle to be msm_idle() doesn't make sense in
configurations that don't have CONFIG_MSM7X00A_IDLE=y (i.e. any
targets that aren't 7x00a). Furthermore, that config doesn't even
exist, so this entire file is dead code. Just remove it so we can
use the default idle support on MSM.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
These functions are only used within clock-pcom.c, therefore mark
them as static.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
This reset hook is never assigned and is dead code. Remove it so
we have one less header file in the mach directory.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
With 3.4 kernel the static iomappings can be shared with the ioremap
mappings. If ioremap is called with an address for which a static
mapping already exists, then that mapping should be used instead
of creating a new one.
However, the MT_DEVICE_NONSHARED flag prevents this. Hence, get rid
of this flag. Some targets (7X00) that require the static iomappings
to be NONSHARED use the MSM_DEVICE_TYPE and MSM_CHIP_DEVICE_TYPE macros.
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Hotplug function put CPU in offline or online mode at runtime.
When the CPU been put into offline, it was been clock gated. The
offline CPU can be power gated, when the remaining CPU goes into
LP2.
Based on the worked by:
Colin Cross <ccross@android.com>
Gary King <gking@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Hotplug function put CPUs in offline or online state at runtime.
When the CPU been put in the offline state, it was been clock and
power gated. Except primary CPU other CPUs can be hotplugged.
Based on the work by:
Scott Williams <scwilliams@nvidia.com>
Colin Cross <ccross@android.com>
Gary King <gking@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
There are some common macros for Tegra low-level assembly code. Clean
up them into one header file and move the definitions that will be
re-used into it as well.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Replacing the code that directly access to CAR registers with
tegra_cpu_car_ops. This ops hides CPU CAR access inside and
provides control interface for it.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The tegra_cpu_car_ops provide the interface for CPU to control
it's clock gating and reset status. The other drivers should use
this for CPU control. And should not directly access CAR registers
to control CPU.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tegra20 clock table have the entry for clock (tegra_i2c.x, "i2c")
which is no more require as driver acquire clock with name of
"div-clk" and "fast-clk".
Remove these entries from table.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Add connection name "div-clk" for the i2c clock entry.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tegra's i2c controller require two clock sources named as
div-clk and fast-clk for proper operation.
Currently, the entry of fast-clk is missing in tegra30
clock table and it is incorrectly named in the tegra20
clock table.
Adds aliases to enable lookups for "fast-clk" to succeed.
A later patch will remove the incorrectly named clock,
once the driver is modified to use the new name.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
A previous patch[1] added code to initialize an FPGA register on the
8660 "SURF" development platform. Since this development platform is
not widely available, and there is now a more available device "the
Dragonboard" based on the same core SOC, this change was dropped.
However, the DT code kept a lingering call to this FPGA init function.
Remove it.
[1] https://lkml.org/lkml/2011/8/12/357
Signed-off-by: David Brown <davidb@codeaurora.org>
Clockevent's frequency is changed upon cpufreq change
notification. It fetches local timer's rate to update the
clockevent frequency. This patch adds local timer clock
for Tegra20.
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
* commit 'v3.6-rc5': (1098 commits)
Linux 3.6-rc5
HID: tpkbd: work even if the new Lenovo Keyboard driver is not configured
Remove user-triggerable BUG from mpol_to_str
xen/pciback: Fix proper FLR steps.
uml: fix compile error in deliver_alarm()
dj: memory scribble in logi_dj
Fix order of arguments to compat_put_time[spec|val]
xen: Use correct masking in xen_swiotlb_alloc_coherent.
xen: fix logical error in tlb flushing
xen/p2m: Fix one-off error in checking the P2M tree directory.
powerpc: Don't use __put_user() in patch_instruction
powerpc: Make sure IPI handlers see data written by IPI senders
powerpc: Restore correct DSCR in context switch
powerpc: Fix DSCR inheritance in copy_thread()
powerpc: Keep thread.dscr and thread.dscr_inherit in sync
powerpc: Update DSCR on all CPUs when writing sysfs dscr_default
powerpc/powernv: Always go into nap mode when CPU is offline
powerpc: Give hypervisor decrementer interrupts their own handler
powerpc/vphn: Fix arch_update_cpu_topology() return value
ARM: gemini: fix the gemini build
...
Conflicts:
drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
drivers/rapidio/devices/tsi721.c
Convert Tegra to use struct smp_operations to provide its SMP
and CPU hotplug operations.
Tested on Harmony.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Convert OMAP4 to use struct smp_operations to provide its SMP
and CPU hotplug operations.
Tested on both Panda and IGEPv2 (MULTI_OMAP kernel)
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Convert both Realview and VExpress to use struct smp_operations to
provide their SMP and CPU hotplug operation.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This adds a 'struct smp_operations' to abstract the CPU initialization
and hot plugging functions on SMP systems, which otherwise conflict
in a multiplatform kernel. This also helps shmobile and potentially
others that have more than one method to do these.
To allow the kernel to continue building, the platform hooks are
defined as weak symbols which are overrided by the platform code.
Once all platforms are converted, the "weak" attribute will be
removed and the function made static.
Unlike the original version from Marc, this new version from Arnd
does not use a generalized abstraction for per-soc data structures
but only tries to solve the problem for the SMP operations. This
way, we can collapse the previous four data structures into a
single struct, which is less systematic but also easier to follow
as a causal reader.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- A set of OMAP fixes, about half of them PM/clock related, the rest
scattered over the platform code but all small and targeted to real bugs.
- Two small i.MX fixes for SSI device clock setup.
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull arm-soc bug fixes from Olof Johansson:
- A set of OMAP fixes, about half of them PM/clock related, the rest
scattered over the platform code but all small and targeted to real
bugs.
- Two small i.MX fixes for SSI device clock setup.
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: clk-imx35: Fix SSI clock registration
ARM: clk-imx25: Fix SSI clock registration
ARM: OMAP4: Fix array size for irq_target_cpu
ARM: OMAP4: hwmod data: temporarily comment out data for the sl2if IP block
ARM: OMAP: hwmod code: Disable module when hwmod enable fails
ARM: OMAP3: hwmod data: fix iva2 reset info
ARM: OMAP3xxx: clockdomain: fix software supervised wakeup/sleep
ARM: OMAP2+: am33xx: Fix the timer fck clock naming convention
ARM: OMAP: Config fix for omap3-touchbook board
ARM: OMAP: sram: skip the first 16K on OMAP3 HS
ARM: OMAP: sram: fix OMAP4 errata handling
ARM: OMAP: timer: obey the !CONFIG_OMAP_32K_TIMER
This is three ux500 core updates with no direct relation
but grouped in a pull request:
- Set the proper GIC flags to mask when suspended and
skip wake.
- Fix a build error introduced from the PMU patch set
- Provide a fixed regulator for the Snowball when not
using DT.
* tag 'ux500-core-updates' of http://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: Provide SMSC911x fixed-regulator when not booting DT
ARM: ux500: Fix build error due to missing include of asm/pmu.h in cpu-db8500.c
ARM: ux500: set proper GIC flags
From "Uwe Kleine-Knig" <u.kleine-koenig@pengutronix.de>:
this is the 2nd version of this series whose goal is to make struct
of_device_id.data const. Conceptually a driver must not modify the data
contained there so making it const is the right thing.
v1 of this series was sent with Message-id:
1342182734-321-1-git-send-email-y. Changes since then are:
- powerpc fixes
- several new consts that were found by Arnd that are possible after
patch 19.
Arnd suggested to take this series via arm-soc late for 3.6 in one go
because patch 19 depends on the former patches but is a precondition to
the latter and it fixes a few warnings. So getting it in via the
respective maintainer trees would need a much bigger coordination
effort. That means I prefer getting Acks over you taking the patch.
Vinod Koul already took
dmaengine: at_hdmac: add a few const qualifiers
that is in next-20120723 as 7fd63ccdad now. Vinod, I don't follow your
pull requests, but assuming you didn't let it already pull for 3.6 I
suggest you drop it from your queue and I just take your Ack.
This series was build tested for arm (all defconfigs) and powerpc (all
defconfigs and an allyesconfig) and grep didn't find more issues. As
before it introduces a warning in drivers/regulator/twl-regulator.c.
This driver does modify its .of_match_table when a device is bound which
doesn't fits the concept of independant devices. Arnd noticed another
new warning in drivers/scsi/qlogicpti.c that isn't that easy to resolve,
because the pointer to (now) const data is passed as first argument to
scsi_host_alloc. To fix that properly struct Scsi_Host.hostt needs to
get a const, too. Alternatively I could introduce a cast removing the
const, but I don't like that.
* 'ofdeviceiddata' of git://git.pengutronix.de/git/ukl/linux: (25 commits)
dma: tegra: make data used as *of_device_id.data const
can: mpc5xxx_can: make data used as *of_device_id.data const
macintosh/mediabay: make data used as *of_device_id.data const
i2c/mpc: make data used as *of_device_id.data const
mfd/da9052: make i2c_device_id array const
powerpc/fsl_msi: drop unneeded cast to non-const pointer
gpio/gpio-omap: make platformdata used as *of_device_id.data const
of: add const to struct *of_device_id.data
dma: tegra: make tegra_dma.chip_data a pointer to const data
watchdog/mpc8xxx: add a const qualifier
powerpc/celleb_pci: add a const qualifier
powerpc/fsl_msi: add a const qualifier
powerpc/83xx: add a const qualifier
macintosh/mediabay: add a const qualifier
mmc/omap_hsmmc: add a const qualifier
i2c/mpc: add a const qualifier
i2c/i2c-omap: add a const qualifier
gpio/mpc8xxx: add a const qualifier
gpio/gpio-omap.c: add a const qualifier
misc/atmel_tc: make atmel_tc.tcb_config member point to const data
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[olof: repulled a v3 version of the branch that rebased to add some more
acked-bys and added one more patch on top for tegra]
Signed-off-by: Olof Johansson <olof@lixom.net>
Generic PWM framework requires that the board setup code
register a static mapping that can be used to match PWM
consumers to providers.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Reviewed-by: <thierry.reding@avionic-design.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Generic PWM framework requires that the board setup code
register a static mapping that can be used to match PWM
consumers to providers.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Reviewed-by: <thierry.reding@avionic-design.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
It replaces the clk_register_clkdev in imx6q clock driver with DT
lookup. It depends on Mike's clk-3.7 branch.
When it gets merged together with imx-dt-3.7, there is a trivial
conflict on arch/arm/boot/dts/imx6q.dtsi.
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Merge tag 'imx-clk-dt-lookup' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/dt
It replaces the clk_register_clkdev in imx6q clock driver with DT
lookup. It depends on Mike's clk-3.7 branch.
* tag 'imx-clk-dt-lookup' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: imx6q: replace clk_register_clkdev with clock DT lookup
Resolved context add/remove conflict in arch/arm/boot/dts/imx6q.dtsi
- All imx53 board files are removed by the equal device tree support
- The efikamx board files are removed to ease device tree migration
- Remove dummy pinctrl state by setting up pinctrl in device tree
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Merge tag 'imx-dt-3.7' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/dt
- All imx53 board files are removed by the equal device tree support
- The efikamx board files are removed to ease device tree migration
- Remove dummy pinctrl state by setting up pinctrl in device tree
* tag 'imx-dt-3.7' of git://git.linaro.org/people/shawnguo/linux-2.6: (28 commits)
ARM: imx6q-sabrelite: Rename 'pinctrl_gpio_hog'
ARM: imx51: decouple device tree boot from board files
ARM: imx51: build in pinctrl support
ARM: dts: imx51-babbage: add pinctrl settings
ARM: imx53: remove unneeded files and functions
ARM: imx53: support device tree boot only
ARM: imx53: decouple device tree boot from board files
ARM: imx53: build in pinctrl support
ARM: dts: imx53-smd: add pinctrl settings
ARM: dts: imx53-evk: add pinctrl settings
ARM: dts: imx53-ard: add pinctrl settings
ARM: dts: imx53-qsb: add pinctrl settings
ARM: imx6q: remove dummy pinctrl state
ARM: dts: imx6q-sabresd: add pinctrl settings
ARM: dts: imx6q-arm2: add pinctrl for uart and enet
ARM: dts: imx6q-sabrelite: add pinctrl for usdhc and enet
ARM: dts: imx6q: sort iomuxc sub-nodes in name
ARM: dts: imx6q: name iomuxc sub-nodes following pin function
ARM: dts: imx6q: improve indentation for fsl,pins
ARM: efikamx: remove Genesi Efika MX platform files from the tree
...
Resolved trivial context conflict in arch/arm/boot/dts/imx51-babbage.dts
It replaces clk_register_clkdev in mxs clock driver with DT lookup.
The series depends on pull request mxs-dt-3.7 and Mike's clk branch
below.
git://git.linaro.org/people/mturquette/linux.git clk-3.7
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Merge tag 'mxs-clk-dt-lookup' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/dt
It replaces clk_register_clkdev in mxs clock driver with DT lookup.
* tag 'mxs-clk-dt-lookup' of git://git.linaro.org/people/shawnguo/linux-2.6:
clk: mxs: replace imx23 clk_register_clkdev with clock DT lookup
clk: mxs: replace imx28 clk_register_clkdev with clock DT lookup
* 'clk-3.7' of git://git.linaro.org/people/mturquette/linux:
clk: add of_clk_src_onecell_get() support
clk: ux500: Define smp_twd clock for u8500
mfd: dbx500: Provide a more accurate smp_twd clock
clk: ux500: Support for prmcu_rate clock
clk: Provide option for clk_get_rate to issue hw for new rate
clock: max77686: Add driver for Maxim 77686 32Khz crystal oscillator.
ARM: ux500: Switch to use common clock framework
clk: ux500: Clock definitions for u8500
clk: ux500: First version of clock definitions for ux500
clk: ux500: Adapt PRCMU and PRCC clocks for common clk
clk: versatile: make config option boolean
clk: add Loongson1B clock support
arm: mmp: make all SOCs use common clock by default
clk: mmp: add clock definition for mmp2
clk: mmp: add clock definition for pxa910
clk: mmp: add clock definition for pxa168
clk: mmp: add mmp specific clocks
clk: convert ARM RealView to common clk
clk: prima2: move from arch/arm/mach to drivers/clk
ARM: PRIMA2: convert to common clk and finish full clk tree
The armadillo800eva has S35390A which is RTC. This is controlled
using I2C of GPIO.
This commit supports RTC of armadillo800eva.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
Calxeda highbank SATA phy has intermittent problems bringing up a link
with Gen3 drives. Retrying the phy hard reset can work-around this issue,
but each reset also disables spread spectrum support. The reset function
also needs to reprogram the phy to enable spread spectrum support.
Create a new driver based on ahci_platform to support the Calxeda Highbank
SATA controller.
Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
should now boot on mainline after this is applied, according to
Vaibhav.
This second version includes trailing commas at the end of structure
records at Tony's request. It also adds a OMAP_INTC_START macro
expansion to each IRQ number to make the sparseirq conversion easier.
Basic build, boot, and PM test transcripts are here:
http://www.pwsan.com/omap/testlogs/am33xx_hwmod_clock_devel_3.7/20120912165952/
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Merge tag 'omap-devel-a2-for-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into devel-am33xx
AM33xx hwmod data and miscellaneous clock and hwmod fixes. AM33xx
should now boot on mainline after this is applied, according to
Vaibhav.
This second version includes trailing commas at the end of structure
records at Tony's request. It also adds a OMAP_INTC_START macro
expansion to each IRQ number to make the sparseirq conversion easier.
Basic build, boot, and PM test transcripts are here:
http://www.pwsan.com/omap/testlogs/am33xx_hwmod_clock_devel_3.7/20120912165952/
Allows omap_device layer to keep track of driver bound status in order
to make more intelligent decisions about idling unused devices.
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Merge tag 'for_3.7-omap_device' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into devel-omap-device
Updates for omap_device layer for v3.7.
Allows omap_device layer to keep track of driver bound status in order
to make more intelligent decisions about idling unused devices.
The wakeupgen context-save code reads and stores the AUXCOREBOOT0 and
AUXCOREBOOT1 register contents twice. This seems like a waste of
time, so, remove the duplicates.
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
These changes fix some of the more meaningful warnings that smatch
returns for the OMAP subarch code, and unwraps strings that are
wrapped at the 80-column boundary, to conform with the current
practice.
Basic build, boot, and PM logs are available here:
http://www.pwsan.com/omap/testlogs/warnings_a_cleanup_3.7/20120912025927/
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Merge tag 'omap-cleanup-b-for-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into cleanup-makefile-sparse
smatch and string-wrapping cleanups for the OMAP subarch code.
These changes fix some of the more meaningful warnings that smatch
returns for the OMAP subarch code, and unwraps strings that are
wrapped at the 80-column boundary, to conform with the current
practice.
Basic build, boot, and PM logs are available here:
http://www.pwsan.com/omap/testlogs/warnings_a_cleanup_3.7/20120912025927/
arch/arm/mach-omap2/Makefile. Beyond readability and diffstat
improvements, the series should reduce the risk of conflicts during
future cleanups by ensuring related lines are in the same section of the
Makefile.
Test results are available here:
http://www.pwsan.com/omap/testlogs/makefile_cleanup_3.7/20120911191710/
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Merge tag 'omap-cleanup-a-for-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into cleanup-makefile-sparse
Clean up and standardize several parts of
arch/arm/mach-omap2/Makefile. Beyond readability and diffstat
improvements, the series should reduce the risk of conflicts during
future cleanups by ensuring related lines are in the same section of the
Makefile.
Test results are available here:
http://www.pwsan.com/omap/testlogs/makefile_cleanup_3.7/20120911191710/
There's no need to have these in plat-omap any longer. Note that these
could eventually be made local to mach-omap1 instead of being in mach.
But to do that, at least various driver access using omap7xxx.h registers
needs to be fixed first.
Cc: spi-devel-general@lists.sourceforge.net
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Tony Lindgren <tony@atomide.com>
These can now be moved to be local headers in mach-omap2.
Note that this patch removes arch/arm/plat-omap/devices.c as it
will get removed anyways with Paul Walmsley's patch
"ARM: OMAP: split OMAP1, OMAP2+ RNG device registration".
Signed-off-by: Tony Lindgren <tony@atomide.com>
As the plat and mach includes need to disappear for single zImage work,
we need to remove plat/hardware.h.
Do this by splitting plat/hardware.h into omap1 and omap2+ specific files.
The old plat/hardware.h already has omap1 only defines, so it gets moved
to mach/hardware.h for omap1. For omap2+, we use the local soc.h
that for now just includes the related SoC headers to keep this patch more
readable.
Note that the local soc.h still includes plat/cpu.h that can be dealt
with in later patches. Let's also include plat/serial.h from common.h for
all the board-*.c files. This allows making the include files local later
on without patching these files again.
Note that only minimal changes are done in this patch for the
drivers/watchdog/omap_wdt.c driver to keep things compiling. Further
patches are needed to eventually remove cpu_is_omap usage in the drivers.
Also only minimal changes are done to sound/soc/omap/* to remove the
unneeded includes and to define OMAP44XX_MCPDM_L3_BASE locally so there's
no need to include omap44xx.h.
While at it, also sort some of the includes in the standard way.
Cc: linux-watchdog@vger.kernel.org
Cc: alsa-devel@alsa-project.org
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Jarkko Nikula <jarkko.nikula@bitmer.com>
Cc: Liam Girdwood <lrg@ti.com>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Remove hardcoded IRQs in irqs.h and related files as these
are no longer needed.
Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
As the interrupts should only be defined in the platform_data, and
eventually coming from device tree, there's no need to define them
in header files.
Let's remove the hardcoded references to irqs.h and fix up the includes
so we don't rely on headers included in irqs.h. Note that we're
defining OMAP_INTC_START as 0 to the interrupts. This will be needed
when we enable SPARSE_IRQ. For some drivers we need to add
#include <plat/cpu.h> for now until these drivers are fixed to
remove cpu_is_omapxxxx() usage.
While at it, sort som of the includes the standard way, and add
the trailing commas where they are missing in the related data
structures.
Note that for drivers/staging/tidspbridge we just define things
locally.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This way we can remove includes of plat/gpio.h which won't work
with the single zImage support.
Note that we also remove the cpu_class_is_omap2() check
in gpio-omap.c as the drivers should not call it as we need to
make it local to arch/arm/mach-omap2 for single zImage support.
While at it, arrange the related includes in the standard way.
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: linux-mtd@lists.infradead.org
Cc: alsa-devel@alsa-project.org
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
We can't use hardcoded interrupts for SPARSE_IRQ, and can replace
the hardcoded gpio_base with twl_gpiochip.base after it's been
allocated.
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Samuel Ortiz <sameo@linux.intel.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This is no longer needed and assumes a fixed IRQ number
that won't work with SPARSE_IRQ.
Acked-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Pull ARM fixes from Russell King:
"It's been a while... so there's a little more here than normal.
Mostly updates from Will for the breakpoint stuff, and plugging a few
holes in the user access functions which crept in when domain support
was disabled for ARMv7 CPUs."
* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
ARM: 7529/1: delay: set loops_per_jiffy when moving to timer-based loop
ARM: 7528/1: uaccess: annotate [__]{get,put}_user functions with might_fault()
ARM: 7527/1: uaccess: explicitly check __user pointer when !CPU_USE_DOMAINS
ARM: 7526/1: traps: send SIGILL if get_user fails on undef handling path
ARM: 7521/1: Fix semihosting Kconfig text
ARM: 7513/1: Make sure dtc is built before running it
ARM: 7512/1: Fix XIP build due to PHYS_OFFSET definition moving
ARM: 7499/1: mm: Fix vmalloc overlap check for !HIGHMEM
ARM: 7503/1: mm: only flush both pmd entries for classic MMU
ARM: 7502/1: contextidr: avoid using bfi instruction during notifier
ARM: 7501/1: decompressor: reset ttbcr for VMSA ARMv7 cores
ARM: 7497/1: hw_breakpoint: allow single-byte watchpoints on all addresses
ARM: 7496/1: hw_breakpoint: don't rely on dfsr to show watchpoint access type
ARM: Fix ioremap() of address zero
closer for being just a regular device driver.
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mergetag object cf3a6ec2c0
type commit
tag cleanup-omap-tags-for-v3.7
tagger Tony Lindgren <tony@atomide.com> 1347323254 -0700
Remove the ancient omap specific atags that are no longer needed.
At some point we were planning to pass the bootloader information
with custom atags that did not work out too well.
There's no need for these any longer as the kernel has been booting
fine without them for quite some time. And Now we have device tree
support that can be used instead.
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Merge tags 'omap-devel-gpmc-fixed-for-v3.7' and 'cleanup-omap-tags-for-v3.7' into cleanup-sparseirq
Changes for GPMC (General Purpose Memory Controller) that take it
closer for being just a regular device driver.
Remove the ancient omap specific atags that are no longer needed.
At some point we were planning to pass the bootloader information
with custom atags that did not work out too well.
There's no need for these any longer as the kernel has been booting
fine without them for quite some time. And Now we have device tree
support that can be used instead.
Currently, the device names for the dcan module follows the
format "dcan.X", where 'X' is the dcan instance number.
On other side, driver may request for clock with/without con_id
and dev_id, and it is expected that platform should respect this
request and return the requested clock handle.
Now, when using device tree, the format of the device name created
by OF layer is different, "<reg-address>.<device-name>",
assuming that the device-tree "reg" property is specified.
This causes the look-up failure for clock node in dcan driver
To fix this add new dcan clock alias for using device-tree.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Rob Herring <robherring2@gmail.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add missing soc_is_am33xx() check for DPLL common control & clock
related functions, without this dpll programmability would be broken
for am33xx family of devices.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Under some circumstances, drivers may leave an omap_device enabled due
to driver programming errors, or due to a failure in the drivers
probe method.
Using the recently added omap_device driver_status field, we can
detect conditions where an omap_device is enabled but has no driver
bound and then ensure that the device is properly idled until it can
be probed again.
The goal of this feature is not only to detect and warn on these error
conditions, but also to ensure that devices are properly put in
low-power states so they do not prevent SoC-wide low-power states.
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Currently, the omap_device PM domain layer uses the late suspend and
early resume callbacks to ensure devices are in their low power
states.
However, this is attempted even in cases where a driver probe has
failed. If a driver's ->probe() method fails, the driver is likely in
a state where it is not expecting its runtime PM callbacks to be
called, yet currently the omap_device PM domain code attempts to call
the drivers callbacks.
To fix, use the omap_device driver_status field to check whether a
driver is bound to the omap_device before attempting to trigger driver
callbacks.
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Use the bus notifier to keep track of driver bound status by adding a
new internal field to struct omap_device: _driver_status.
This will be useful for follow-up patches which need to know whether
or not a driver is bound in order to make intelligent omap_device
enable/idle decisions.
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
The ipu_di0 and ipu_di1 muxes referenced to nonexisting clocks. Use
ldb_di0_gate and ldb_di1_gate instead.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Platform dependant UART data refers to MX31 macro for MX35 machines.
For all other machines, macro usage matches machine type.
Though this compiles out to the same result, it looks much like
a typo, so fix it to use the right macros instead.
Signed-off-by: Oskar Schirmer <oskar@scara.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This also removes mach/clock.h along the way
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Mike Turquette <mturquette@linaro.org>
The only code using mxc_decode_pll is clk-pllv1.c, so move the code
there.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Mike Turquette <mturquette@linaro.org>
Find and unwrap wrapped strings in the style:
pr_debug("clockdomain: hardware cannot set/clear wake up of "
"%s when %s wakes up\n", clkdm1->name, clkdm2->name);
Keeping these strings contiguous seems to be the current Linux kernel
policy.
The offending lines were found with the following command:
pcregrep -rnM '"\s*$\s*"' arch/arm/*omap*
While here, some messages have been clarified, some pr_warning(
... calls have been converted to pr_warn( ..., and some printk(KERN_*
... have been converted to pr_*.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Resolve the following warnings from smatch:
arch/arm/mach-omap2/gpmc.c:282 gpmc_cs_set_timings() info: why not propagate 'div' from gpmc_cs_calc_divider() instead of -1?
arch/arm/mach-omap2/serial.c:328 omap_serial_init_port() error: 'pdev' dereferencing possible ERR_PTR()
arch/arm/mach-omap2/timer.c:213 omap2_gp_clockevent_init() Error invalid range 4096 to -1
arch/arm/mach-omap2/gpio.c:63 omap2_gpio_dev_init() warn: possible memory leak of 'pdata'
arch/arm/mach-omap2/omap_hwmod.c:1478 _assert_hardreset() warn: assigning -22 to unsigned variable 'ret'
arch/arm/mach-omap2/omap_hwmod.c:1487 _assert_hardreset() warn: 4294963201 is more than 255 (max '(ret)' can be) so this is always the same.
arch/arm/mach-omap2/omap_hwmod.c:1545 _read_hardreset() warn: assigning -22 to unsigned variable 'ret'
arch/arm/mach-omap2/omap_hwmod.c:1554 _read_hardreset() warn: 4294963201 is more than 255 (max '(ret)' can be) so this is always the same.
arch/arm/mach-omap2/dpll3xxx.c:629 omap3_clkoutx2_recalc() error: we previously assumed 'pclk' could be null (see line 627)
arch/arm/mach-omap2/board-n8x0.c:422 n8x0_mmc_late_init() Error invalid range 14 to 13
arch/arm/mach-omap1/leds-h2p2-debug.c:71 h2p2_dbg_leds_event() error: potentially derefencing uninitialized 'fpga'.
arch/arm/plat-omap/mux.c:79 omap_cfg_reg() Error invalid range 4096 to -1
Thanks to Tony Lindgren <tony@atomide.com> for pointing out that BUG()
can be disabled. The changes in the first version that removed the
subsequent return() after BUG() states have been dropped.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
The prm44xx.o and sleep44xx.o build directives belong with the other
PRCM- and PM-related build sections in the Makefile; move them there.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Move MPU INTCPS (interrupt controller) and secure monitor code build
directives to their own Makefile sections, for clarity. Coalesce
SDRC-related Makefile directives into the SDRC Makefile section.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Move the omap_hwmod_common_data.o build directive down to the hwmod
data Makefile section where it belongs. Move the omap_hwmod.o build
directive to the top 'Common support' line, since we have no separate
hwmod code Makefile section, and it's currently needed for all OMAP2+.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
This patch adds HWMOD data for all the peripherals of
AM335X device and also hooks up to the existing OMAP framework.
hwmod data has been already been cleaned up for the recent
changes in clocktree, where all leaf nodes have been removed,
since with modulemode based control, both clock and hwmod
interface does same thing. This reduces the code size to large
extent and also avoids duplication of same control.
So instead of specifying module's leaf node as a main_clk,
now we are relying on parent clock of module's functional clock.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: removed period in hwmod device names; changed mmc2 main_clk
to mmc_clk at Vaibhav's request; added trailing commas to structure
records at Tony's request to deal with some rmk parsing issues; added
OMAP_INTC_START to facilitate sparse-IRQ conversion]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
AM33XX PRCM architecture is different that any OMAP family
of devices, so it is required to have separate implementation
to handle AM33XX module enable/disable, reset assert/deassert
functionality.
This patch adds wrapper api's in omap_hwmod framework to
access prm/cm for AM33XX family of devices.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
[paul@pwsan.com: fixed checkpatch messages]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Here we have a bunch of miscellaneous cleanups and fixes
to the musb driver. It fixes a bunch of mistakes errors
which nobody has triggered before, so I'm not Ccing stable
tree.
We are finally improving OMAP's VBUS/ID Mailbox usage so
that we can introduce our PHY drivers properly. Also, we're
adding support for multiple instances of the MUSB IP in
the same SoC, as seen on some platforms from TI which
have 2 MUSB instances.
Other than that, we have some small fixes like not kicking
DMA for a zero byte transfer, or properly handling NAK timeout
on MUSB's host side, and the enabling of DMA Mode1 for any
transfers which are aligned to wMaxPacketSize.
All patches have been pending on mailing list for a long time
and I don't expect any big surprises with this pull request.
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Merge tag 'musb-for-v3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next
usb: musb: patches for v3.7 merge window
Here we have a bunch of miscellaneous cleanups and fixes
to the musb driver. It fixes a bunch of mistakes errors
which nobody has triggered before, so I'm not Ccing stable
tree.
We are finally improving OMAP's VBUS/ID Mailbox usage so
that we can introduce our PHY drivers properly. Also, we're
adding support for multiple instances of the MUSB IP in
the same SoC, as seen on some platforms from TI which
have 2 MUSB instances.
Other than that, we have some small fixes like not kicking
DMA for a zero byte transfer, or properly handling NAK timeout
on MUSB's host side, and the enabling of DMA Mode1 for any
transfers which are aligned to wMaxPacketSize.
All patches have been pending on mailing list for a long time
and I don't expect any big surprises with this pull request.
nop xceiv got its own header to avoid polluting otg.h. It has also
learned to work as USB2 and USB3 phys so we can use it on USB3
controllers.
Together with those two changes to nop xceiv, we're adding basic
PHY support to dwc3 driver, this is to allow platforms which actually
have a SW-controllable PHY talk to them through dwc3 driver.
We're adding a new phy driver for the OMAP architecture. This driver
is for the PHY found in OMAP4 SoCs, and a new phy driver for the
marvell architecture. An extra phy driver - for Tegra SoCs - is now
moving from arch/arm/mach-tegra* to drivers/usb/phy.
Also here, there's the creation of <linux/usb/phy.h> which should be
used from now on for PHY drivers, even those which don't support
OTG.
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Merge tag 'xceiv-for-v3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next
usb: xceiv: patches for v3.7 merge window
nop xceiv got its own header to avoid polluting otg.h. It has also
learned to work as USB2 and USB3 phys so we can use it on USB3
controllers.
Together with those two changes to nop xceiv, we're adding basic
PHY support to dwc3 driver, this is to allow platforms which actually
have a SW-controllable PHY talk to them through dwc3 driver.
We're adding a new phy driver for the OMAP architecture. This driver
is for the PHY found in OMAP4 SoCs, and a new phy driver for the
marvell architecture. An extra phy driver - for Tegra SoCs - is now
moving from arch/arm/mach-tegra* to drivers/usb/phy.
Also here, there's the creation of <linux/usb/phy.h> which should be
used from now on for PHY drivers, even those which don't support
OTG.
For Seaboard, Ventana, and Cardhu, add DT property to tell the regulator
that it should provide the pm_power_off() implementation. This allows
"shutdown" to work.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
When changing a PLL's rate, it must have no active children. The CPU
clock cannot be stopped, and CPU clock's divider is not used. The old
clock driver used to handle this by internally reparenting the CPU clock
onto a different PLL when changing the CPU clock rate. However, the new
common-clock based clock driver does not do this, and probably cannot do
this due to the locking issues it would cause.
To solve this, have the Tegra cpufreq driver explicitly perform the
reparenting operations itself. This is probably reasonable anyway,
since such reparenting is somewhat a matter of policy (e.g. which
alternate clock source to use, whether to leave the CPU clock a child
of the alternate clock source if it's running at the desired rate),
and hence is something more appropriate for the cpufreq driver than
the core clock driver anyway.
Cc: Prashant Gaikwad <pgaikwad@nvidia.com>
Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
32-bit math isn't enough when e.g. *prate=12000000, and sel->n=1000.
Use 64-bit math to prevent this.
Cc: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
It really becomes an maintenance issue that every time a device needs
to look up (clk_get) a clock we have to patch kernel clock file to call
clk_register_clkdev for that clock.
Since clock DT support which is meant to resolve clock lookup in device
tree is in place, the patch moves imx6q client devices' clock lookup
over to device tree, so that any new lookup to be added at later time
can just get done in DT instead of kernel.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
SSI block has two types of clock:
ipg: bus clock, the clock needed for accessing registers.
per: peripheral clock, the clock needed for generating the bit rate.
Currently SSI driver only supports slave mode and only need to handle
the ipg clock, because the peripheral clock comes from the master codec.
Only register the ipg clock and do not register the peripheral clock for ssi.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: stable@vger.kernel.org
SSI block has two types of clock:
ipg: bus clock, the clock needed for accessing registers.
per: peripheral clock, the clock needed for generating the bit rate.
Currently SSI driver only supports slave mode and only need to handle
the ipg clock, because the peripheral clock comes from the master codec.
Only register the ipg clock and do not register the peripheral clock for ssi.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Cc: stable@vger.kernel.org
The mailbox register for usb otg in omap is present in control module.
On detection of any events VBUS or ID, this register should be written
to send the notification to musb core.
Till we have a separate control module driver to write to control module,
omap2430 will handle the register writes to control module by itself. So
a new address space to represent this control module register is added
to usb_otg_hs.
Acked-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
'pinctrl_gpio_hog' is used to setup the pin functions, and it is not
neccesarily used only for GPIO pins, so remove 'gpio' from its name
to describe a more generic term.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Now, imx51 device tree kernel calls pinctrl to set up pins. The
function used to hook up non-DT pin setup is not needed for DT boot
any more. Remove it from DT image.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
With the imx51 DT board having pinctrl setup define in device tree,
it's time to remove dummy pinctrl state and build in the real imx51
pinctrl support.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Now imx53 is a device tree only platform, so the files and functions
used only by non-DT kernel can be removed.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
With device tree kernel provides the equal support as those imx53 board
files, it's time to remove the board files and get imx53 support device
tree only.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Now, imx53 device tree kernel calls pinctrl to set up pins. The
functions used to hook up non-DT pin setup is not needed for DT boot
any more. Remove them from DT image.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
As all imx53 boards booting from device tree have pinctrl set up in dts,
it's time to remove the dummy pinctrl state and build in the real imx53
pinctrl support.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Change the indentation for property fsl,pins a little bit, so that
the first and the last line get the same indentation with all other
lines. Then it will be easier to copy and past any of these lines.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This prepares *of_device_id.data becoming const. Without this change the
following warning would occur:
arch/arm/mm/cache-l2x0.c: In function 'l2x0_of_init':
arch/arm/mm/cache-l2x0.c:573:7: warning: assignment discards 'const' qualifier from pointer target type [enabled by default]
though.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
It really becomes a maintenance issue that every time a device needs
to look up (clk_get) a clock we have to patch kernel clock file to call
clk_register_clkdev for that clock.
Since clock DT support which is meant to resolve clock lookup in device
tree is in place, the patch moves imx23 client devices' clock lookup
over to device tree, so that any new lookup to be added at later time
can just get done in DT instead of kernel.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
It really becomes a maintenance issue that every time a device needs
to look up (clk_get) a clock we have to patch kernel clock file to call
clk_register_clkdev for that clock.
Since clock DT support which is meant to resolve clock lookup in device
tree is in place, the patch moves imx28 client devices' clock lookup
over to device tree, so that any new lookup to be added at later time
can just get done in DT instead of kernel.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add the two daisy-chains of 74hc595s shift registers available on the
CFA-10049.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
plat/board.h file is now empty - remove it.
Cc: Jarkko Lavinen <jarkko.lavinen@nokia.com>
Cc: Chris Ball <cjb@laptop.org>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: linux-mmc@vger.kernel.org
Cc: linux-mtd@lists.infradead.org
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
debug_card_init() function resides in the plat/board.h file.
Move it to a separate header file under plat/ so the board.h file can be
removed.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
omap1 lcd platform data resides inside plat/board.h while it
should be inside include/linux/...
Move the omap1 lcd platform data to include/linux/omapfb.h.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
omap1 backlight platform data resides inside plat/board.h while it
should be inside include/linux/...
Move the omap1 backlight platform data to
include/linux/platform_data/.
Cc: Richard Purdie <rpurdie@rpsys.net>
Cc: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
Cc: linux-fbdev@vger.kernel.org
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The omap custom initialization tags are not used anymore (if ever)
by the mainline kernel.
Thus remove the omap custom initialization tags.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The omap1 crystal setting uses the OMAP custom tags.
Those tags are not used in upstream kernel and therefore the crystal
type is never set by the tag parsing code on upstream kernels.
Remove the crystal tag parsing code.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The sti console workaround uses the OMAP custom tags.
Those tags are not used in upstream kernel and therefore the workaround
never fires on upstream kernels.
Remove the sti console workaround tags part.
This leaves the workaround functional part intact so can be reused if
needed.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The omap3evm has its revision information bits inside the plat/board.h
file. Those bits are not used anywhere in the upstream tree besides the
board-omap3evm.c file.
Move the OMAP3EVM_BOARD_GEN_* bits to the board file and remove the
get_omap3_evm_rev() function declaration.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Since commit 4fd0690bb0
"serial: pl011: implement workaround for CTS clear event issue"
the PL011 UART is no longer at risk to hang up, so get rid
of the callback altogether.
Cc: Rajanikanth H.V <rajanikanth.hv@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
struct omap_board_config_kernel defined in the board files
is always empty and does not bring any added value.
Remove the struct omap_board_config_kernel instances from the board
files.
Also remove the omap_get_nr_config() macro and the omap_get_var_config()
function as both are not used for quite a long time (if ever).
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
pdata and pdata->regs have been allocated in this function and
should be freed before leaving it, and in the other error handling
cases too.
spatch with a semantic match is used to found this problem.
(http://coccinelle.lip6.fr/)
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Acked-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Select PINCTRL in Kconfig under Typical OMAP configuration, this
is required to add pinctrl driver to omap2+ family of devices.
Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
[tony@atomide.com: updated to select pinctrl-single in defconfig]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add pinctrl driver entries for omap2+. These all use
the generic pinctrl-single driver for the padconf
registers.
Cc: devicetree-discuss@lists.ozlabs.org
Acked-by: Linus Walleij <linus.walleij@linaro.org>
[tony@atomide.com: updated to drop omap2420.dtsi rename changes]
Signed-off-by: Tony Lindgren <tony@atomide.com>
The extra serial port is not available on 34xx. And the current
omap3-beagle.dts file is for omap3-beagle-xm.dts as it lists 512MB
of memory.
Please somebody submit a new omap3-beagle.dts for the original 34xx
BeagleBoard after testing it properly.
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: devicetree-discuss@lists.ozlabs.org
Signed-off-by: Tony Lindgren <tony@atomide.com>
The __free_from_pool() function was changed in
e9da6e9905. Unfortunately, the test that
checks whether the provided (start,size) is within the DMA pool has
been improperly modified. It used to be:
if (start < coherent_head.vm_start || end > coherent_head.vm_end)
Where coherent_head.vm_end was non-inclusive (i.e, it did not include
the first byte after the pool). The test has been changed to:
if (start < pool->vaddr || start > pool->vaddr + pool->size)
So now pool->vaddr + pool->size is inclusive (i.e, it includes the
first byte after the pool), so the test should be >= instead of >.
This bug causes the following message when freeing the *first* DMA
coherent buffer that has been allocated, because its virtual address
is exactly equal to pool->vaddr + pool->size :
WARNING: at /home/thomas/projets/linux-2.6/arch/arm/mm/dma-mapping.c:463 __free_from_pool+0xa4/0xc0()
freeing wrong coherent size from pool
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Marek Szyprowski <m.szyprowski@samsung.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Lior Amsalem <alior@marvell.com>
Cc: Maen Suleiman <maen@marvell.com>
Cc: Tawfik Bayouk <tawfik@marvell.com>
Cc: Shadi Ammouri <shadi@marvell.com>
Cc: Eran Ben-Avi <benavi@marvell.com>
Cc: Yehuda Yitschak <yehuday@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
[m.szyprowski: rebased onto v3.6-rc5 and resolved conflict]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Support the blue LED connected to the LEDB pin of the TWL4030
on the Gumstix Overo.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
The Gumstix Overo is a computer on module using an OMAP3 processor.
This module must be plugged into an expansion board.
This patch adds a first device tree support for the Overo, using the
Tobi expansion board. The current support is able to boot and mount
the rootfs from MMC.
This patche also updates the omap3 dtb build target.
Currently working:
- mmc0 (on board microSD)
- i2c0 and i2c2 (i2c1 not used)
- led on GPIO
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
The delay functions may be called by some platforms between switching to
the timer-based delay loop but before calibration. In this case, the
initial loops_per_jiffy may not be suitable for the timer (although a
compromise may be achievable) and delay times may be considered too
inaccurate.
This patch updates loops_per_jiffy when switching to the timer-based
delay loop so that delays are consistent prior to calibration.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The user access functions may generate a fault, resulting in invocation
of a handler that may sleep.
This patch annotates the accessors with might_fault() so that we print a
warning if they are invoked from atomic context and help lockdep keep
track of mmap_sem.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The {get,put}_user macros don't perform range checking on the provided
__user address when !CPU_HAS_DOMAINS.
This patch reworks the out-of-line assembly accessors to check the user
address against a specified limit, returning -EFAULT if is is out of
range.
[will: changed get_user register allocation to match put_user]
[rmk: fixed building on older ARM architectures]
Reported-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Cc: stable@vger.kernel.org
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Pull DMA-mapping fixes from Marek Szyprowski:
"Another set of fixes for ARM dma-mapping subsystem.
Commit e9da6e9905 replaced custom consistent buffer remapping code
with generic vmalloc areas. It however introduced some regressions
caused by limited support for allocations in atomic context. This
series contains fixes for those regressions.
For some subplatforms the default, pre-allocated pool for atomic
allocations turned out to be too small, so a function for setting its
size has been added.
Another set of patches adds support for atomic allocations to
IOMMU-aware DMA-mapping implementation.
The last part of this pull request contains two fixes for Contiguous
Memory Allocator, which relax too strict requirements."
* 'fixes-for-3.6' of git://git.linaro.org/people/mszyprowski/linux-dma-mapping:
ARM: dma-mapping: IOMMU allocates pages from atomic_pool with GFP_ATOMIC
ARM: dma-mapping: Introduce __atomic_get_pages() for __iommu_get_pages()
ARM: dma-mapping: Refactor out to introduce __in_atomic_pool
ARM: dma-mapping: atomic_pool with struct page **pages
ARM: Kirkwood: increase atomic coherent pool size
ARM: DMA-Mapping: print warning when atomic coherent allocation fails
ARM: DMA-Mapping: add function for setting coherent pool size from platform code
ARM: relax conditions required for enabling Contiguous Memory Allocator
mm: cma: fix alignment requirements for contiguous regions
move mmp2 clock definition to another file. Then mmp2 can
choose common clock framework or private clock framework.
Signed-off-by: Chao Xie <xiechao.mail@gmail.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
move pxa910 clock definition to another file. Then pxa910 can
choose common clock framework or private clock framework.
Signed-off-by: Chao Xie <xiechao.mail@gmail.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
move pxa168 clock definition to another file. Then pxa168 can
choose common clock framework or private clock framework.
Signed-off-by: Chao Xie <xiechao.mail@gmail.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
the clock.c is mmp private implementation, make it excluded
from common clock framework
Signed-off-by: Chao Xie <xiechao.mail@gmail.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
* ks8695/boards:
ARM: ks8695: add board support for the OpenGear boards based on the KS8695
ARM: ks8695: add board support for the SnapGear boards based on the KS8695
A number of boards produced by OpenGear and based on the Micrel KS8695 SoC.
Add board support to the KS8695 kernel code to support them.
The following machine type entries will need to be added back into the
mach-types file with these in mainline:
cm4008 MACH_CM4008 CM4008 624
cm41xx MACH_CM41XX CM41XX 672
cm4002 MACH_CM4002 CM4002 876
im42xx MACH_IM42XX IM42XX 1105
im4004 MACH_IM4004 IM4004 1400
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
A number of boards produced by SnapGear are based on the Micrel KS8695 SoC.
Add board support to the KS8695 kernel code to support them.
The following machine type entries will need to be added back into the
mach-types file with these in mainline:
lite300 MACH_LITE300 LITE300 408
se4200 MACH_SE4200 SE4200 809
sg310 MACH_SG310 SG310 1564
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
Commit f447ed8b31 ("gpio: samsung: add flags specifier to
device-tree binding") adds a flag to represent active low state
for gpio line. Since gpio-keys on Origen board are active low,
using this flag to represent the same.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
file that affect booting on various omaps. Then some PM
related fixes for reset, sleep and wakeup.
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Merge tag 'omap-fixes-for-v3.6-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Fixes for timer, sram, memory corruption, and one board file that affect
booting on various omaps. Then some PM related fixes for reset, sleep
and wakeup.
* tag 'omap-fixes-for-v3.6-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP4: Fix array size for irq_target_cpu
ARM: OMAP4: hwmod data: temporarily comment out data for the sl2if IP block
ARM: OMAP: hwmod code: Disable module when hwmod enable fails
ARM: OMAP3: hwmod data: fix iva2 reset info
ARM: OMAP3xxx: clockdomain: fix software supervised wakeup/sleep
ARM: OMAP2+: am33xx: Fix the timer fck clock naming convention
ARM: OMAP: Config fix for omap3-touchbook board
ARM: OMAP: sram: skip the first 16K on OMAP3 HS
ARM: OMAP: sram: fix OMAP4 errata handling
ARM: OMAP: timer: obey the !CONFIG_OMAP_32K_TIMER
* 'lpc32xx/core' of git://git.antcom.de/linux-2.6:
ARM: LPC32xx: Remove board specific GPIO init
ARM: LPC32xx: Provide DMA filter callbacks via platform data
ARM: LPC32xx: Use handle_edge_irq() callback on edge type irqs
+ sync to 3.6-rc4
* 'lpc32xx/dts' of git://git.antcom.de/linux-2.6:
ARM: LPC32xx: Extend dts for EA3250 board
ARM: LPC32xx: Adjust device tree node to new standard num-cs
get_user may fail to load from the provided __user address due to an
unhandled fault generated by the access.
In the case of the undefined instruction trap, this results in failure
to load the faulting instruction, in which case we should send SIGILL to
the task rather than continue with potentially uninitialised data.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Cc: stable@vger.kernel.org
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
It seems we were missing some text in the title for the
semihosting DEBUG_LL option. Add in the "/O" and fix up some
minor typos in the help text.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
'make dtbs' in a clean tree will try running the dtc before actually
building it. Make these rules depend upon the scripts to build it.
Cc: <stable@vger.kernel.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
During the p2v changes, the PHYS_OFFSET #define moved into a
!__ASSEMBLY__ section. This causes a XIP build to fail with
arch/arm/kernel/head.o: In function 'stext':
arch/arm/kernel/head.S:146: undefined reference to 'PHYS_OFFSET'
Momentarily leave the #ifndef __ASSEMBLY__ section so we can
define PHYS_OFFSET for all compilation units.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Thanks to Vaibhav <hvaibhav@ti.com> omap_device fix
(ARM: OMAP: omap_device: Fix up resource names when booted with devicetre),
we can now specify reg and interrupts using standard device tree
attributes.
Update the OMAP4 dtsi file with missing reg and interrupts attributes.
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Felipe Balbi <balbi@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
The device/node resources (like, IORESOURCE_MEM and IORESOURCE_IRQ)
are overwritten by hwmod resources, due to all known reasons but
that should not be the reason for not providing all the information
in the DTS blob. Ideally we should use DTS resource and use HWMOD
framework wherever required and for only specific things.
Newer platforms like, OMAP5 and AM33XX, we only support DT boot mode,
so this patch is preparation for the future where we supposed to get
rid of hwmod dependency anyway.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
To make it consistent, convert all hex number presentation
to lower-case from all am33xx specific nodes.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Add the needed sections to enable audio support on BeagleBoard when booted
with DT blob.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
To be able to load the McPDM and DMIC driver when booted with device tree.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Create the sections describing the McBSP ports to be able to use them via
DT.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
In order to get the memory areas by name when booted with DT.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Create the sections describing the McBSP ports to be able to use them via
DT.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Create the needed sections to be able to probe McBSP ports via DT.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Since the board is based on OMAP2420 we should include the dedicated dtsi
file (which includes the common omap2 dtsi).
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
The McBSP IP within OMAP2420 and 2430 is different we need to create separate
dtsi files for them.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Add the support for D6 and D7 LEDs on Beagle board.
- D6 will be used for heartbeat
- D7 will be used for mmc0
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Add device tree properties for twl4030/gpio, according to the
platform data of corresponding boards. This enables the led
connected to LEDB output for both boards, as well as
pullups/pulldowns on GPIO for the BeagleBoard.
Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Vaibhav Hiremath <hvaibhav@ti.com>
Remove some useless comment and move GIC controller outside
of the OCP node since it does use the MPU internal bus and
not the OCP.
This will not change the functionality but will reflect the
reality more accurately.
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Add cortex-a9 local timer support for all OMAP4 based
SOCs using DT.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Provide PL310 Level 2 Cache Controller Device Tree
support for OMAP4 based devices.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Device tree data for the EMIF sdram controllers in OMAP4
and LPDDR2 memory devices attached to OMAP4 boards.
Reviewed-by: Grant Likely <grant.likely@secretlab.ca>
Tested-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Aneesh V <aneesh@ti.com>
[santosh.shilimkar@ti.com: Rebased against 3.6-rc]
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
[b-cousson@ti.com: Use label in board to access EMIF nodes]
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Add keypad data node in omap4 device tree file.
Also fill the device tree binding parameters
with the required value in "omap4-sdp" dts file.
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Felipe Balbi <balbi@ti.com>
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
[b-cousson@ti.com: Re-align the entries and the comments]
Add keypad data node in omap5 device tree file.
Also fill the device tree binding parameters
with the required value in "omap5-evm" dts file.
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Felipe Balbi <balbi@ti.com>
[b-cousson@ti.com: Fix merge issue with MMC patches,
put node at the proper place, align entries and comments]
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
With the new devices (like, AM33XX and OMAP5) we now only support
DT boot mode of operation and now it is the time to start killing
slowly the dependency on hwmod, so with this patch, we are starting
with device resources.
The idea here is implemented considering to both boot modes -
- DT boot mode
OF framework will construct the resource structure (currently
does for MEM & IRQ resource) and we should respect/use these
resources, killing hwmod dependency.
If pdev->num_resources > 0, we assume that MEM & IRQ resources
have been allocated by OF layer already (through DTB).
Once DMA resource is available from OF layer, we should
kill filling any resources from hwmod.
- Non-DT boot mode
Here, pdev->num_resources = 0, and we should get all the
resources from hwmod (following existing steps)
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@ti.com>
[b-cousson@ti.com: Fix some checkpatch CHECK issues]
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
when rebasing patches on top of Greg's tty-next,
it looks like automerge broke a few things which
I didn't catch (for whatever reason I didn't
have OMAP Serial enabled on .config) so I ended
up breaking the build on Greg's tty-next branch.
Fix the breakage by re-adding the three missing
members on struct uart_omap_port.
Reported-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Warnings were generated because following commit changed data type for
address pointer
195bbca ARM: 7500/1: io: avoid writeback addressing modes for __raw_ accessors
arch/arm/mach-tegra/tegra30_clocks.c: In function 'clk_measure_input_freq':
arch/arm/mach-tegra/tegra30_clocks.c:418:2: warning: passing argument 2 of '__raw_writel' makes pointer from integer without a cast
.../arch/arm/include/asm/io.h:88:20: note: expected 'volatile void *' but argument is of type 'unsigned int
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Include linux/sizes.h to fix below build errors:
CC arch/arm/mach-ep93xx/adssphere.o
arch/arm/mach-ep93xx/adssphere.c: In function 'adssphere_init_machine':
arch/arm/mach-ep93xx/adssphere.c:32:49: error: 'SZ_32M' undeclared (first use in this function)
arch/arm/mach-ep93xx/adssphere.c:32:49: note: each undeclared identifier is reported only once for each function it appears in
make[1]: *** [arch/arm/mach-ep93xx/adssphere.o] Error 1
make: *** [arch/arm/mach-ep93xx] Error 2
CC arch/arm/mach-ep93xx/gesbc9312.o
arch/arm/mach-ep93xx/gesbc9312.c: In function 'gesbc9312_init_machine':
arch/arm/mach-ep93xx/gesbc9312.c:32:49: error: 'SZ_8M' undeclared (first use in this function)
arch/arm/mach-ep93xx/gesbc9312.c:32:49: note: each undeclared identifier is reported only once for each function it appears in
make[1]: *** [arch/arm/mach-ep93xx/gesbc9312.o] Error 1
make: *** [arch/arm/mach-ep93xx] Error 2
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Ryan Mallon <rmallon@gmail.com>
This patch adds,
- 4 G-Scaler devices to the DT device list
- G-Scaler specific entries to the machine file
- binding documentation for G-Scaler entries
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Remove machine specific clock implementation and switch to use
new common clock framework.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
module_platform_driver simplifies the code by eliminating
module_init and module_exit calls.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
module_platform_driver simplifies the code by eliminating
module_init and module_exit calls.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This enables support for Samsung and EXYNOS4 pinctrl driver for device
tree enabled EXYNOS4 platforms.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add pinctrl driver nodes for the three instances of pin controllers
in SAMSUNG EXYNOS4210 SoC and add the pin group nodes available in the
each of those three instances.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Pinctrl driver includes support for configuring the external wakeup
interrupts. On exynos platforms that use pinctrl driver, the setup
of wakeup interrupts in the exynos platform code can be skipped.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Even though system suspend/resume hasn't been validated on Tegra yet,
this Kconfig option needs to be enabled so that system shutdown is
reliable on an SMP system. Without it, I2C interrupts may be routed
to CPU0, whereas shutdown code may be running on CPU1, causing I2C
timeouts, preventing communication with the external PMIC.
This reverts 3d5e8af "ARM: disable SUSPEND/ARCH_SUSPEND_POSSIBLE for
ARCH_TEGRA".
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tegra30 has more powerdomains than Tegra20. The debugfs code did not take this
into account.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
tegra_powergate_debugfs_init() always returns -ENOMEM. It shouldn't do that
when registering the debugfs entry succeeded.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Whistler uses a Maxim 8907 regulator. Instantiate this.
The voltage settings were derived from the schematic. The only exception
is the BBAT voltage; the schematic says 1.2v, but the HW can't go that
low, so use the HW default of 2.4v instead.
Almost all regulators list all driven supply signal names in their
regulator-names property. The exception is nvvdd_sv3, which is in turn
named 12 more different names on the schematic, so these were omitted
for brevity.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The Toshiba AC100/PAZ00 uses a TPS6586x regulator. Instantiate this.
Three data sources were used for the data encoded here:
* The HW defaults, as extracted from real HW.
* The schematic, which specifies a voltage for each rail in the signal
names.
* The AC100 kernel used by the Ubuntu port:
repo git://gitorious.org/~marvin24/ac100/marvin24s-kernel.git
branch chromeos-ac100-3.0
file arch/arm/mach-tegra/board-paz00-power.c
For many rails, the constraints in that tree specified differing min
and max voltages. In all cases, the min value was ignored, since
there's no need currently to vary any of the voltages at run-time.
DVFS might change this in the future.
In most cases these sources all matched. Differences are:
sm0: HW defaults and schematic match at 1.2v. marvin24's kernel had a max
of 1.3v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
sm1: HW defaults and schematic match at 1.0v. marvin24's kernel had a max
of 1.125v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
ldo3: The HW default is on. marvin24's kernel didn't specify always-on,
but since the board wasn't marked as having fully constrained regulators,
the rail was not turned off, so the difference had no effect. The rail
is needed for USB.
ldo6: The HW default is 2.85v. The schematics indicate 2.85v. However,
since this regulator is used for the same purpose as on other boards that
require 1.8v, this is set to 1.8v. Note that this regulator feeds the CRT
VDAC on Tegra, and so in practice is unlikely to be used, even though it
is actaully hooked up in HW.
Portions based on work by Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Marc Dietrich <marvin24@gmx.de> # v2
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Ventana uses a TPS6586x regulator. Instantiate this, and hook up a
couple of fixed GPIO-controlled regulators too.
The data was chosen to match the PMIC HW defaults, with the following
exception:
ldo6: The HW default is 2.85v. The schematics are unlabelled. Internal
research indicates that 1.8v is correct. Our downstream kernel also uses
1.8v.
Portions based on work by Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Seaboard uses a TPS6586x regulator. Instantiate this, and hook up a
couple of fixed GPIO-controlled regulators too.
Two data sources were used for the data encoded here:
* The HW defaults, as extracted from real HW.
* The schematic, which specifies a voltage for each LDO rail.
In most cases these sources matched. The only differences is:
ldo6: The HW default on Springbank is 2.85v. The HW default on Seaboard
is 1.8v. The schematics for both Springbank and Seaboard match at 2.85v.
However, internal research indicates that the schematics are incorrectly
labelled, and 1.8v is correct. The ChromeOS kernel also uses 1.8v.
Note that these settings don't entirely match those in the ChromeOS
kernel found at the URL below. However, the selected values generally
cause no behavior change in the kernel, and so were picked to avoid
regressions.
repo http://git.chromium.org/chromiumos/third_party/kernel.git
branch chromeos-3.2
file arch/arm/mach-tegra/board-seaboard-power.c
Portions based on work by Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Cadhu have multiple power rails which are controlled by
GPIOs. Add support of these power rail control through
fixed regulators. Add entry for all fixed regulators for
cardhu-a02 and a04.
The details are taken from downstream kernel.
Some points on this change are:
* Add the tps65910-LDO5 entry and make it always ON
to supply power to SDMMC. Once the sd driver support
regulator handling, this flag will be remove.
* Dropping registration of rail vdd_sdmmc1 as the gpio
is used by sdhci power-gpio. This need to fix in
sdhci driver and then need to add the registration
mechanism. Just removing power-gpio and adding fixed
regulator with this gpio is causing the sd access to
fail because first probe call of this regulator fails
due to non-available of parent and so it calls
gpio_free() which disable the pins in gpio mode make
pin output to LOW causes power to OFF. In probe retry,
it got success and it powered-on but it again need to
do again numeration of card here.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
There is multiple version of cardhu starting from A01 to A07.
Cardhu A01 and A03 are not supported. Cardhu A02 will have
different sets of GPIOs for fixed regulator compare to
cardhu A04. The Cardhu A05, A06, A07 are compatibe with A04.
Based on cardhu version, the related dts file need to be chosen
like for cardhu A02, use tegra30-cardhu-a02.dts, cardhu A04 and
more, use tegra30-cardhu-a04.dts.
This patch create the DTS file A02 and A04 and convert tegra30-cardhu.dts
as dts include file.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tegra30 based platform "cardhu" have the power management
IC TPS65911 for the regulator.
Adding DT entry for this device.
Data are chosen from downstream kernel and making the
voltage output as require by default for device to
operate.
The default interrupt line is HIGH from PMIC device and so
inverting the interrupt detection line of PMU interrupt
through configuring PMC.
In this patch, do not registering LDO5 because the input
supply for this rail is different for different version of
cardhu i..e A02 and A04. The registration will be done once
the dts file for cardhu A02 and A04 are added in follow on
patches.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
tegra_time is a struct sys_timer, not a struct clk, so can't be included
in an array of struct clk *.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
It should use tegra30_audio_sync_clk_ops for tegra30. It will cause
the tegra30 use the wrong audio_sync_clk_ops when build a kernel with
a tegra20 and tegra30 both supported kernel. And building error when
a tegra30-only kernel.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Currently the tegra20 and tegra30 share the same symbol for
tegra_clk_32k_ops. This will cause a compile error when building
a tegra20-only kernel image. Add tegra_clk_32k_ops for tegra20 and
modify tegra30_clk_32k_ops for tegra30.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This patch converts tegra clock code to generic clock framework in following way:
- Implement clk_ops as required by generic clk framework. (tegraXX_clocks.c)
- Use platform specific struct clk_tegra in clk_ops implementation instead of struct clk.
- Initialize all clock data statically. (tegraXX_clocks_data.c)
Legacy framework did not have recalc_rate and is_enabled functions. Implemented these functions.
Removed init function. It's functionality is splitted into recalc_rate and is_enabled.
Static initialization is used since slab is not up in .init_early and clock
is needed to be initialized before clockevent/clocksource initialization.
Macros redefined for clk_tegra.
Also, single struct clk_tegra is used for all type of clocks (PLL, peripheral etc.). This
is to move quickly to generic common clock framework so that other dependent features will
not be blocked (such as DT binding).
Enabling COMMON_CLOCK config moved to ARCH_TEGRA since it is enabled for both Tegra20
and Tegra30.
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Add Tegra platform specific clock structure clk_tegra and
some helper functions for generic clock framework.
struct clk_tegra is the single strcture used for all types of
clocks. reset and cfg_ex ops moved to clk_tegra from clk_ops.
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Make the name consistent with other files.
s/tegra2/tegra20
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Move clock initialization data to separate file. This is
required for migrating to generic clock framework if static
initialization is used.
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Move clock initialization data to separate file. This is
required for migrating to generic clock framework if static
initialization is used.
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
A U16 divider can divide a clock by 1..64K. However, the range-check
in clk_div16_get_divider() limited the range to 1..256. Fix this. NVIDIA's
downstream kernels already have the fixed range-check.
In practice this is a problem on Whistler's I2C bus, which uses a bus
clock rate of 100KHz (rather than the more common 400KHz on Tegra boards),
which requires a HW module clock of 8*100KHz. The parent clock is 216MHz,
leading to a desired divider of 270. Prior to conversion to the common
clock framework, this range error was somehow ignored/irrelevant and
caused no problems. However, the common clock framework evidently has
more rigorous error-checking, so this failure causes the I2C bus to fail
to operate correctly.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Some boards use UART D for the main serial console, and some use UART A.
UART D's clock is listed in board-dt-tegra20.c's clock table, whereas
UART A's clock is not. This causes the clock code to think UART A's
clock is unsed. The common clock framework turns off unused clocks at
boot time. This makes the kernel appear to hang. Add UART A's clock into
the clock table to prevent this. Eventually, this requirement should be
handled by the UART driver, and/or properties in a board-specific device
tree file.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARCH_TEGRA (arch/arm/Kconfig) now selects USE_OF, so there's not need
for ARCH_TEGRA_3x_SOC to do so too.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Use macro IO_ADDRESS for getting virtual address of
corresponding physical address to make the consistency
with rest of Tegra code-base.
This macro calls the IO_TO_VIRT() which is defined in
arch/arm/mach-tegra/include/mach/iomap.h
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
All the unnessary functions in omap-phy-internal is removed.
These functionality are now handled by omap-usb2 phy driver.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
nobody needs to access the uart_omap_port structure
other than omap-serial.c file. Let's move that
structure definition to the C source file in order
to prevent anyone from accessing our structure.
Tested-by: Shubhrajyoti D <shubhrajyoti@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Software flow control register bits were not defined correctly.
Also clarify the IXON and IXOFF logic to reflect what userspace wants.
Cc: stable@vger.kernel.org
Tested-by: Shubhrajyoti D <shubhrajyoti@ti.com>
Signed-off-by: Vikram Pandita <vikram.pandita@ti.com>
Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The driver doesn't need to know about its platform_device.
Everything the driver needs can be done through the
struct device pointer. In case we need to use the
OMAP-specific PM function pointers, those can make
sure to find the device's platform_device pointer
so they can find the struct omap_device through
pdev->archdata field.
Tested-by: Shubhrajyoti D <shubhrajyoti@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This patch also adds mux and divider for camera clock.
Tested on i.MX35-pdk.
Signed-off-by: Alex Gershgorin <alexg@meprolight.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
When booted with some resource will have their name set to NULL. This can
cause later kernel crash since this is not expected by the platform code.
When we boot without DT the devices are created with platform_device_add()
which itself fixes up the missing resource names:
if (r->name == NULL)
r->name = dev_name(&pdev->dev);
The of core also fixes up the resource names when taking the information
from DT data - in __of_address_to_resource():
r->name = name ? name : dev->full_name;
When we boot OMAP with devicetree: of will create the devices based on the
DT data so the resource names are guarantied to be not NULL. Since we have
the 'ti,hwmod' tag, we remove the of created resources from the device and
re-create them based on hwmod data. If the hwmod data does not specify a
name for a resource it will be NULL.
This can cause kernel crash if the driver uses
platform_get_resource_byname() to get any resource.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
[b-cousson@ti.com: Change omap_hwmod to omap_device in subject]
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
In spi-pl022.c, the new device tree binding is now "num-cs" for the number of
chip selects. Further, pl022,hierarchy and pl022,slave-tx-disable isn't
supported in favour of reasonable defaults in the driver.
Adjusting phy3250.dts to it.
Signed-off-by: Roland Stigge <stigge@antcom.de>
This patch removes a board specific GPIO initialization (for MMC power) from
the platform initialization. On the reference boards (PHY3250 and EA3250), this
separate initialization is not necessary, now reducing board specific
initialization in the platform init of phy3250.c.
Signed-off-by: Roland Stigge <stigge@antcom.de>
The SLC and MLC NAND drivers now need their dma_filter callbacks via platform
data to make them independent of single DMA engine drivers.
(This also helps fixing build errors of the SLC and MLC drivers when building
as modules because direct access to AMBA dma filter functions isn't available
via export.)
Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
irq.c uses handle_level_irq() as the unconditional default handler. This patch
uses handle_edge_irq() instead for edge type irqs.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Srinivas Bakki <srinivas.bakki@nxp.com>
Marzen board can measure its thermal by this patch.
cat /sys/class/thermal/thermal_zoneX/temp
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
regulator id = 0 is used for sh_mobile_sdhi.
smsc911x's regulator can use id = 1
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
[horms@verge.net.au: moved defconfig portion into a separate patch]
[horms@verge.net.au: added "ARM: shmobile:" to title]
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
Device have SYS rail which is always ON. It is system power bus. LDO5
and LDO_RTC get powered through this rail internally. Add support for
this rail and make the LDO5/LDO_RTC supply by it. Update document
accordingly.
[swarren: Instantiate the sys regulator from board-harmony-power.c to
avoid regression.]
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This branch enables device tree bindings for the CSR Prima pin control
subsystem. All patches acked by Linus W (pinctrl maintainer).
* 'pinmux-dt' of git://gitorious.org/sirfprima2-kernel/sirfprima2-kernel:
pinctrl: sirf: add DT-binding pinmux mapping support
ARM: PRIMA2: rename prima2-cb.dts to prima2.dtsi as it only has SoC features
ARM: PRIMA2: add missing interrupts property for pinctrl node
+ sync to Linux 3.6-rc4
Removes the pnx4008 platform support, which hasn't seen any active
development since 2006 and seems to be unused these days.
* 'pnx4008-removal' of git://git.antcom.de/linux-2.6:
ARM: mach-pnx4008: Remove architecture
* 'soc-core' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: mach-shmobile: Add compilation support for dtbs using 'make dtbs'
+ sync to 3.6-rc3
current code only works because struct uart_port
is the first member on the uart_omap_port structure.
If, for whatever reason, someone puts another
member as the first of the structure, that cast
won't work anymore. In order to be safe, let's use
a container_of() which, for now, gets optimized into
a cast anyway.
Tested-by: Shubhrajyoti D <shubhrajyoti@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
it to use generic time and clock events.
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Merge tag 'ks8695-time-for-arm-soc' of http://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/cleanup
This cleans up the ks8695 timer driver and converts
it to use generic time and clock events.
* tag 'ks8695-time-for-arm-soc' of http://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ks8695: convert to generic time and clocksource
ARM: ks8695: delete resume hook from timer
ARM: ks8695: use [readl|writel]_relaxed()
ARM: ks8695: merge the timer header into the timer driver
Test logs can be found here:
http://www.pwsan.com/omap/testlogs/omap_fixes_a_3.6rc/20120904110254/
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Merge tag 'omap-fixes-a-for-3.6rc' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into fixes
Some hwmod, clockdomain, am335x fixes against v3.6-rc4.
Test logs can be found here:
http://www.pwsan.com/omap/testlogs/omap_fixes_a_3.6rc/20120904110254/
As part of this patch:
1. Moved existing tegra phy driver to drivers/USB directory.
2. Added standard USB phy driver APIs to tegra phy driver.
Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Old platforms using ancient gettimeoffset() and other arcane
APIs are standing in the way of cleaning up the ARM kernel.
The gettimeoffset() was also broken: it would try to read out
the timer counter value, while this would not work (the
counter statically returns the initially programmed value)
so the implementation would anyway fall back to a homebrew
version of jiffie calculation.
This is an attempt at blind-coding a generic time and clocksource
driver for the platform by way of a datasheet and looking at the
old code.
Tested-by: Greg Ungerer <gerg@snapgear.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This system does not support suspend/resume so let's skip this
hook altogether.
Tested-by: Greg Ungerer <gerg@snapgear.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
I have no clue why __raw* macros are used here, but I strongly
suspect there is no good reason at all for this, so removing
another bad example.
Tested-by: Greg Ungerer <gerg@snapgear.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This <mach/regs-timer.h> is broadcasted in the entire kernel for
no good reason, since it's only used by the timer driver. Merge
it into the driver.
Tested-by: Greg Ungerer <gerg@snapgear.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This makes us possible to define pinmux mapping in board-specific DTS.
prima2.dtsi provides all possible (groups,functions) configuration, and
device in .dts select configurations from dtsi files.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
The current prima2-cb.dts only includes prima2 SoC feature without board-
specific descriptions. This patches rename it to dtsi and clean some useless
content.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
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Merge tag 'v3.6-rc4' into next
Linux 3.6-rc4
# gpg: Signature made Sat 01 Sep 2012 10:40:33 AM PDT using RSA key ID 00411886
# gpg: Good signature from "Linus Torvalds <torvalds@linux-foundation.org>"
Move the Tegra KBC platform data header out of arch/arm/mach-tegra, as
a pre-requisite of single zImage.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Test-compiling obscure machines I notice that the gemini (which
by the way lacks a defconfig) is broken since some time back.
Adding a simple missing include makes it build again.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
big.LITTLE support in the future. The separation of CPU and PMU code
is also the start of being able to move some of this stuff under
drivers/.
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Merge tag 'arm-perf-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into next/cleanup
From Will Deacon:
Bunch of perf updates for the ARM backend that pave the way for
big.LITTLE support in the future. The separation of CPU and PMU code
is also the start of being able to move some of this stuff under
drivers/.
* tag 'arm-perf-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux:
ARM: perf: move irq registration into pmu implementation
ARM: perf: move CPU-specific PMU handling code into separate file
ARM: perf: prepare for moving CPU PMU code into separate file
ARM: perf: probe devicetree in preference to current CPU
ARM: perf: remove mysterious compiler barrier
ARM: pmu: remove arm_pmu_type enumeration
ARM: pmu: remove unused reservation mechanism
ARM: perf: add devicetree bindings for 11MPcore, A5, A7 and A15 PMUs
ARM: PMU: Add runtime PM Support
Two regression fixes and one boot-loader compatibility fix from Simon Horman.
* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: armadillo800eva: enable rw rootfs mount
ARM: shmobile: mackerel: fixup usb module order
ARM: shmobile: armadillo800eva: fixup: sound card detection order
* 'marco-prepare' of git://gitorious.org/sirfprima2-kernel/sirfprima2-kernel:
ARM: SIRF: make sirf irqchip driver optional since new SoCs will have GIC
ARM: PRIMA2: adjust Kconfig to support select SoC features
ARM: PRIMA2: use DT_MACHINE_START and convert to generic board
clk: prima2: move from arch/arm/mach to drivers/clk
ARM: PRIMA2: convert to common clk and finish full clk tree
The MMC WP is active high on the m28evk, fix this.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
mx28evk has a free slot U50 that can be used to populate an I2C EEPROM.
Add support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
If NR_IRQS is less than MAX_IRQS, we end up writing past the
irq_target_cpu array in omap_wakeupgen_init():
/* Associate all the IRQs to boot CPU like GIC init does. */
for (i = 0; i < max_irqs; i++)
irq_target_cpu[i] = boot_cpu;
This can happen if SPARSE_IRQ is enabled as by default NR_IRQS is
set to 16. Without this patch we're overwriting other data during
the boot.
Looks like a similar fix was posted by Benoit Cousson earlier
as "ARM: OMAP2+: wakeupgen: Fix wrong array size for irq_target_cpu"
but was lost.
Cc: stable@vger.kernel.org
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The io-pci series has gained a merge to resolve a nontrivial
conflict.
* cleanup/io-pci:
ARM: Fix ioremap() of address zero
Also includes an update to Linux 3.6-rc3
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
As Stephen Rothwell reports, a849088aa1 ("ARM: Fix ioremap() of
address zero") from the arm-current tree and commit c279443709 ("ARM:
Add fixed PCI i/o mapping") from the arm-soc tree conflict in
a nontrivial way in arch/arm/mm/mmu.c.
Rob Herring explains:
The PCI i/o reserved area has a dummy physical address of 0 and
needs to be skipped by ioremap searches. So we don't set
VM_ARM_STATIC_MAPPING to prevent matches by ioremap. The vm_struct
settings don't really matter when we do the real mapping of the
i/o space.
Since commit a849088aa1 is at the start of the fixes branch
in the arm tree, we can merge it into the branch that contains
the other ioremap changes.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
The SMSC911x Ethernet chip requires a fixed-regulator in order to
function correctly. We have previously provided a means to obtain
this during a Device Tree boot, however nothing has been put into
place when booting with a non-DT kernel. This patch aims to change
that.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
[Added a Kconfig select so the build does not break]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The OMAP4 sl2if IP block requires some special programming for it to
enter idle. Without this programming, it will prevent the rest of
the chip from entering full chip idle.
This patch comments out the IP block data.
Later, once the appropriate support is available, this patch can be
reverted.
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Clock and module mode are explictly enable when hwmod is enabled. But if
the hwmod doesn't get ready on time, clocks are disabled but module is left
enabled.
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
IVA2 hwmod resets were missing the status bit offsets. Also, as the
hwmod itself didn't have prcm info at all, resetting iva hwmod was
accessing some bogus memory addresses. Added both infos to fix this.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Commit 4da71ae6 ("OMAP: clockdomain: Arch specific funcs for
clkdm_clk_enable/disable") called the OMAP2xxx-specific functions for
clockdomain wakeup and sleep. This would probably have broken
software-supervised clockdomain wakeup and sleep on OMAP3.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Jon Hunter <jon-hunter@ti.com>
Acked-by: Rajendra Nayak <rnayak@ti.com>
With commit ae6df418a2
Sub: ARM: OMAP2+: dmtimer: cleanup fclk usage)
The Timer functional clock naming convention has changed from
gptX_fck => timerXfck, and so as the timer init function
in mach-omap2/timer.c.
OMAP4 clocktree also has changed accordingly.
AM33xx Clock Tree has been merged during rc3-4 timeframe,
before above commit got merged, so similar change is required
for AM33xx as well (Change the gptX_fck => timerX_fck).
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
This converts the Nomadik to using pin control using the
driver for the STN8815 ASIC.
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Include asm/pmu.h to fix below build error:
CC arch/arm/mach-ux500/cpu-db8500.o
arch/arm/mach-ux500/cpu-db8500.c:118:8: error: variable 'db8500_pmu_platdata' has initializer but incomplete type
arch/arm/mach-ux500/cpu-db8500.c:119:2: error: unknown field 'handle_irq' specified in initializer
arch/arm/mach-ux500/cpu-db8500.c:119:2: warning: excess elements in struct initializer [enabled by default]
arch/arm/mach-ux500/cpu-db8500.c:119:2: warning: (near initialization for 'db8500_pmu_platdata') [enabled by default]
make[1]: *** [arch/arm/mach-ux500/cpu-db8500.o] Error 1
make: *** [arch/arm/mach-ux500] Error 2
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
armadillo800eva default boot loader is "hermit",
and it's tag->u.core.flags has flag when kernel boots.
Because of this, ${LINUX}/arch/arm/kernel/setup.c :: parse_tag_core()
didn't remove MS_RDONLY flag from root_mountflags.
Thus, the rootfs is mounted as "readonly".
This patch adds "rw" kernel parameter,
and enable read/write mounts for rootfs
Cc: Masahiro Nakai <nakai@atmark-techno.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
With icoll and gpio interrupt controllers adopt irqdomain support and
all interrupt nubmers are retrieved from device tree, it's safe to
select SPARSE_IRQ for mxs now.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Remove irq_domain_add_legacy call from mach-mxs.c and have icoll adopt
irq_domain support in the driver.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
As part of multi-platform effort, let's enable MULTI_IRQ_HANDLER for
mach-mxs and remove entry-macro.S.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Rather than using the static timer irq definition, we should retrieve
timer irq from device tree for better.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Remove irq_domain_add_legacy call from mach-mxs.c and have the gpio
driver adopt irqdomain support, so that we can have the mapping
between gpio and irq number available without using virtual_irq_start
and MXS_GPIO_IRQ_START.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Linux-next has failed to compile for kirkwood since 23 August with:
arch/arm/mach-kirkwood/db88f6281-bp-setup.c:29: error: 'SZ_1M' undeclared here (not in a function)
arch/arm/mach-kirkwood/db88f6281-bp-setup.c:33: error: 'SZ_4M' undeclared here (not in a function)
Add missing <linux/sizes.h>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
renesas_usbhs driver can play role as both Host and Gadget.
In case of Gadget, it requires not only renesas_usbhs
but also usb gadget module (like g_ether).
So, renesas_usbhs driver calls usb_add_gadget_udc() on probe time.
Because of this behavior,
Host port plays also Gadget role if kernel has both Host/Gadget support.
In mackerel case, from 0ada2da518
(ARM: mach-shmobile: mackerel: use renesas_usbhs instead of r8a66597_hcd)
usb0 plays Gadget role, and usb1 plays Host role,
and current mackerel board probes as usb1 -> usb0.
Thus, 1st installed usb gadget module (like g_ether) will be
assigned to usb1 (= usb Host port), and 2nd module to usb0 (= usb Gadget port).
It is very confusable for user.
This patch fixup usb modes probing order as usb0 -> usb1.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
Since armadillo800eva has 2 sound cards,
and had reversed deferred probe order issue,
it was purposely registered in reverse order.
But it was solved by
1d29cfa574
(driver core: fixup reversed deferred probe order)
armadillo800eva board is expecting that
FSI-WM8978 is the 1st, and FSI-HDMI is the 2nd sound card.
This patch fixes it up
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
Add tps65217 regulator device tree data to AM335x-Bone by adding
regulator consumers with tightened constraints and regulator-name.
TPS65217 regulator handle can be obtained by using this regulator
name.
This patch also add I2C node with I2C frequency and tps65217 PMIC
I2C slave address.
Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add tps65910 regulator device tree data to AM335x-EVM by adding
regulator consumers with tightened constraints and regulator-name.
TPS65910 regulator handle can be obtained by using this regulator
name.
This patch also add I2C node with I2C frequency and tps65910 PMIC
I2C slave address.
Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add device tree data for tps65217 regulator by adding all tps65217
regulator nodes. Regulator is initialized based on compatiable
name provided in tps65217 DT file.
All tps65910 PMIC regulator device tree nodes are placed in a
seperate device tree include file (tps65217.dtsi). This patch
was tested on AM335x-Bone.
Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add device tree data for tps65910 regulator by adding all tps65910
regulator nodes. Regulator is initialized based on compatiable
name provided in tps65910 DT file.
All tps65910 PMIC regulator device tree nodes are placed in a
seperate device tree include file (tps65910.dtsi). This patch
was tested on AM335x-EVM.
Signed-off-by: AnilKumar Ch <anilkumar@ti.com>
Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Fix inconsistency between mach-types and CONFIG_ name that prevents
touchbook board from booting.
Signed-off-by: Radek Pilar <mrkva@mrkva.eu>
Signed-off-by: Tony Lindgren <tony@atomide.com>
regulators do not have a 'reg' property, hence the regulator@0,
regulator@1 do not make sense. get rid of it.
Reported-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
In some OMAP3 HS devices (at least Nokia N9 and N950), the public SRAM
seems to conflict with secure portition of SRAM. When booting the 3.6-rc3
kernel (and also earlier) on these devices, the kernel gets tainted with
tons of the following warnings:
[ 6.894348] In-band Error seen by MPU at address 0
[...]
[ 6.894378] WARNING: at arch/arm/mach-omap2/omap_l3_smx.c:162
Fix this by skipping the first 16K of the public SRAM. (Note that the
mapping could not be changed, as it resulted in secure monitor call
failure in save_secure_sram().)
This will leave 12K SRAM available that should be still sufficient. The
patch has been boot tested with vanilla 3.6-rc3 on N900, N950 and N9.
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
OMAP4-specific code should be executed only if we are running on
OMAP4. Otherwise it may break multi-OMAP kernels. Found by reading
the code.
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Currently, omap2_sync32k_clocksource_init() function initializes the 32K
timer as the system clock source regardless of the CONFIG_OMAP_32K_TIMER
setting.
Fix this by providing a default implementation for
!CONFIG_OMAP_32K_TIMER case.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: stable@vger.kernel.org
Signed-off-by: Tony Lindgren <tony@atomide.com>
Now GPMC provides its client with interrupts that can be handled
using the standard interrupt API. Modify GPMC NAND setup to work
with it.
Also disable write protect in GPMC code, so that NAND driver can
be ignorant of GPMC configuration.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Modify interrupt handling such that interrupts can be handled by GPMC
client drivers using standard interrupt APIs rather than requiring
the drivers to have knowledge about GPMC interrupt handling. Currently
only NAND related interrupts has been considered (which is the case
even without this change) as the only user of GPMC interrupt is NAND.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
gpmc initialization done by platform code now updates struct resource
with the address space alloted for nand. Use this interface to obtain
memory rather than relying on platform data field - phys_base.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Acked-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Currently omap onenand driver invokes gpmc_cs_request, obtains address
space allocated by gpmc to onenand. Remove this, instead use resource
structure; this is now updated with address space for onenand by gpmc
initialization with the help of gpmc_cs_request. And remove usage of
gpmc_cs_request in onenand driver.
This helps in smooth migration of gpmc to driver.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Currently omap nand driver uses a field in platform data - phys_base
for passing the address space allocated by gpmc for nand. Use struct
resource instead. With this change omap nand driver has to get
address space from memory resource.
This helps in smooth migration of gpmc to driver.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
GPMC has NAND registers, update nand platform data with those details
so that NAND driver can configure those by itself instead of using
exported symbols.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Provide helper function for updating NAND register details for
the necessary chip select. NAND drivers platform data can be
updated with this information so that NAND driver can handle
GPMC NAND operations by itself.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
dummy_supplies for smsc911x are registered as "smsc911x".
smsc911x driver needs id = -1
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
Make use of the same atomic pool as DMA does, and skip a kernel page
mapping which can involve sleep'able operations at allocating a kernel
page table.
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Support atomic allocation in __iommu_get_pages().
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
[moved __atomic_get_pages() under #ifdef CONFIG_ARM_DMA_USE_IOMMU
to avoid unused fuction warning for no-IOMMU case]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Check the given range("start", "size") is included in "atomic_pool" or not.
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
struct page **pages is necessary to align with non atomic path in
__iommu_get_pages(). atomic_pool() has the intialized **pages instead
of just *page.
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
The default 256 KiB coherent pool may be too small for some of the Kirkwood
devices, so increase it to make sure that devices will be able to allocate
their buffers with GFP_ATOMIC flag.
Suggested-by: Josh Coombs <josh.coombs@gmail.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Print a loud warning when system runs out of memory from atomic DMA
coherent pool to let users notice the potential problem.
Reported-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Some platforms might require to increase atomic coherent pool to make
sure that their device will be able to allocate all their buffers from
atomic context. This function can be also used to decrease atomic
coherent pool size if coherent allocations are not used for the given
sub-platform.
Suggested-by: Josh Coombs <josh.coombs@gmail.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Contiguous Memory Allocator requires only paging and MMU enabled not
particular CPU architectures, so there is no need for strict dependency
on CPU type. This enables to use CMA on some older ARM v5 systems which
also might need large contiguous blocks for the multimedia processing hw
modules.
Reported-by: Prabhakar Lad <prabhakar.lad@ti.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Prabhakar Lad <prabhakar.lad@ti.com>
It's safe to empty the plat-samsung/incude/plat/gpio-fns.h header
now when all users of those functions have been converted to
generic gpiolib API or to s3c_gpio_cfg().
Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This is a prerequisite for removal of deprecated s3c2410_gpio* API
from the Samsung gpiolib driver.
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Guillaume Gourat <guillaume.gourat@nexvision.tv>
Cc: Michel Pollet <buserror@gmail.com>
Signed-off-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
These flags are not used any longer and can be safely removed
since:
| commit 8a76e5383f
| Author: Javier Martin <javier.martin@vista-silicon.com>
| Date: Wed Jul 11 17:34:54 2012 +0200
|
| media: mx2_camera: Fix mbus format handling
Signed-off-by: Javier Martin <javier.martin@vista-silicon.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
New MARCO and POLO SoC use GIC, so make irq.c optional and enable it
only if we enable ARCH_PRIMA2 in Kconfig
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Now we have primaII, but will include Marco and Polo in mach-prima2
as well. We add Kconfig menu so that we can select necessary SoC
features.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
mx28evk has a free slot (J89) which can be used to populate an SPI NOR Flash.
Add support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
- move to sparse IRQ: some drivers were forgotten
- a DTS typo
- the delay for removal of old at91_mci driver
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Merge tag 'at91-fixes' of git://github.com/at91linux/linux-at91 into fixes
Fixes for AT91 related to:
- move to sparse IRQ: some drivers were forgotten
- a DTS typo
- the delay for removal of old at91_mci driver
* tag 'at91-fixes' of git://github.com/at91linux/linux-at91:
ARM: at91/feature-removal-schedule: delay at91_mci removal
ARM: at91/dts: remove partial parameter in at91sam9g25ek.dts
ARM: at91/clock: fix PLLA overclock warning
ARM: at91: fix rtc-at91sam9 irq issue due to sparse irq support
ARM: at91: fix system timer irq issue due to sparse irq support
Update the mach-mxs machine by removing the enet_clkout(). The new
revision of the board doesn't need that. Also, update the DTS file
with all the new drivers pulled in the mainline recently, that is,
SPI, LRADC, USB.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This patch removes the ARM architecture mach-pnx4008. No direct support or user
feedback since 2006. Acknowledgements from NXP/Philips and Linux arm-soc
maintainers.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Bug fixes for various ARM platforms. About half of these are
for OMAP and submitted before but did not make it into v3.6-rc2.
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Merge tag 'fixes-3.6-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull arm-soc fixes from Arnd Bergmann:
"Bug fixes for various ARM platforms. About half of these are for OMAP
and submitted before but did not make it into v3.6-rc2."
* tag 'fixes-3.6-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (39 commits)
ARM: ux500: don't select LEDS_GPIO for snowball
ARM: imx: build i.MX6 functions only when needed
ARM: imx: select CPU_FREQ_TABLE when needed
ARM: imx: fix ksz9021rn_phy_fixup
ARM: imx: build pm-imx5 code only when PM is enabled
ARM: omap: allow building omap44xx without SMP
ARM: dts: imx51-babbage: fix esdhc cd/wp properties
ARM: imx6: spin the cpu until hardware takes it down
ARM: ux500: Ensure probing of Audio devices when Device Tree is enabled
ARM: ux500: Fix merge error, no matching driver name for 'snd_soc_u8500'
ARM i.MX6q: Add virtual 1/3.5 dividers in the LDB clock path
ARM: Kirkwood: fix Makefile.boot
ARM: Kirkwood: Fix iconnect leds
ARM: Orion: Set eth packet size csum offload limit
ARM: mv78xx0: fix win_cfg_base prototype
ARM: OMAP: dmtimers: Fix locking issue in omap_dm_timer_request*()
ARM: mmp: fix potential NULL dereference
ARM: OMAP4: Register the OPP table only for 4430 device
cpufreq: OMAP: Handle missing frequency table on SMP systems
ARM: OMAP4: sleep: Save the complete used register stack frame
...
With !HIGHMEM, sanity_check_meminfo checks for banks that completely or
partially overlap the vmalloc region. The test for partial overlap checks
__va(bank->start + bank->size) > vmalloc_min. This is not appropriate if
there is a non-linear translation between virtual and physical addresses,
as bank->start + bank->size is actually in the bank following the one being
interrogated.
In most cases, even when using SPARSEMEM, this is not problematic as the
subsequent bank will start at a higher va than the one in question. However
if the physical to virtual address conversion is not monotonic increasing,
the incorrect test could result in a bank not being truncated when it
should be.
This patch ensures we perform the va-pa conversion on memory from the
bank we are interested in, not the following one.
Reported-by: ??? (Steve) <zhanzhenbo@gmail.com>
Signed-off-by: Jonathan Austin <jonathan.austin@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
LPAE does not use two pmd entries for a pte, so the additional tlb
flushing is not required.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The bfi instruction is not available on ARMv6, so instead use an and/orr
sequence in the contextidr_notifier. This gets rid of the assembler
error:
Assembler messages:
Error: selected processor does not support ARM mode `bfi r3,r2,#0,#8'
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
When enabling the MMU for ARMv7 CPUs, the decompressor does not touch
the ttbcr register, assuming that it will be zeroed (N == 0, EAE == 0).
Given that only EAE is defined as 0 for non-secure copies of the
register (and a bootloader such as kexec may leave it set to 1 anyway),
we should ensure that we reset the register ourselves before turning on
the MMU.
This patch zeroes TTBCR.EAE and TTBCR.N prior to enabling the MMU for
ARMv7 cores in the decompressor, configuring us exclusively for 32-bit
translation tables via TTBR0.
Cc: <stable@vger.kernel.org>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Matthew Leach <matthew.leach@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Breakpoint validation currently fails for single-byte watchpoints on
addresses ending in 11b. There is no reason to forbid such a watchpoint,
so extend the validation code to allow it.
Cc: Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
From ARM debug architecture v7.1 onwards, a watchpoint exception causes
the DFAR to be updated with the faulting data address. However, DFSR.WnR
takes an UNKNOWN value and therefore cannot be used in general to
determine the access type that triggered the watchpoint.
This patch forbids watchpoints without an overflow handler from
specifying a specific access type (load/store). Those with overflow
handlers must be able to handle false positives potentially triggered by
a watchpoint of a different access type on the same address. For
SIGTRAP-based handlers (i.e. ptrace), this should have no impact.
Cc: <stable@vger.kernel.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Murali Nalajala reports a regression that ioremapping address zero
results in an oops dump:
Unable to handle kernel paging request at virtual address fa200000
pgd = d4f80000
[fa200000] *pgd=00000000
Internal error: Oops: 5 [#1] PREEMPT SMP ARM
Modules linked in:
CPU: 0 Tainted: G W (3.4.0-g3b5f728-00009-g638207a #13)
PC is at msm_pm_config_rst_vector_before_pc+0x8/0x30
LR is at msm_pm_boot_config_before_pc+0x18/0x20
pc : [<c0078f84>] lr : [<c007903c>] psr: a0000093
sp : c0837ef0 ip : cfe00000 fp : 0000000d
r10: da7efc17 r9 : 225c4278 r8 : 00000006
r7 : 0003c000 r6 : c085c824 r5 : 00000001 r4 : fa101000
r3 : fa200000 r2 : c095080c r1 : 002250fc r0 : 00000000
Flags: NzCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment kernel
Control: 10c5387d Table: 25180059 DAC: 00000015
[<c0078f84>] (msm_pm_config_rst_vector_before_pc+0x8/0x30) from [<c007903c>] (msm_pm_boot_config_before_pc+0x18/0x20)
[<c007903c>] (msm_pm_boot_config_before_pc+0x18/0x20) from [<c007a55c>] (msm_pm_power_collapse+0x410/0xb04)
[<c007a55c>] (msm_pm_power_collapse+0x410/0xb04) from [<c007b17c>] (arch_idle+0x294/0x3e0)
[<c007b17c>] (arch_idle+0x294/0x3e0) from [<c000eed8>] (default_idle+0x18/0x2c)
[<c000eed8>] (default_idle+0x18/0x2c) from [<c000f254>] (cpu_idle+0x90/0xe4)
[<c000f254>] (cpu_idle+0x90/0xe4) from [<c057231c>] (rest_init+0x88/0xa0)
[<c057231c>] (rest_init+0x88/0xa0) from [<c07ff890>] (start_kernel+0x3a8/0x40c)
Code: c0704256 e12fff1e e59f2020 e5923000 (e5930000)
This is caused by the 'reserved' entries which we insert (see
19b52abe3c - ARM: 7438/1: fill possible PMD empty section gaps)
which get matched for physical address zero.
Resolve this by marking these reserved entries with a different flag.
Cc: <stable@vger.kernel.org>
Tested-by: Murali Nalajala <mnalajal@codeaurora.org>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add the pinmux settings for USB PHY overcurrent pins.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chris Ball <cjb@laptop.org>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add this SSP port 2 pin multiplexing configuration into the imx28.dtsi file.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chris Ball <cjb@laptop.org>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The GPIO buttons are named SW3, SW4, SW5 and SW6 on the board
silkscreen. Update the buttons descriptions accordingly.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
Do soft-power-on-reset in sys_reboot system call.
How to test this patch
Execute "sudo reboot" from command line. The system will start shutdown
sequence and finally reboot and U-Boot restarts.
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Signed-off-by: Simon Horman <horms@verge.net.au>
This converts the ARM RealView machine over to using the common
clock. The approach is similar to the one used for the Integrator,
and we're reusing the ICST wrapper code.
We have to put the clock intialization in the timer init function
for the clocks to be available when initializing the timer,
keeping them in early_init() is too early for the common clk.
Since we now have to go down and compile drivers/clk/versatile
a CONFIG_COMMON_CLK_VERSATILE symbol has been added so the proper
code gets compiled into the kernel for either machine. A leftover
CLK_VERSATILE in the Integrator Kconfig was fixed up to use
the new symbol as well.
Tested on ARM RealView PB1176.
Cc: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Makes it easier to just do 'make dtbs' for whatever the kernel was
configured for, just like some other platforms.
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Ideally in common SoC dtsi file should set all modules
to "disabled" state and it should get enabled in respective
EVM/Board dts file as per usage.
This patch sets default status of all modules to "disabled"
state in am33xx.dtsi file. Currently there are no modules
supported as part of Bone and EVM dts support, so care
to add entry "status = "okay"" while adding support for any
module.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add OMAP MMC related device tree data for OMAP5.
Signed-off-by: Balaji T K <balajitk@ti.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit 02c981c07b only implements a little part of primaII clk tree
due to common clk framework was not ready at that time.
This patch converts the old driver to common clk and finish the full clk
tree.
Signed-off-by: Binghua Duan <Binghua.Duan@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
No need to have Efika MX listed in the defconfig if it can't be built.
Signed-off-by: Matt Sealey <matt@genesi-usa.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Disable building for Efika MX boards by not having any configuration or
object file definitions.
Signed-off-by: Matt Sealey <matt@genesi-usa.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
There is no need for adding board related entries into dt_board_compat.
Leave only the SoC entry.
This way we do not need to patch a C file when adding dt support for
a new board.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
since commit
3e62af8 (ARM: imx: select USE_OF)
ARM_MXC already selects USE_OF, so there is no need to repeat it for
MACH_IMX31_DT
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Instead of adding sdma-ram-script-name into each board dts file, move
it to the SoC dtsi file instead.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Instead of enabling the watchdog in each individual dts file, select in
the SoC dtsi file instead.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Use PCI Express Capability access functions to simplify ARM PCIe code.
Signed-off-by: Jiang Liu <jiang.liu@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Small platform specific bug fixes for problems found in randconfig builds.
* randconfig/mach:
ARM: ux500: don't select LEDS_GPIO for snowball
ARM: imx: build i.MX6 functions only when needed
ARM: imx: select CPU_FREQ_TABLE when needed
ARM: imx: fix ksz9021rn_phy_fixup
ARM: imx: build pm-imx5 code only when PM is enabled
ARM: omap: allow building omap44xx without SMP
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Using 'select' in Kconfig is hard, a platform cannot just
enable a driver without also making sure that its subsystem
is there. Also, there is no actual code dependency between
the platform and the gpio leds driver.
Without this patch, building without LEDS_CLASS esults in:
drivers/built-in.o: In function `create_gpio_led.part.2':
governor_userspace.c:(.devinit.text+0x5a58): undefined reference to `led_classdev_register'
drivers/built-in.o: In function `gpio_led_remove':
governor_userspace.c:(.devexit.text+0x6b8): undefined reference to `led_classdev_unregister'
This reverts 8733f53c6 "ARM: ux500: Kconfig: Compile in leds-gpio
support for Snowball" that introduced the regression and did not
provide a helpful explanation.
In order to leave the GPIO LED code still present in normal
builds, this also enables the symbol in u8500_defconfig, in addition
to the other LED drivers that are already selected there.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Lee Jones <lee.jones@linaro.org>
The head-v7.S contains a call to the generic cpu_suspend function,
which is only available when selected by the i.MX6 code. As
pointed out by Shawn Guo, i.MX5 does not actually use any
functions defined in head-v7.S. It is also needed only for
the i.MX6 power management code and for the SMP code, so
we can restrict building this file to situations in which
at least one of those two is present.
Finally, other platforms with a similar file call it headsmp.S,
so we can rename it to the same for consistency.
Without this patch, building imx5 standalone results in:
arch/arm/mach-imx/built-in.o: In function `v7_cpu_resume':
arch/arm/mach-imx/head-v7.S:104: undefined reference to `cpu_resume'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Eric Miao <eric.miao@linaro.org>
Cc: stable@vger.kernel.org
The i.MX cpufreq implementation uses the CPU_FREQ_TABLE helpers,
so it needs to select that code to be built. This problem has
apparently existed since the i.MX cpufreq code was first merged
in v2.6.37.
Building IMX without CPU_FREQ_TABLE results in:
arch/arm/plat-mxc/built-in.o: In function `mxc_cpufreq_exit':
arch/arm/plat-mxc/cpufreq.c:173: undefined reference to `cpufreq_frequency_table_put_attr'
arch/arm/plat-mxc/built-in.o: In function `mxc_set_target':
arch/arm/plat-mxc/cpufreq.c:84: undefined reference to `cpufreq_frequency_table_target'
arch/arm/plat-mxc/built-in.o: In function `mxc_verify_speed':
arch/arm/plat-mxc/cpufreq.c:65: undefined reference to `cpufreq_frequency_table_verify'
arch/arm/plat-mxc/built-in.o: In function `mxc_cpufreq_init':
arch/arm/plat-mxc/cpufreq.c:154: undefined reference to `cpufreq_frequency_table_cpuinfo'
arch/arm/plat-mxc/cpufreq.c:162: undefined reference to `cpufreq_frequency_table_get_attr'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Yong Shen <yong.shen@linaro.org>
Cc: stable@vger.kernel.org
The ksz9021rn_phy_fixup and mx6q_sabrelite functions try to
set up an ethernet phy if they can. They do check whether
phylib is enabled, but unfortunately the functions can only
be called from platform code if phylib is builtin, not
if it is a module
Without this patch, building with a modular phylib results in:
arch/arm/mach-imx/mach-imx6q.c: In function 'imx6q_sabrelite_init':
arch/arm/mach-imx/mach-imx6q.c:120:5: error: 'ksz9021rn_phy_fixup' undeclared (first use in this function)
arch/arm/mach-imx/mach-imx6q.c:120:5: note: each undeclared identifier is reported only once for each function it appears in
The bug was originally reported by Artem Bityutskiy but only
partially fixed in ef441806 "ARM: imx6q: register phy fixup only when
CONFIG_PHYLIB is enabled".
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Artem Bityutskiy <dedekind1@gmail.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
This moves the imx5 pm code out of the list of unconditionally
compiled files for imx5, mirroring what we already do for imx6
and how it was done before the code was move from mach-mx5 to
mach-imx in v3.3.
Without this patch, building with CONFIG_PM disabled results in:
arch/arm/mach-imx/pm-imx5.c:202:116: error: redefinition of 'imx51_pm_init'
arch/arm/mach-imx/include/mach-imx/common.h:154:91: note: previous definition of 'imx51_pm_init' was here
arch/arm/mach-imx/pm-imx5.c:209:116: error: redefinition of 'imx53_pm_init'
arch/arm/mach-imx/include/mach-imx/common.h:155:91: note: previous definition of 'imx53_pm_init' was here
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: stable@vger.kernel.org
The new omap4 cpuidle implementation currently requires
ARCH_NEEDS_CPU_IDLE_COUPLED, which only works on SMP.
This patch makes it possible to build a non-SMP kernel
for that platform. This is not normally desired for
end-users but can be useful for testing.
Without this patch, building rand-0y2jSKT results in:
drivers/cpuidle/coupled.c: In function 'cpuidle_coupled_poke':
drivers/cpuidle/coupled.c:317:3: error: implicit declaration of function '__smp_call_function_single' [-Werror=implicit-function-declaration]
It's not clear if this patch is the best solution for
the problem at hand. I have made sure that we can now
build the kernel in all configurations, but that does
not mean it will actually work on an OMAP44xx.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
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Merge tag 'ux500-fixes-v3.6-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into fixes
From Linus Walleij <linus.walleij@linaro.org>:
Here are two audio fixes for the ux500 found by Lee Jones.
* tag 'ux500-fixes-v3.6-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: Ensure probing of Audio devices when Device Tree is enabled
ARM: ux500: Fix merge error, no matching driver name for 'snd_soc_u8500'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From Kukjin Kim <kgene.kim@samsung.com>:
For HDMI, already HDMI support for EXYNOS in mainline kernel is broken
because its configuration moved to platform data but regarding platform
data didn't support yet. And others are for fix warnings.
* 'v3.6-samsung-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: Set HDMI platform data in Origen board
ARM: EXYNOS: Set HDMI platform data in SMDKV310
ARM: SAMSUNG: Add API to set platform data for s5p-tv driver
ARM: SAMSUNG: Set HDMI platform data for Exynos4x12 SoCs
ARM: Samsung: Make uart_save static in pm.c file
ARM: S3C24XX: Fix s3c2410_dma_enqueue parameters
ARM: S3C24XX: Add missing DMACH_DT_PROP
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* 'imx/fixes-for-3.6' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: dts: imx51-babbage: fix esdhc cd/wp properties
ARM: imx6: spin the cpu until hardware takes it down
ARM i.MX6q: Add virtual 1/3.5 dividers in the LDB clock path
Also updates to Linux 3.6-rc2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The binding doc and dts use properties "fsl,{cd,wp}-internal" while
esdhc driver uses "fsl,{cd,wp}-controller". Fix binding doc and dts
to get them match driver code.
Reported-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: <stable@vger.kernel.org>
Acked-by: Chris Ball <cjb@laptop.org>
Though commit 602bf40 (ARM: imx6: exit coherency when shutting down
a cpu) improves the stability of imx6q cpu hotplug a lot, there are
still hangs seen with a more stressful hotplug testing.
It's expected that once imx_enable_cpu(cpu, false) is called, the cpu
will be taken down by hardware immediately, and the code after that
will not get any chance to execute. However, this is not always the
case from the testing. The cpu could possibly be alive for a few
cycles before hardware actually takes it down. So rather than letting
cpu execute some code that could cause a hang in these cycles, let's
make the cpu spin there and wait for hardware to take it down.
Cc: <stable@vger.kernel.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Remove the malformed "mem=" bootargs parameter in at91sam9g25ek.dts
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
AT91_ID_SYS as virq is incorrect because of spare irq support which
introduces NR_IRQS_LEGACY offset. It modifies rtc-at91sam9 driver in
order to get irq from resources.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
AT91_ID_SYS as virq is incorrect because of spare irq support which
introduces NR_IRQS_LEGACY offset.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Tested-by: Joachim Eastwood <joachim.eastwood@jotron.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This patch moves the CPU-specific IRQ registration and parsing code into
the CPU PMU backend. This is required because a PMU may have more than
one interrupt, which in turn can be either PPI (per-cpu) or SPI
(requiring strict affinity setting at the interrupt distributor).
Signed-off-by: Sudeep KarkadaNagesha <Sudeep.KarkadaNagesha@arm.com>
[will: cosmetic edits and reworked interrupt dispatching]
Signed-off-by: Will Deacon <will.deacon@arm.com>
The CPU PMU code is tightly coupled with generic ARM PMU handling code.
This makes it cumbersome when trying to add support for other ARM PMUs
(e.g. interconnect, L2 cache controller, bus) as the generic parts of
the code are not readily reusable.
This patch cleans up perf_event.c so that reusable code is exposed via
header files to other potential PMU drivers. The CPU code is
consistently named to identify it as such and also to prepare for moving
it into a separate file.
Signed-off-by: Will Deacon <will.deacon@arm.com>
The CPU PMU is probed using the current cpuid information as part of the
early_initcall initialising the architecture perf backend. For
architectures without NMI (such as ARM), this does not need to be
performed early and can be deferred to the driver probe callback. This
also allows us to probe the devicetree in preference to parsing the
current cpuid, which may be invalid on a big.LITTLE multi-cluster
system.
This patch defers the PMU probing and uses the devicetree information
when available.
Signed-off-by: Will Deacon <will.deacon@arm.com>
There's a rather strange compiler barrier in the PMU disabling code
which was presumably placed there by aliens. There's no valid reason for
the barrier and one can only suspect that it's up to no good.
This patch removes it before it has a chance to spread.
Signed-off-by: Will Deacon <will.deacon@arm.com>
The arm_pmu_type enumeration was initially introduced to identify
different PMU types in the system, the usual one being that on the CPU
(ARM_PMU_DEVICE_CPU). With the removal of the PMU reservation code and
the introduction of devicetree bindings for the CPU PMU, the enumeration
is no longer required.
This patch removes the enumeration and updates the various CPU PMU
platform devices so that they no longer pass an .id field referring
to identify the PMU type.
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Olof Johansson <olof@lixom.net>
Cc: Pawel Moll <pawel.moll@arm.com>
Acked-by: Jon Hunter <jon-hunter@ti.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Jiandong Zheng <jdzheng@broadcom.com>
Signed-off-by: Sudeep KarkadaNagesha <Sudeep.KarkadaNagesha@arm.com>
[will: cosmetic edits and actual removal of the enum type]
Signed-off-by: Will Deacon <will.deacon@arm.com>
The PMU reservation mechanism was originally intended to allow OProfile
and perf-events to co-ordinate over access to the CPU PMU. Since then,
OProfile for ARM has moved to using perf as its backend, so the
reservation code is no longer used.
This patch removes the reservation code for the CPU PMU on ARM.
Signed-off-by: Will Deacon <will.deacon@arm.com>
This patch adds separate devicetree bindings for 11MPcore and
Cortex-{A5,A7,A15} PMUs in preparation for improved devicetree parsing
in the ARM perf-event CPU PMU driver.
Cc: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Add runtime PM support to the ARM PMU driver so that devices such as OMAP
supporting dynamic PM can use the platform->runtime_* hooks to initialise
hardware at runtime. Without having these runtime PM hooks in place any
configuration of the PMU hardware would be lost when low power states are
entered and hence would prevent PMU from working.
This change also replaces the PMU platform functions enable_irq and disable_irq
added by Ming Lei with runtime_resume and runtime_suspend funtions. Ming had
added the enable_irq and disable_irq functions as a method to configure the
cross trigger interface on OMAP4 for routing the PMU interrupts. By adding
runtime PM support, we can move the code called by enable_irq and disable_irq
into the runtime PM callbacks runtime_resume and runtime_suspend.
Cc: Ming Lei <ming.lei@canonical.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@ti.com>
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Olinuxino has a LED connected to MX23_PAD_SSP1_DETECT__GPIO_2_1 pin.
Add support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Instead of assigning SSP1_DETECT inside mmc0_4bit_pins_a, let the board dts
handle this setup.
Not every board will use MX23_PAD_SSP1_DETECT as SSP1 functionality.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
hog_pins is used to setup the pin functions, and it is not neccesarily used only
for GPIO pins, so use only 'hog' to describe a more generic term.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Patch series from Kishon Vijay Abraham I <kishon@ti.com>:
This patch series is done as a preparatory step for adding phy drivers
for dwc3 and musb.
This series adds a new driver for ocp2scp (only dt) to which phy
drivers are connected.
Since currently there is no generic way to create a child device along
with doing a pm_runtime_enable (the exact requirement for ocp2scp), I'm
creating a separate driver for ocp2scp.
Changes from v3:
No functional changes. Fixed few comments on filling module details.
Changes from v2:
Fixed Felipe's comments to avoid using arch_initcall and make dependent
drivers return -EPROBE_DEFER case this isn't ready yet.
Changes from v1:
Fixed Sergei's comments to remove the address in the node name of ocp2scp
since the ocp2scp node doesn't have a reg property.
Changes from [RFC PATCH v2 0/2] omap: add ocp2scp as a misc driver:
Created a new folder drivers/bus and moved ocp2scp driver from misc to
drivers/bus.
This patch was developed and tested on
git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git
* drivers/ocp2scp:
arm/dts: omap4: Add ocp2scp data
drivers: bus: add a new driver for omap-ocp2scp
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add ocp2scp data node in omap4 device tree file.
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The Ux500 will be able to wake up on any IRQ, so flag it with
IRQCHIP_SKIP_SET_WAKE, and we want to mask off the IRQs when
going to suspend to avoid transient effects so also flag
this with IRQCHIP_MASK_ON_SUSPEND.
Cc: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
sh73a0 :: intca_irq_pins_desc irq table had conflict
from irq 552 to irq 557 before.
But the second controller was simply trampling the
first one by way of the -EEXIST case from irq_alloc_desc_at().
But now, we have irqdomain support from
1d6a21b0a6
(sh: intc: initial irqdomain support)
The irqdomain code has simply tightened down the sanity checks and
error path. So, sh73a0 CPU board got some WARNING when booting now.
This patch fixup RELOC_BASE to solve this issue.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
