* Always enable ARCH_TIMER on SoCs with A7 or A15
All such SoCs have ARCH_TIMER so there is no need for it to be optional.
This allows clean-up which is included in this change.
* Do not compile r8a7779_platform_cpu_kill when it is unused
This avoids a warning by shuffling code into an existing #ifdef
r8a7779 is the R-Car H1 SoC
* Add SMP enabler driver for the RZ/N1D (r9a06g032) SoC
This is to allow SMP to be enabled via DT on the r9a06g032
* Stop compiling headsmp-apmu for non-SMP configs
This is a minor clean-up allowing removal of an #ifdef
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Merge tag 'renesas-arm-soc2-for-v4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Second Round of Renesas ARM Based SoC Updates for v4.19
* Always enable ARCH_TIMER on SoCs with A7 or A15
All such SoCs have ARCH_TIMER so there is no need for it to be optional.
This allows clean-up which is included in this change.
* Do not compile r8a7779_platform_cpu_kill when it is unused
This avoids a warning by shuffling code into an existing #ifdef
r8a7779 is the R-Car H1 SoC
* Add SMP enabler driver for the RZ/N1D (r9a06g032) SoC
This is to allow SMP to be enabled via DT on the r9a06g032
* Stop compiling headsmp-apmu for non-SMP configs
This is a minor clean-up allowing removal of an #ifdef
* tag 'renesas-arm-soc2-for-v4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15
ARM: shmobile: r8a7779: hide unused r8a7779_platform_cpu_kill
soc: r9a06g032: don't build SMP files for non-SMP config
ARM: shmobile: Add the R9A06G032 SMP enabler driver
ARM: shmobile: rcar-gen2: Stop compiling headsmp-apmu on !SMP
Signed-off-by: Olof Johansson <olof@lixom.net>
The OPP properties, like "operating-points", should either be present
for all the CPUs of a cluster or none. If these are present only for a
subset of CPUs of a cluster then things will start falling apart as soon
as the CPUs are brought online in a different order. For example, this
will happen because the operating system looks for such properties in
the CPU node it is trying to bring up, so that it can create an OPP
table.
Add such missing properties.
Fix other missing property (clock latency) as well to make it all
work.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
- check of_iomap and add missing of_node_put since of_find_compatible_node
is invoked on hisilicon SoCs like hip01, hix5hd2 and hi3xxx.
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Merge tag 'hisi-armv7-soc-for-4.19' of git://github.com/hisilicon/linux-hisi into next/soc
ARM: mach-hisi: Hisilicon SoC updates for 4.19
- check of_iomap and add missing of_node_put since of_find_compatible_node
is invoked on hisilicon SoCs like hip01, hix5hd2 and hi3xxx.
* tag 'hisi-armv7-soc-for-4.19' of git://github.com/hisilicon/linux-hisi:
ARM: hisi: handle of_iomap and fix missing of_node_put
ARM: hisi: check of_iomap and fix missing of_node_put
ARM: hisi: fix error handling and missing of_node_put
Signed-off-by: Olof Johansson <olof@lixom.net>
IPQ8064 and IPQ4019 boards contain NAND flash
memory for which these configs need to be enabled.
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Fix all nodes to use proper GIC_* macros for the interrupt type and the
interrupt trigger settings to avoid the boot warnings.
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Tested-by: Abhishek Sahu <absahu@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
arm64's new use of KVMs get_events/set_events API calls isn't just
or RAS, it allows an SError that has been made pending by KVM as
part of its device emulation to be migrated.
Wire this up for 32bit too.
We only need to read/write the HCR_VA bit, and check that no esr has
been provided, as we don't yet support VDFSR.
Signed-off-by: James Morse <james.morse@arm.com>
Reviewed-by: Dongjiu Geng <gengdongjiu@huawei.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
With l4 interconnect hierarchy and ti-sysc interconnect target module
data in place, we can simply move all the related child devices to
their proper location and enable probing using ti-sysc.
In general the first child device address range starts at range 0
from the ti-sysc interconnect target so the move involves adjusting
the child device reg properties for that.
And we cannot yet move mmu_dsp until we have a proper reset controller
driver for rstctrl registers.
In case of any regressions, problem devices can be reverted to probe
with legacy platform data as needed by moving them back and removing
the related interconnect target module node.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Before updating wdt2 to probe with ti-sysc we want to have wdt3
probed with ti-sysc to avoid having them unnecessarily swap order.
With ti-sysc, we probe child devices at module_init time while
and until l4 abe interconnect is converted to use ti-sysc, wdt3
will probe earlier with legacy platform data.
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Let's add proper interconnect hierarchy for l4 interconnect
instances with the related ti-sysc interconnect module data as
documented in Documentation/devicetree/bindings/bus/ti-sysc.txt.
Using ti-sysc driver binding allows us to start dropping
legacy platform data in arch/arm/mach-omap2/omap*hwmod*data.c
files later on in favor of ti-sysc dts data.
For setting up a proper hierarchy for the interconnect and
ti-sysc data, there are multiple reasons:
1. We can use dts ranges to protect registers from being
ioremapped from other devices and prevent hard to track
issues with failed flush of posted write between modules
2. Some of the ranges may not be accessible to operating systems
at all if configured so on high-security devices
3. The interconnect hierarchy provides proper clockdomain
hierarchy that can be used for genpd later on
4. We can avoid almost all deferred probe related issues simply
by probing the resource providing interconnect instance first
for l4 wkup instance
5. With deferred probe issues gone, we can probe everything
later at module_init time except for system timer and interrupt
controller and their clocks.
This data is generated based on platform data from a booted system
and the interconnect acces protection registers for ranges. To avoid
regressions, we initially validate the device tree provided data
against the existing platform data on boot.
Each interconnect instance is typically divided into segments
to avoid powering up the whole interconnect. And each segment
has one or more ranges TI specific interconnect target modules
connected to it. Some devices can also have a separate data
access port directly to the parent L3 interconnect for DMA that
can be set up as a separate range.
Note that we cannot yet include this file from omap4.dtsi
until child devices are moved to their proper locations in
the interconnect hierarchy in the following patch. Otherwise
we would have the each module probed twice.
Also note that this does not yet add l4 abe instance, that will
be added separately later on.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add DMATEST support and remove invalid options, such as
CONFIG_BT_HCIUART_H4 is default enabled and CONFIG_SND_SOC_IMX_WM8962
is out of date and not appear in any config file. Please refer to
Documentation/driver-api/dmaengine/dmatest.rst to test MEMCPY feature
of imx-sdma.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Commit b97872d4eb ("ARM: dts: imx: Add missing OPP properties for CPUs")
added "operating-points" property for all CPUs, but i.MX7D already has
"operating-points-v2" property on both CPUs, so no need to add
"operating-points" property again, this patch removes it.
Fixes: b97872d4eb ("ARM: dts: imx: Add missing OPP properties for CPUs")
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
- A fix for i.MX6 RDU2 board on the wrong IRQ type of Marvell switch,
which might result in a race condition in the interrupt handler and
cause the OS to miss all future events.
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Merge tag 'imx-fixes-4.18-4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
i.MX fixes for 4.18, round 4:
- A fix for i.MX6 RDU2 board on the wrong IRQ type of Marvell switch,
which might result in a race condition in the interrupt handler and
cause the OS to miss all future events.
* tag 'imx-fixes-4.18-4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx6: RDU2: fix irq type for mv88e6xxx switch
Signed-off-by: Olof Johansson <olof@lixom.net>
R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or
Cortex-A15 CPU cores, all of which have ARM architectured timers.
Force use of the ARM architectured timer on these SoCs.
This allows to:
- Remove the calls to shmobile_init_delay() from the corresponding
machine vectors,
- Remove a check in timer setup specific to R-Car Gen2,
- Remove a check in shmobile_init_delay().
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
After the cleanup in r8a7779_smp_prepare_cpus(), the only remaining caller of
r8a7779_platform_cpu_kill() is in an ifdef, which leads to a build warning
without CONFIG_HOTPLUG_CPU:
arch/arm/mach-shmobile/smp-r8a7779.c:26:12: error: 'r8a7779_platform_cpu_kill' defined but not used [-Werror=unused-function]
This moves the function inside of that #ifdef to avoid the warning.
Fixes: 62f55ce683 ("ARM: shmobile: r8a7779: Stop powering down secondary CPUs during early boot")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Fix typo for TD function of pins PIN_PB22 and PIN_PC14
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
This adds support for Lairds upcoming SOM module, featuring Marvell WiFi
and Bluetooth, 2Gb NAND / 1Gb LPDDR SDRAM, and an Atmel SAMA5D3 CPU.
Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Add support for the LoRa gateway from Laird, the RG1xx.
This board houses the WB50NBT CPU module along with a Semtech SX1301 based
concentrator card.
https://www.lairdtech.com/products/rg1xx-lora-gateway
Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
This adds support for Lairds CPU module, featuring Atheros wifi, CSR
Bluetooth and, Atmel SAMA5D3 CPU.
https://www.lairdtech.com/products/wb50nbt-wi-fi-bluetooth-module
Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
This adds support for Lairds combo CPU module, featuring on board
Atheros wifi, CSR Bluetooth radio and, Atmel CPU.
https://www.lairdtech.com/products/wb45nbt
Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
This adds labels to commonly used device-tree nodes so that derivative
boards can avoid ahb/apb hierarchy.
Signed-off-by: Ben Whitten <ben.whitten@lairdtech.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
The Marvell switches report their interrupts in a level sensitive way.
When using edge sensitive detection a race condition in the interrupt
handler of the swich might result in the OS to miss all future events
which might make the switch non-functional.
The problem is that both mv88e6xxx_g2_irq_thread_fn() and
mv88e6xxx_g1_irq_thread_work() sample the irq cause register
(MV88E6XXX_G2_INT_SRC and MV88E6XXX_G1_STS respectively) once and then
handle the observed sources. If after sampling but before all observed
irq sources are handled a new irq source gets active this is not noticed
by the handler which returns unsuspecting, but the interrupt line stays
active which prevents the edge detector to kick in.
All device trees but imx6qdl-zii-rdu2 get this right (most of them by
not specifying an interrupt parent). So fix imx6qdl-zii-rdu2
accordingly.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Fixes: f64992d1a9 ("ARM: dts: imx6: RDU2: Add Switch interrupts")
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The dts patch for droid4 PWM vibrator has added gpio6 entries to the wrong
node. Let's fix it with a note that there seems to be also other GPIO PWM
issues to fix still to get the PWM vibrator working. So this can wait for
v4.19 merge cycle if necessary.
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Merge tag 'omap-for-v4.18/fixes-rc5-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
One omap dts mismerge fix
The dts patch for droid4 PWM vibrator has added gpio6 entries to the wrong
node. Let's fix it with a note that there seems to be also other GPIO PWM
issues to fix still to get the PWM vibrator working. So this can wait for
v4.19 merge cycle if necessary.
* tag 'omap-for-v4.18/fixes-rc5-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: omap4-droid4: fix dts w.r.t. pwm
Signed-off-by: Olof Johansson <olof@lixom.net>
According to the system control bindings, the A3-A4 SRAM node should be
a child node of the SRAM it belongs to. However, it was introduced at the
same level, therefore breaking the binding. Fix this.
Fixes: 8587019625 ("ARM: sun5i: a13: Merge common controllers into the common DTSI")
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
address-cells/size-cells is unnecessary for dwmac-sun8i node.
It was in early days, but since a mdio node is used, it could be
removed.
This patch fix the following DT warning:
Warning (avoid_unnecessary_addr_size): /soc/ethernet@1c50000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
address-cells/size-cells is unnecessary for dwmac-sun8i node.
It was in early days, but since a mdio node is used, it could be
removed.
This patch fix the following DT warning:
Warning (avoid_unnecessary_addr_size): /soc/ethernet@1c50000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
ddress-cells/size-cells is unnecessary for dwmac-sun8i node.
It was in early days, but since a mdio node is used, it could be
removed.
This patch fix the following DT warning:
Warning (avoid_unnecessary_addr_size): /soc/ethernet@1c50000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
dts reports incorrect usage of these properties in gpio-keys node.
Warning (avoid_unnecessary_addr_size): /gpio-keys: unnecessary
The patch is removing these useless properties.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add an LED node, connected to the Processing System (PS)
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Include GPIO dt-bindings and use GPIO_ACTIVE_* constants
to improve readability
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
According to the reference manual, the board has two Micron
MT41K256M16HA-125 DDR3L memory ICs, which have 512 MiB each
Tested on a ZYBO-Z7-20 board
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Replace the current value of the model property by a more accurate
description of each board (which includes the manufacturer), as some
of the boards had the same value ("Xilinx Zynq")
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Both boards are made by Avnet, Inc. So add an additional
value to the compatible property
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add a dts for MYIR Z-turn board and respective target in Makefile.
Signed-off-by: Anton Gerasimov <tossel@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds parallel display support for i.MX6DL Mamoj board
along with relevant backlight through pwm.
LCD power sequence is added by 'Michael Trimarchi'.
Signed-off-by: Simone CIANNI <simone.cianni@bticino.it>
Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Since commit ce99d0bf31 ("kbuild: clear LDFLAGS in the top Makefile"),
the top-level Makefile caters to this.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
The cooling device properties, like "#cooling-cells" and
"dynamic-power-coefficient", should either be present for all the CPUs
of a cluster or none. If these are present only for a subset of CPUs of
a cluster then things will start falling apart as soon as the CPUs are
brought online in a different order. For example, this will happen
because the operating system looks for such properties in the CPU node
it is trying to bring up, so that it can register a cooling device.
Add such missing properties.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
- add NAND controller on multi_v7
- add SFP support on mvebu_v7
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Merge tag 'mvebu-defconfig-4.19-1' of git://git.infradead.org/linux-mvebu into next/defconfig
mvebu defconfig for 4.19 (part 1)
- add NAND controller on multi_v7
- add SFP support on mvebu_v7
* tag 'mvebu-defconfig-4.19-1' of git://git.infradead.org/linux-mvebu:
ARM: mvebu_v7_defconfig: enable SFP support
ARM: mvebu_v7_defconfig: sync defconfig
ARM: multi_v7_defconfig: Add Marvell NAND controller support
Signed-off-by: Olof Johansson <olof@lixom.net>
- remove potential call from invalid context in boot_secondary
- allow using CONFIG_FORTIFY_SOURCE in pmsu.c
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Merge tag 'mvebu-arm-4.19-1' of git://git.infradead.org/linux-mvebu into next/soc
mvebu arm for 4.19 (part 1)
- remove potential call from invalid context in boot_secondary
- allow using CONFIG_FORTIFY_SOURCE in pmsu.c
* tag 'mvebu-arm-4.19-1' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: convert secondary CPU clock sync to hotplug state
ARM: mvebu: declare asm symbols as character arrays in pmsu.c
Signed-off-by: Olof Johansson <olof@lixom.net>
This enables support for SFP cages on SolidRun Armada 38x platforms.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Use savedefconfig to sync defconfig for current kernel. No change in
generated configuration.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
- the pxa architecture is ported to dma slavemap
- some minor AC97 fixes
- some minor board fixes
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Merge tag 'pxa-for-4.19-v2' of https://github.com/rjarzmik/linux into next/soc
This is the pxa changes for 4.19 cycle :
- the pxa architecture is ported to dma slavemap
- some minor AC97 fixes
- some minor board fixes
* tag 'pxa-for-4.19-v2' of https://github.com/rjarzmik/linux:
net: smc91x: remove the dmaengine compat need
net: smc911x: remove the dmaengine compat need
ARM: pxa: zylonite: use the new ac97 bus support
ARM: pxa: add the missing AC97 clocks
ARM: pxa: mioa701 convert to the new AC97 bus
ARM: pxa: hx4700: fix the usb client
ARM: pxa: change SSP DMA channels allocation
ARM: pxa: remove the DMA IO resources
dmaengine: pxa: document pxad_param
ata: pata_pxa: remove the dmaengine compat need
mtd: rawnand: marvell: remove the dmaengine compat need
media: pxa_camera: remove the dmaengine compat need
mmc: pxamci: remove the dmaengine compat need
dmaengine: pxa: add a default requestor policy
ARM: pxa: add dma slave map
dmaengine: pxa: use a dma slave map
Signed-off-by: Olof Johansson <olof@lixom.net>
Now that the vhub driver is upstream and the device-trees
updated, let's enable this by default.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Now that the vhub driver is upstream and the device-trees
updated, let's enable this by default.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
The aspeed pwm driver always sets the clock source to 24MHz, specify
the fixed clock in device tree to make sure the driver is using the
correct clock frequency to calculate the fan speed.
Signed-off-by: Lei YU <mine260309@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
None of the board files are overloading those hooks, so let's drop them
from struct platform_nand_ctrl.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
This adds the Ethernet and Realtek switch device to the
D-Link DIR-685 Gemini-based device.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Since for ULP1 PM mode of SAMA5D2 the wakeup sources are limited and
well known add a method to check if these wakeup sources are defined by
user (either via DT or filesystem). In case there are no wakeup sources
defined for ULP1 the PM suspend will fail, otherwise these will be
configured in fast startup registers of PMC. Since wakeup sources of
ULP1 need also to be configured in SHDWC registers the code was a bit
changed to map the SHDWC also in case ULP1 is requested by user (this
was done in the initialization phase). In case the ULP1 initialization
fails the ULP0 mode is used (this mode was also used in case backup mode
initialization failed).
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
In the ULP1 mode, in order to achieve the lowest power consumption
with the system in retention mode and be able to resume on the wake
up events, all the clocks are shut off, inclusive the embedded 12MHz
RC oscillator, and the number of wake up sources is limited as well.
When the wake up event is asserted, the embedded 12MHz RC oscillator
restarts automatically.
The ULP1 (Ultra Low-power mode 1) is introduced by SAMA5D2.
The previous size of pm_suspend.o was 2148 bytes. With the addition of
ULP1 mode the new size of pm_suspend.o raised at 2456 bytes.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
[claudiu.beznea@microchip.com: aligned with 4.18-rc1]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Switch to use ULP0 naming instead of slow clock naming for power modes, to
be as closed as possible to datasheet. This commit does the necessary
renaming and macro addition to be as close as possible to the namings
from [1].
[1] https://lore.kernel.org/lkml/1470650705-31418-3-git-send-email-wenyou.yang@atmel.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
The "Beaglebone Enhanced" by Sancloud is based on the Beaglebone Black,
but with the following differences:
* Gigabit capable PHY
* Extra USB hub, optional i2c control
* lps3331ap barometer connected over i2c
* MPU6050 6 axis MEMS accelerometer/gyro connected over i2c
* 1GiB DDR3 RAM
* RTL8723 Wifi/Bluetooth connected over USB
Tested on a revision G board.
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
There are two variants of imx6ul-pico boards: one with 256MB and
another one with 512MB of RAM.
Do not hardcode the memory size in the device tree and let the
bootloader fill the correct value instead.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On i.MX6SL EVK board, pfuze100 sw4 supplies
LPDDR2 which is critical for system, must be
always on.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On i.MX6SLL EVK board, pfuze100 sw4 supplies
LPDDR3 which is critical for system, must be
always on.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On i.MX6SX SDB Rev-A board, pfuze100 sw4 supplies
csi, audio codec and i2c etc., these modules do NOT
implement power domain control, so pfuze100 sw4
needs to be always on to make sure these modules
work normally.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On i.MX6QDL Sabre-SD board, pfuze100 sw4 supplies
GPS, touch and RGMII etc., these modules do NOT
implement power domain control, so pfuze100 sw4
needs to be always on to make sure these modules
work normally.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
OSD3358-SM-RED is a dev board for OSD335x System-in-Package(SiP) devices from
Octavo Systems.
This board family can be indentified by the A335BNLTOS00 in the at24 eeprom:
A2: [aa 55 33 ee 41 33 33 35 42 4e 4c 54 4f 53 30 30 |.U3.A335BNLTOS00|]
https://octavosystems.com/octavo_products/osd3358-sm-red/
Signed-off-by: Neeraj Dantu <neeraj.dantu@octavosystems.com>
CC: Tony Lindgren <tony@atomide.com>
CC: Robert Nelson <robertcnelson@gmail.com>
CC: Jason Kridner <jkridner@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
On i.MX6SL EVK board, the MX6SL_PAD_KEY_ROW5 pin is
used as lcd 3v3 regulator control pin, need to make
sure MX6SL_PAD_KEY_ROW5 is muxed as GPIO function
for controlling lcd 3v3 regulator.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by; Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
It looks like I made a nasty typo in the original patch which resulted
in missing watchdog device. Fix it.
Cc: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: cphealy@gmail.com
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Instead of relying on default values, configure PAD_AUD3_BB_CK to be a
GPIO explicitly. While at, it change the pad configuration to enable
a 100K pull-down (the pin is used as IRQ_TYPE_LEVEL_HIGH).
Cc: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: cphealy@gmail.com
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
pwm node should not be under gpio6 node in the device tree.
This fixes detection of the pwm on Droid 4.
Fixes: 6d7bdd328d ("ARM: dts: omap4-droid4: update touchscreen")
Signed-off-by: Pavel Machek <pavel@ucw.cz>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
[tony@atomide.com: added fixes tag]
Signed-off-by: Tony Lindgren <tony@atomide.com>
This display configuration isn't working as-is as it depends on the
tfp410 LCD to HDMI bridge. This will need to be updated later once
the DRM MXSFB driver will be the default.
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
To make use of the new eLCDIF DRM driver OF graph description is
required. Describe the display using OF graph nodes.
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The imx6sl soc has gpu_2d and gpu_vg, no 3d support:
etnaviv-gpu 2200000.gpu: model: GC320, revision: 5007
etnaviv-gpu 2204000.gpu: model: GC355, revision: 1215
The IP blocks seem to be already supported.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On i.MX6SLL EVK board, lcd regulator is controlled
by GPIO4 IO03 using MX6SLL_PAD_KEY_ROW5__GPIO4_IO03 pin,
NOT MX6SLL_PAD_ECSPI1_SCLK__GPIO4_IO08, correct it.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add 'secure-reg-access' property to enable PMU and hardware counters
so that they can be properly used with the 'perf' tool.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add 'secure-reg-access' property to enable PMU and hardware counters
so that they can be properly used with the 'perf' tool.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add 'secure-reg-access' property to enable PMU and hardware counters
so that they can be properly used with the 'perf' tool.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
[fabio: kept the change only in imx53-ppd context]
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Use the the DRM driver for MXSFB LCD controller (used in i.MX23/
i.MX28/i.MX6SX or i.MX7). Remove CONFIG_FB_MXS which will soon be
removed.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Use the the DRM driver for MXSFB LCD controller (used in i.MX23/
i.MX28/i.MX6SX or i.MX7). Remove CONFIG_FB_MXS which will soon be
removed.
Note that this does not remove CONFIG_FB. CONFIG_FB gets selected
implicity by CONFIG_DRM/CONFIG_DRM_KMS_FB_HELPER.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The ConnectCore 6UL Single Board Computer (SBC) Express contains the
ConnectCore 6UL System-On-Module.
Its hardware specifications are:
* 256MB DDR3 memory
* 256MB NAND flash
* Single Ethernet
* USB Host and USB-OTG
* MicroSD external storage
* Groove connectors and Raspberry Pi Hat compatible expansion header
Signed-off-by: Alex Gonzalez <alex.gonzalez@digi.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The ConnectCore 6UL System-On-Module has the following hardware
specification:
* Based on a NXP i.MX6UL SoC
* Industrial temperature ranges (-40ºC to +85ºC)
* Up to 1GB DDR3 memory
* Up to 2GB NAND flash
* Dual Ethernet
* On module 802.11 WiFi and Bluetooth 4.2 (QCA6564)
* On module NXP Kinetis KL03
* On module Microchip ATECC508A crypto element
Signed-off-by: Alex Gonzalez <alex.gonzalez@digi.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx51-zii-rdu1 has an external watchdog in the environment
microcontroller, so disable the internal one.
This aligns with what was done in commit 7055f71403 ("ARM: dts:
imx6: RDU2: disable internal watchdog") for imx6 rdu2 board.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Relying on an unchecked of_iomap() which can return NULL is problematic
here, an explicit check seems mandatory. Also the call to
of_find_compatible_node() returns a device node with refcount incremented
therefor an explicit of_node_put() is needed here.
Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org>
Fixes: commit 22bae42904 ("ARM: hi3xxx: add hotplug support")
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
of_find_compatible_node() returns a device node with refcount incremented
and thus needs an explicit of_node_put(). Further relying on an unchecked
of_iomap() which can return NULL is problematic here, after all ctrl_base
is critical enough for hix5hd2_set_cpu() to call BUG() if not available
so a check seems mandated here.
Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org>
0002 Fixes: commit 06cc5c1d4d ("ARM: hisi: enable hix5hd2 SoC")
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
of_iomap() can return NULL which seems critical here and thus should be
explicitly flagged so that the cause of system halting can be understood.
As of_find_compatible_node() is returning a device node with refcount
incremented it must be explicitly decremented here.
Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org>
Fixes: commit 7fda91e731 ("ARM: hisi: enable smp for HiP01")
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Normally, we didn't release this kind of baord to user. This specific
board exists only in the early stage of development inside MediaTek -
and that may confuse peoples.
Hence this patch removes related files accordingly.
Cc: John Crispin <john@phrozen.org>
Cc: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Acked-by: John Crispin <john@phrozen.org>
Acked-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The reserved memory for the VGA frame buffer is at the wrong address
for this system.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
This is an eval board, it makes sense to enable many
functions by default. This changes the device-tree to
set port A to be a USB device and leave port B as a
host, along with a little comment explaining how to
change it.
(the vhub device can only exist on port A on this SoC)
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
This adds the (disabled by default) device node for the
Aspeed virtual hub,a long with clocks and pinmux.
This also adds the missing pinmux definition for it
(the kernel driver already knows about it).
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
This adds the (disabled by default) device node for the
Aspeed virtual hub,a long with clocks and pinmux.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Set the default pinmux for EHCIs so boards don't have to do
it an document why it is not set for UHCI.
Remove the properties from the AST2500 EVB board which are
now redundant
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Set the default pinmux for EHCI so boards don't have to do
it, and document why it is not set for UHCI.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Pio-leds (near GPIO-Header) are swapped and LOW-active.
This patch restores the expected behaviour.
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Instead of setting the DMA ops pointer to NULL, set the correct,
non-IOMMU ops depending on the device's coherency setting.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
- A fix for OMAP5 and DRA7 to make the branch predictor hardening
settings take proper effect on secondary cores
- Disable USB OTG on am3517 since current driver isn't working
- Fix thermal sensor register settings on Armada 38x
- Fix suspend/resume IRQs on pxa3xx
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Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
- A fix for OMAP5 and DRA7 to make the branch predictor hardening
settings take proper effect on secondary cores
- Disable USB OTG on am3517 since current driver isn't working
- Fix thermal sensor register settings on Armada 38x
- Fix suspend/resume IRQs on pxa3xx
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: dts: am3517.dtsi: Disable reference to OMAP3 OTG controller
ARM: DRA7/OMAP5: Enable ACTLR[0] (Enable invalidates of BTB) for secondary cores
ARM: pxa: irq: fix handling of ICMR registers in suspend/resume
ARM: dts: armada-38x: use the new thermal binding
- Add Vitesse switch chips
- Add a new DT for a reference design
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Merge tag 'gemini-dts-v4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt
Gemini DTS updates for v4.19:
- Add Vitesse switch chips
- Add a new DT for a reference design
* tag 'gemini-dts-v4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: Add devicetree for Storlink/Storm SL93512R
ARM: dts: Add Vitesse G5e switch to the Gemini SQ201
ARM: dts: Add WAN ethernet port to the SQ201
Signed-off-by: Olof Johansson <olof@lixom.net>
The Storlink Gemini324 EV-Board also known as Storm
Semiconductor SL93512R_BRD is ground zero for the Gemini
devices. We add a device tree so we can support it, it
turns out to be pretty trivial.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds the Vitesse G5e ethernet switch to the Square
One Itian SQ201 router device tree.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This sets up the ethernet interface and PHY for the
WAN ethernet port which uses a Marvell PHY.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Turns out the recent patches for ARM branch predictor hardening are
not working on omap5 and dra7 as planned because the secondary CPU
is parked to the bootrom code. We can't configure it in the bootloader.
So we must enable invalidates of BTB for omap5 and dra7 secondary
core in the kernel.
And there's a fix for reserved register access for am3517. The
usb otg module on am3517 is not the same as for other omap3.
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Merge tag 'omap-for-v4.18/fixes-rc4-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Two omap fixes for v4.18-rc cycle
Turns out the recent patches for ARM branch predictor hardening are
not working on omap5 and dra7 as planned because the secondary CPU
is parked to the bootrom code. We can't configure it in the bootloader.
So we must enable invalidates of BTB for omap5 and dra7 secondary
core in the kernel.
And there's a fix for reserved register access for am3517. The
usb otg module on am3517 is not the same as for other omap3.
* tag 'omap-for-v4.18/fixes-rc4-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am3517.dtsi: Disable reference to OMAP3 OTG controller
ARM: DRA7/OMAP5: Enable ACTLR[0] (Enable invalidates of BTB) for secondary cores
Signed-off-by: Olof Johansson <olof@lixom.net>
Use the new thermal binding on Armada 38x allowing to use a driver fix
which is already part of the kernel.
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Merge tag 'mvebu-fixes-4.18-1' of git://git.infradead.org/linux-mvebu into fixes
mvebu fixes for 4.18 (part 1)
Use the new thermal binding on Armada 38x allowing to use a driver fix
which is already part of the kernel.
* tag 'mvebu-fixes-4.18-1' of git://git.infradead.org/linux-mvebu:
ARM: dts: armada-38x: use the new thermal binding
Signed-off-by: Olof Johansson <olof@lixom.net>
This is a fix for suspending all pxa3xx platforms, where high
number interrupts are not reenabled.
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Merge tag 'pxa-fixes-4.18' of https://github.com/rjarzmik/linux into fixes
This is the fixes set for v4.18 cycle.
This is a fix for suspending all pxa3xx platforms, where high
number interrupts are not reenabled.
* tag 'pxa-fixes-4.18' of https://github.com/rjarzmik/linux:
ARM: pxa: irq: fix handling of ICMR registers in suspend/resume
Signed-off-by: Olof Johansson <olof@lixom.net>
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Merge tag 'v4.18-rockchip-dts32fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Fix for a new warning from dtc in graph node unit addresses.
* tag 'v4.18-rockchip-dts32fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: fix graph node unit address error from dtc
Signed-off-by: Olof Johansson <olof@lixom.net>
This contains a single fix for the Trusted Foundations firmware
implementation, used on some Tegra20 and Tegra30 platforms.
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Merge tag 'tegra-for-4.19-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/soc
firmware: tegra: Changes for v4.19-rc1
This contains a single fix for the Trusted Foundations firmware
implementation, used on some Tegra20 and Tegra30 platforms.
* tag 'tegra-for-4.19-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: trusted_foundations: do not use naked function
Signed-off-by: Olof Johansson <olof@lixom.net>
These changes are mostly PM related changes for am335x and
am437x to support RTC only suspend mode. Some of the clock
and driver related chances are still pending so it's not
yet fully functional.
Also included is a change for PM debug sysfs entry to use
DEFINE_SHOW_ATTRIBUTE.
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Merge tag 'omap-for-v4.19/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
SoC updates for omaps for v4.19 merge window
These changes are mostly PM related changes for am335x and
am437x to support RTC only suspend mode. Some of the clock
and driver related chances are still pending so it's not
yet fully functional.
Also included is a change for PM debug sysfs entry to use
DEFINE_SHOW_ATTRIBUTE.
* tag 'omap-for-v4.19/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: sleep33/43xx: Add RTC-Mode support
ARM: OMAP2+: sleep33/43xx: Make sleep actions configurable
ARM: OMAP2+: reuse DEFINE_SHOW_ATTRIBUTE() macro
ARM: hwmod: RTC: Don't assume lock/unlock will be called with irq enabled
Signed-off-by: Olof Johansson <olof@lixom.net>
Mostly a series by Janusz Krzysztofik to clean up the
GPIO and input handling for ams-delta. Because of the
platform data changes, we decided that it's best to
merge the related input changes also via the arm-soc
tree so Dmitry Torokhov has acked the input changes.
Also included is a change to constify gpio_leds from
Arvind Yadav.
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Merge tag 'omap-for-v4.19/omap1-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
SoC updates for omap1 for v4.19 merge window
Mostly a series by Janusz Krzysztofik to clean up the
GPIO and input handling for ams-delta. Because of the
platform data changes, we decided that it's best to
merge the related input changes also via the arm-soc
tree so Dmitry Torokhov has acked the input changes.
Also included is a change to constify gpio_leds from
Arvind Yadav.
* tag 'omap-for-v4.19/omap1-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP1: ams-delta: move late devices back to init_machine
Input: ams_delta_serio: Get FIQ buffer from platform_data
Input: ams_delta_serio: use IRQ resource
ARM: OMAP1: Get rid of <mach/ams-delta-fiq.h>
ARM: OMAP1: ams-delta FIQ: Keep serio input GPIOs requested
ARM: OMAP1: ams-delta FIQ: don't use static GPIO numbers
ARM: OMAP1: ams-delta: Hog "keybrd_dataout" GPIO pin
Input: ams_delta_serio: Replace power GPIO with regulator
Input: ams_delta_serio: use private structure
Input: ams_delta_serio: convert to platform driver
ARM: OMAP1: ams-delta: drop GPIO lookup table for serio device
ARM: OMAP1: ams-delta: assign LED GPIO numbers from descriptors
ARM: OMAP1: ams-delta: refactor late_init()
ARM: OMAP1: constify gpio_led
Signed-off-by: Olof Johansson <olof@lixom.net>
After the work done by Thomas Petazzoni, the NAND chip timings
can be read out from the chip instead of open coded in the
device tree, so let's just remove the timing information.
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Enable options needed for booting full system on S5Pv210-based Samsung
Galaxy S mobile phones.
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Merge tag 'samsung-defconfig-4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/defconfig
Samsung defconfig changes for v4.19
Enable options needed for booting full system on S5Pv210-based Samsung
Galaxy S mobile phones.
* tag 'samsung-defconfig-4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: s5pv210_defconfig: Enable options needed to boot typical Linux distro
ARM: s5pv210_defconfig: Enable drivers for Samsung Aries based phones
ARM: s5pv210_defconfig: Run make savedefconfig
Signed-off-by: Olof Johansson <olof@lixom.net>
-----------------------------------
* Enable support for PWM backight and bluetooth
* Remove some vestiges of mach-davinci private clock implementation.
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Merge tag 'davinci-for-v4.19/defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/defconfig
DaVinci defconfig updates for v4.19
-----------------------------------
* Enable support for PWM backight and bluetooth
* Remove some vestiges of mach-davinci private clock implementation.
* tag 'davinci-for-v4.19/defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci_all_defconfig: Enable Bluetooth
ARM: davinci_all_defconfig: remove CONFIG_DAVINCI_RESET_CLOCKS
ARM: davinci_all_defconfig: set CONFIG_BACKLIGHT_PWM=m
Signed-off-by: Olof Johansson <olof@lixom.net>
Highlights:
----------
-MCU platforms update:
-Update RTC syscfg bindings on stm32f746 and stm32f429
-Update IWDG node with LSI clock name on stm32f429
-MPU STM32MP157 platform update:
-Add HASH support
-Add m_can support and enable it on EV1 board
-Add RTC suppoort and enable it on ED1 board
-Add USB OTG HS support and enable it on EV1 board
-Enable USB Host EHCI on EV1 board
-Add DFSDM support
-Add SPI support
-Add ETH support and enable it on EV1 board
-Add IWDG support and enable it on ED1 board
-Fix useless GPIO aliases and reorder nodes
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Merge tag 'stm32-dt-for-v4.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into next/dt
STM32 DT updates for v4.19, round 1
Highlights:
----------
-MCU platforms update:
-Update RTC syscfg bindings on stm32f746 and stm32f429
-Update IWDG node with LSI clock name on stm32f429
-MPU STM32MP157 platform update:
-Add HASH support
-Add m_can support and enable it on EV1 board
-Add RTC suppoort and enable it on ED1 board
-Add USB OTG HS support and enable it on EV1 board
-Enable USB Host EHCI on EV1 board
-Add DFSDM support
-Add SPI support
-Add ETH support and enable it on EV1 board
-Add IWDG support and enable it on ED1 board
-Fix useless GPIO aliases and reorder nodes
* tag 'stm32-dt-for-v4.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (22 commits)
ARM: dts: stm32: update iwdg with lsi clock name for stm32f429
ARM: dts: stm32: add iwdg2 support for stm32mp157c-ed1
ARM: dts: stm32: add iwdg2 support for stm32mp157c
ARM: dts: stm32: Reorder nodes in stm32mp157c-ed1
ARM: dts: stm32: remove gpio aliases for stm32mp157c
ARM: dts: stm32: add support of ethernet on stm32mp157c-ev1
ARM: dts: stm32: Add ethernet dwmac on stm32mp1
ARM: dts: stm32: Add syscfg on stm32mp1
ARM: dts: stm32: add SPI1 support on stm32mp157c-ev1
ARM: dts: stm32: add SPI support on stm32mp157c
ARM: dts: stm32: Add DFSDM support to stm32mp157c
ARM: dts: stm32: Add ADC support to stm32mp157c
ARM: dts: stm32: enable USB OTG HS on stm32mp157c-ev1
ARM: dts: stm32: add USB OTG HS support for stm32mp157c SoC
ARM: dts: stm32: enable USB Host (USBH) EHCI controller on stm32mp157c-ev1
ARM: dts: stm32: enable RTC on stm32mp157c-ed1
ARM: dts: stm32: add RTC support to stm32mp157c
ARM: dts: stm32: m_can activation on stm32mp157c-ev1
ARM: dts: stm32: m_can support to stm32mp157c
ARM: dts: stm32: Add HASH support on stm32mp157c
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add a new Armada 388 based board: helios4
- Enable SPI flash by default on SolidRun Armada 38x Microsom
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Merge tag 'mvebu-dt-4.19-1' of git://git.infradead.org/linux-mvebu into next/dt
mvebu dt for 4.19 (part 1)
- Add a new Armada 388 based board: helios4
- Enable SPI flash by default on SolidRun Armada 38x Microsom
* tag 'mvebu-dt-4.19-1' of git://git.infradead.org/linux-mvebu:
ARM: dts: armada388-clearfog: drop future changes disclaimer
ARM: dts: armada388-clearfog: enable spi flash
ARM: dts: armada388-helios4
Signed-off-by: Olof Johansson <olof@lixom.net>
1. Add two new S5Pv210 boards: Samsung Galaxy S and Samsung Galaxy S 4G
mobile phones. Both are from family codenamed Aries. The Samsung
Galaxy S was released on the market in 2010 with Android operating
system. At that time, it was the Samsung's flagship model.
This brings support for storage (SD card and internal memory), PMIC,
RTC, fuel-gauge, keys, USB (in peripherial mode) and WiFi.
2. Add missing secondary CPU properties.
3. Cleanup from old files and properties.
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Merge tag 'samsung-dt-4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Samsung DTS ARM changes for v4.19
1. Add two new S5Pv210 boards: Samsung Galaxy S and Samsung Galaxy S 4G
mobile phones. Both are from family codenamed Aries. The Samsung
Galaxy S was released on the market in 2010 with Android operating
system. At that time, it was the Samsung's flagship model.
This brings support for storage (SD card and internal memory), PMIC,
RTC, fuel-gauge, keys, USB (in peripherial mode) and WiFi.
2. Add missing secondary CPU properties.
3. Cleanup from old files and properties.
* tag 'samsung-dt-4.19' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
dt-bindings: samsung: Document bindings for SGH-T959P board
dt-bindings: samsung: Document bindings for Samsung aries boards
ARM: dts: s5pv210: Add initial DTS for SGH-T959P phone
ARM: dts: s5pv210: Add initial DTS for Samsung Galaxy S phone
ARM: dts: s5pv210: Add initial DTS for Samsung Aries based phones
ARM: dts: s5pv210: Add missing interrupt-controller property to gph2
ARM: dts: exynos: remove no longer needed samsung thermal properties
dt-bindings: arm: Remove obsolete insignal-boards.txt
ARM: dts: exynos: Add missing CPU clocks to secondary CPUs on Exynos542x
arm: dts: exynos: Add missing cooling device properties for CPUs
Signed-off-by: Olof Johansson <olof@lixom.net>
This set of changes adds support for the memory client resets on Tegra20
and Tegra30, fixes a couple of issues on Cardhu and Tegra30 Apalis as
well as adds a unit-address to the memory node to avoid warnings from
DTC. To round things of, the NAND flash controller is enabled on the
Tegra20 Colibri.
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Merge tag 'tegra-for-4.19-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
ARM: tegra: Device tree changes for v4.19-rc1
This set of changes adds support for the memory client resets on Tegra20
and Tegra30, fixes a couple of issues on Cardhu and Tegra30 Apalis as
well as adds a unit-address to the memory node to avoid warnings from
DTC. To round things of, the NAND flash controller is enabled on the
Tegra20 Colibri.
* tag 'tegra-for-4.19-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: dts: tegra: enable NAND flash on Colibri T20
ARM: dts: tegra: add Tegra20 NAND flash controller node
ARM: tegra: Work safely with 256 MB Colibri-T20 modules
ARM: tegra: Fix unit_address_vs_reg and avoid_unnecessary_addr_size DTC warnings
ARM: tegra: Fix unit_address_vs_reg DTC warnings for /memory
ARM: tegra: Remove usage of deprecated skeleton.dtsi
ARM: tegra: Fix can2 on Tegra30 Apalis
ARM: tegra: Fix Tegra30 Cardhu PCA954x reset
ARM: dts: tegra30: Add Memory Client reset to VDE
ARM: dts: tegra20: Add Memory Client reset to VDE
Signed-off-by: Olof Johansson <olof@lixom.net>
These changes configure the mcan clock, interconnect target
module and mcan device. These changes depend on the ti-sysc
related driver changes and are based on those.
Notably this is the first new driver that probes with ti-sysc
driver with no legacy hwmod platform data for the interconnect
target module.
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Merge tag 'omap-for-v4.19/dt-mcan-v2-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
dts changes for mcan for omaps for v4.19 merge window
These changes configure the mcan clock, interconnect target
module and mcan device. These changes depend on the ti-sysc
related driver changes and are based on those.
Notably this is the first new driver that probes with ti-sysc
driver with no legacy hwmod platform data for the interconnect
target module.
* tag 'omap-for-v4.19/dt-mcan-v2-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: dra76x: Add MCAN node
ARM: dts: Add generic interconnect target module node for MCAN
ARM: dts: dra762: Add MCAN clock support
bus: ti-sysc: Add support for software reset
bus: ti-sysc: Add support for using ti-sysc for MCAN on dra76x
clk: ti: dra7: Add clkctrl clock data for the mcan clocks
bus: ti-sysc: Use 2-factor allocator arguments
Signed-off-by: Olof Johansson <olof@lixom.net>
Mostly updates to configure and improve the devices
found on various SoCs and boards:
- several patches to update support for am3517-evm
to replace bogus fixed regulators with proper
regulators and configure various devices such
as wlan, bluetooth and usb1
- add missing cooling devices for omap5 and dra7
- configure dual role for usb ports for am57xx
and dra7
- PM updates for omap4 devices to allow retention
idle for minimal configurations
- am335x-sl50 updates for various devices
- update d-can alias names to not use undescore
- configure pandaboard gpio button
- a non-urgent change to fix dcan node address that
i forgot to send a pull request for earlier
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Merge tag 'omap-for-v4.19/dt-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
dts changes for omaps for v4.19 merge window
Mostly updates to configure and improve the devices
found on various SoCs and boards:
- several patches to update support for am3517-evm
to replace bogus fixed regulators with proper
regulators and configure various devices such
as wlan, bluetooth and usb1
- add missing cooling devices for omap5 and dra7
- configure dual role for usb ports for am57xx
and dra7
- PM updates for omap4 devices to allow retention
idle for minimal configurations
- am335x-sl50 updates for various devices
- update d-can alias names to not use undescore
- configure pandaboard gpio button
- a non-urgent change to fix dcan node address that
i forgot to send a pull request for earlier
* tag 'omap-for-v4.19/dt-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (25 commits)
ARM: dts: pandaboard: add gpio user button
ARM: dts: am3517-evm: Add 'vdd_io_reg' regulator references
ARM: dts: am3517-evm: Enable USB1 Host
ARM: dts: am33xx: Fix syntax of alias names
ARM: dts: am3517-som: Add builtin Bluetooth
ARM: dts: am3517-som: Add WL127x Wifi
ARM: dts: am335x-sl50: enable tsadc on SL50 board
ARM: dts: am335x-sl50: fix label names for all LEDs
ARM: dts: am335x-sl50: use audio-graph-card for sound
ARM: dts: am335x-sl50: add support for DS1339 Real Time Clock
ARM: dts: am335x-sl50: set dr_mode to otg
ARM: dts: am335x-sl50: add a node for the LCD controller
ARM: dts: am335x-sl50: use phy-phandle declarations
ARM: dts: am335x-sl50: update backlight nodes
ARM: dts: omap4-droid4: Use software debounce for gpio-keys
ARM: dts: Configure duovero for to allow core retention during idle
ARM: dts: Improve omap l4per idling with wlcore edge sensitive interrupt
ARM: dts: dra76-evm: Add VBUS GPIO to USB1/USB2 extcon
ARM: dts: dra71-evm: Add VBUS GPIO to USB1/USB2 extcon
ARM: dts: dra7-evm: Add extcon to USB2 port
...
Signed-off-by: Olof Johansson <olof@lixom.net>
-------------------------------------
* DA850 now uses clocks from device-tree
* DA850 EVM gains LCD (with backlight) and SATA support
* Lego Mindstorms gains bluetooth support
* DSP reset control support on DA850
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Merge tag 'davinci-for-v4.19/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/dt
DaVinci Device-Tree updates for v4.19
-------------------------------------
* DA850 now uses clocks from device-tree
* DA850 EVM gains LCD (with backlight) and SATA support
* Lego Mindstorms gains bluetooth support
* DSP reset control support on DA850
* tag 'davinci-for-v4.19/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: dts: da850: Add power-domains to CPPI 4.1 node
ARM: davinci: dts: add a reset control to the dsp node
ARM: davinci: dts: make psc0 a reset provider
ARM: dts: da850-lego-ev3: Add Bluetooth nodes
ARM: dts: da850: Add power-domains to PWM nodes
ARM: dts: da850: Add clocks
dt-bindings: timer: new bindings for TI DaVinci timer
ARM: dts: da850-evm: Enable LCD and backlight
ARM: dts: da850-evm: Enable SATA port
Signed-off-by: Olof Johansson <olof@lixom.net>
-----------------------------
* mach-davinci updates needed to finally move over to common clock framework
* update to use the aemif driver from drivers/memory rather than the
private implementation available in mach-davinci
For the later item, I have included a branch from David Lechner which
should also get merged through the clk tree. The clk dependencies are
needed for aemif conversion.
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Merge tag 'davinci-for-v4.19/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc
DaVinci SoC updates for v4.19
-----------------------------
* mach-davinci updates needed to finally move over to common clock framework
* update to use the aemif driver from drivers/memory rather than the
private implementation available in mach-davinci
For the later item, I have included a branch from David Lechner which
should also get merged through the clk tree. The clk dependencies are
needed for aemif conversion.
* tag 'davinci-for-v4.19/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci: (34 commits)
ARM: davinci: unduplicate aemif support
ARM: davinci: mityomapl138: use aemif platform driver
ARM: davinci: dm646x-evm: use aemif platform driver
ARM: davinci: da830-evm: use aemif platform driver
ARM: davinci: dm644x-evm: use aemif platform driver
ARM: davinci: dm365-evm: use the ti-aemif soc driver
ARM: davinci: da850-evm: use aemif platform driver in legacy mode
ARM: davinci: omapl138-hawk: add aemif & nand support
clk: davinci: psc-da830: add a lookup entry for aemif clock
clk: davinci: psc-dm646x: use two lookup entries for the aemif clock
clk: davinci: psc-dm644x: use two lookup entries for the aemif clock
clk: davinci: psc-dm365: use two lookup entries for the aemif clock
clk: davinci: psc-da850: remove the 'davinci_nand.0" lookup
ARM: davinci: da8xx-dt: switch to device tree clocks
ARM: davinci: add device tree support to timer
ARM: davinci: remove legacy clocks
ARM: davinci: da8xx: Remove legacy USB and SATA clock init
ARM: davinci: dm646x: Remove legacy clock init
ARM: davinci: dm644x: Remove legacy clock init
ARM: davinci: dm365: Remove legacy clock init
...
Signed-off-by: Olof Johansson <olof@lixom.net>
4.19, please pull the following:
- Clement re-orders the UART debug entries to be in ascending order and
he also adds the iProc UART3 debug address since that is a common
location for iProc based designs.
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Merge tag 'arm-soc/for-4.19/soc' of https://github.com/Broadcom/stblinux into next/soc
This pull request contains Broadcom ARM-based SoCs platform changes for
4.19, please pull the following:
- Clement re-orders the UART debug entries to be in ascending order and
he also adds the iProc UART3 debug address since that is a common
location for iProc based designs.
* tag 'arm-soc/for-4.19/soc' of https://github.com/Broadcom/stblinux:
ARM: debug: fix BCM2836 order entry
ARM: debug: Add iProc UART3 debug addresses
Signed-off-by: Olof Johansson <olof@lixom.net>
for 4.19, please pull the following:
- Clement adds ethernet aliases to the Cygnus DTS include file such that
a DT aware bootloader such as u-boot can properly insert MAC addresses
- Mohamed adds a Device Tree node for the HWRNG found on Cygnus SoCs
- Vivek migrates all the BCM5301x (Northstar) Device Tree sources to use
the proper USB 3.0 PHY representation using its parent MDIO bus.
Vivek also completes the Linksys EA9500 Device Tree by adding support
for LEDs, internal and external switches.
- Rafal adds the ARM architected timer to the BCM53573 Device Tree
include file.
- Eric adds the Performance Monitoring Unit to the BCM2837 DTS include
file since it was absent before
- Boris adds the BCM283x transposer block to the Device Tree
- Stefan adds the Raspberry Pi Compute Module (CM1) Device Tree include
and sources.
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Merge tag 'arm-soc/for-4.19/devicetree' of https://github.com/Broadcom/stblinux into next/dt
This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 4.19, please pull the following:
- Clement adds ethernet aliases to the Cygnus DTS include file such that
a DT aware bootloader such as u-boot can properly insert MAC addresses
- Mohamed adds a Device Tree node for the HWRNG found on Cygnus SoCs
- Vivek migrates all the BCM5301x (Northstar) Device Tree sources to use
the proper USB 3.0 PHY representation using its parent MDIO bus.
Vivek also completes the Linksys EA9500 Device Tree by adding support
for LEDs, internal and external switches.
- Rafal adds the ARM architected timer to the BCM53573 Device Tree
include file.
- Eric adds the Performance Monitoring Unit to the BCM2837 DTS include
file since it was absent before
- Boris adds the BCM283x transposer block to the Device Tree
- Stefan adds the Raspberry Pi Compute Module (CM1) Device Tree include
and sources.
* tag 'arm-soc/for-4.19/devicetree' of https://github.com/Broadcom/stblinux:
ARM: dts: BCM5301X: Add support for Linksys EA9500
ARM: dts: BCM53573: Add architected timer
ARM: dts: BCM5301X: Make USB 3.0 PHY use MDIO PHY driver
ARM: dts: cygnus: enable iproc-hwrng
ARM: dts: cygnus: add ethernet0 alias
ARM: dts: bcm283x: Add Transposer block
ARM: dts: bcm283x: Add the PMU to the devicetree.
ARM: dts: add Raspberry Pi Compute Module and IO board
Signed-off-by: Olof Johansson <olof@lixom.net>
for 4.19, please pull the following:
- Stefan enables the Raspberry Pi voltage sensor driver (HWMON) in both
multi_v7_defconfig and bcm2835_defconfig
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Merge tag 'arm-soc/for-4.19/defconfig' of https://github.com/Broadcom/stblinux into next/defconfig
This pull request contains Broadcom ARM-based SoCs defconfig updates
for 4.19, please pull the following:
- Stefan enables the Raspberry Pi voltage sensor driver (HWMON) in both
multi_v7_defconfig and bcm2835_defconfig
* tag 'arm-soc/for-4.19/defconfig' of https://github.com/Broadcom/stblinux:
ARM: multi_v7_defconfig: Enable RPi voltage sensor
ARM: bcm2835_defconfig: Enable RPi voltage sensor
Signed-off-by: Olof Johansson <olof@lixom.net>
as conversion of rk3288 to OPPv2 to facilitate the addition of
missing cpu-cooling-device properties.
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Merge tag 'v4.19-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
SPDX conversion for existing Rockchip devicetree files as well
as conversion of rk3288 to OPPv2 to facilitate the addition of
missing cpu-cooling-device properties.
* tag 'v4.19-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: Add missing cooling device properties for CPUs on rk3288
ARM: dts: rockchip: convert rk3288 to operating-points-v2
ARM: dts: rockchip: Add missing cooling device properties for CPUs on rk322x
ARM: dts: rockchip: use SPDX-License-Identifier
Signed-off-by: Olof Johansson <olof@lixom.net>
Ensure that the stubbed out tcm_init() is marked static, so we don't
end up emitting the stub each time the header is included.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Pull ARM fixes from Russell King:
"A couple of small fixes this time around from Steven for an
interaction between ftrace and kernel read-only protection, and
Vladimir for nommu"
* 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm:
ARM: 8780/1: ftrace: Only set kernel memory back to read-only after boot
ARM: 8775/1: NOMMU: Use instr_sync instead of plain isb in common code
Improve the 64-bit store implementation from:
ldr r6, [fp, #-8]
str r8, [r6]
ldr r6, [fp, #-8]
mov r7, #4
add r7, r6, r7
str r9, [r7]
to:
ldr r6, [fp, #-8]
str r8, [r6]
str r9, [r6, #4]
We leave the store as two separate STR instructions rather than using
STRD as the store may not be aligned, and STR can handle misalignment.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Rather than writing each 32-bit half of the 64-bit immediate value
separately when the register is on the stack:
movw r6, #45056 ; 0xb000
movt r6, #60979 ; 0xee33
str r6, [fp, #-44] ; 0xffffffd4
mov r6, #0
str r6, [fp, #-40] ; 0xffffffd8
arrange to use the double-word store when available instead:
movw r6, #45056 ; 0xb000
movt r6, #60979 ; 0xee33
mov r7, #0
strd r6, [fp, #-44] ; 0xffffffd4
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Enable the STM32 Real Time Clock (RTC) driver, implemented on STM32MP1 SoC.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
MAC is connected to a PHY in RGMII mode.
Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Add Ethernet support (Synopsys MAC IP 4.20a) on stm32mp1 SOC.
Enable feature supported by the stmmac driver, such as TSO.
Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
System configuration controller is mainly used to manage
the compensation cell and other IOs and system related
settings.
Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
This patch adds SPI1 support on stm32mp157c-ev1 board.
SPI1 is available on GPIO expansion connector but kept disabled
so these pins can be used as GPIOs by default.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
stm32mp157c has an ADC block with two physical ADCs.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
This patch enables USB OTG HS on stm32mp157c-ev1 in Peripheral mode.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
This patch adds support for USB OTG HS on STM32MP157C SoC.
USB OTG HS controller is based on DWC2 controller.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
This patch enables USB Host (USBH) EHCI controller on stm32mp157c-ev1.
As a hub is used between USBH and USB connectors, no need to enable
USBH OHCI controller: all low- and full-speed traffic is managed by the
hub.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Use double-word load and stores where support for this instruction is
supported by the CPU architecture.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Always use an odd/even register pair for our 64-bit registers, so that
we're able to use the double-word load/store instructions in the future.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Rearranging the order of the initial tail call code a little allows is
to avoid reloading the 'array' pointer.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Avoid reloading 'index' after we have validated it - it remains in
tmp2[1] up to the point that we begin the code to index the pointer
array, so with a little rearrangement of the registers, we can use
the already loaded value.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Rather than pre-shifting the rm register for the ldr in the tail call,
shift it in the load instruction. This eliminates one unnecessary
instruction.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Rather than moving constants to a register and then using them in a
subsequent instruction, use them directly in the desired instruction
cutting out the "middle" register. This removes two instructions from
the tail call code path.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Provide a version of the imm8m() function that the compiler can optimise
when used with a constant expression.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Access the eBPF scratch space using the frame pointer rather than our
stack pointer, as the offsets from the ARM frame pointer are constant
across all eBPF programs.
Since we no longer reference the scratch space registers from the stack
pointer, this simplifies emit_push_r64() as it no longer needs to know
how many words are pushed onto the stack.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Provide a couple of 64-bit register accessors, and use them where
appropriate
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Many of the code paths need to have knowledge about whether a register
is stacked or in a CPU register. Move this decision making to a pair
of helper functions instead of having it scattered throughout the
code.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
The decision about whether a BPF register is on the stack or in a CPU
register is detected at the top BPF insn processing level, and then
percolated throughout the remainder of the code. Since we now use
negative register values to represent stacked registers, we can detect
where a BPF register is stored without restoring to carrying this
additional metadata through all code paths.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Use negative numbers for eBPF registers that live on the stack.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Provide a set of load/store opcode generators that work with negative
immediates as well as positive ones.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Enumerate the contents of the JIT scratch stack layout used for storing
some of the JITs 64-bit registers, tail call counter and AX register.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
The AM3517 has a different OTG controller location than the OMAP3,
which is included from omap3.dtsi. This results in a hwmod error.
Since the AM3517 has a different OTG controller address, this patch
disabes one that is isn't available.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Call secure services to enable ACTLR[0] (Enable invalidates of BTB with
ICIALLU) when branch hardening is enabled for kernel.
On GP devices OMAP5/DRA7, there is no possibility to update secure
side since "secure world" is ROM and there are no override mechanisms
possible. On HS devices, appropriate PPA should do the workarounds as
well.
However, the configuration is only done for secondary core, since it is
expected that firmware/bootloader will have enabled the required
configuration for the primary boot core (note: bootloaders typically
will NOT enable secondary processors, since it has no need to do so).
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The Libretech ALL-H3-CC has a high density connector for attaching
an eMMC module. The module form factor and connection is specific
to Libretech, and has provisions for split vmmc/vqmmc (core and I/O)
voltage supplies, but this board does not wire the vqmmc side. The
H2+/H3/H5 SoCs do not support alternate I/O voltages for eMMC either.
Only 3.3V is supported. A specific module that ties vqmmc to vmmc,
with both at 3.3V, must be used.
Given that a) eMMC is not designed to be hotplugged, b) power is
always provided on the pins, and c) MMC controllers can deal with
missing cards, we can enable this by default. If a module is attached
it will be picked up by the system.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Banana Pi M2 Zero board has a SY8113B regulator, which is controlled via
GPIO and capable of outputing 1.1V when the PL1 GPIO is set to output 0
or 1.1V when the PL6 GPIO is set to input or output 1, and the output is
the power supply of the ARM cores in H3 SoC.
Add the device tree node of this regulator and set the cpu's cpu-supply
property to it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
On i.MX51/i.MX53 it is necessary to set the DBGEN bit in
ARM_GPC register in order to turn on the debug clocks.
The DBGEN bit of ARM_GPC register has the following description
in the i.MX53 Reference Manual:
"This allows the user to manually activate clocks within the debug
system. This register bit directly controls the platform's dbgen_out
output signal which connects to the DAP_SYS to enable all debug clocks.
Once enabled, the clocks cannot be disabled except by asserting the
disable_trace input of the DAP_SYS."
Based on a previous patch from Sebastian Reichel.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add a label for the PMU node so that the board dts may be able to
pass the 'secure-reg-access' property like this:
&pmu {
secure-reg-access;
};
This also makes it consistent with the PMU node in imx6qdl.dtsi
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Tested-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
As per the i.MX53 Reference Manual add an entry for the
'tigerp' region in the device tree.
This is needed for accessing the ARM_GPC register to set the
DBGEN bit, so that the debug clocks can be turned on.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
As per the i.MX51 Reference Manual add an entry for the
'tigerp' region in the device tree.
This is needed for accessing the ARM_GPC register to set the
DBGEN bit, so that the debug clocks can be turned on.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Configure the M4IF registers as per the vendor bootloader
to avoid visual artifacts during video playback.
This way we don't need to rely on the bootloader configuration for
optimal IPU/VPU bus priorities.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Sergey Lapin <sergey.lapin@cogentembedded.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
As per the i.MX51 Reference Manual the M4IF register region
starts at 0x83fd8000 and has a 4kB address range.
Add support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Sergey Lapin <sergey.lapin@cogentembedded.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.MX6UL has GPIO clock gates in CCM CCGR, add
clock property for GPIO driver to make sure all
GPIO banks work as expected.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Dynamic ftrace requires modifying the code segments that are usually
set to read-only. To do this, a per arch function is called both before
and after the ftrace modifications are performed. The "before" function
will set kernel code text to read-write to allow for ftrace to make the
modifications, and the "after" function will set the kernel code text
back to "read-only" to keep the kernel code text protected.
The issue happens when dynamic ftrace is tested at boot up. The test is
done before the kernel code text has been set to read-only. But the
"before" and "after" calls are still performed. The "after" call will
change the kernel code text to read-only prematurely, and other boot
code that expects this code to be read-write will fail.
The solution is to add a variable that is set when the kernel code text
is expected to be converted to read-only, and make the ftrace "before"
and "after" calls do nothing if that variable is not yet set. This is
similar to the x86 solution from commit 1623963097 ("ftrace, x86:
make kernel text writable only for conversions").
Link: http://lkml.kernel.org/r/20180620212906.24b7b66e@vmware.local.home
Reported-by: Stefan Agner <stefan@agner.ch>
Tested-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
With old bindings imx_gpc_onecell_data always sets num_domains to 2 so
the DISPMIX domain can't actually be referenced. The pd is still defined
and pm core shuts it down as "unused" so display can't work.
Fix this by converting to new gpc bindings by adding pgc nodes and
referencing the newly-defined &pu_disp domain from &lcdif.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
i.MX6SX has a 16KB always-on ocram bank called
ocram_s, enable it as another mmio sram.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The imx6sl platform has two different cpuidle implementations,
and fails to link if we only want one of the two:
arch/arm/mach-imx/mach-imx6sl.o: In function `imx6sl_init_late':
mach-imx6sl.c:(.init.text+0x12): undefined reference to `imx6sx_cpuidle_init'
This makes the call into reference conditional on the configuration.
Fixes: e7fa1fb39b ("ARM: imx: add cpu idle support for i.MX6SLL")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The i.MX6SLL cpuidle support reuses the i.MX6SX implementation, but
the Makefile accidentally enables the i.MX6SL one as well, which
then fails with a link error unless the kernel also enables the
the i.MX6SL clock driver:
arch/arm/mach-imx/cpuidle-imx6sl.o: In function `imx6sl_enter_wait':
cpuidle-imx6sl.c:(.text+0x24): undefined reference to `imx6sl_set_wait_clk'
This changes the two lines that were just modified again, hopefully
getting every case right this time.
Fixes: e7fa1fb39b ("ARM: imx: add cpu idle support for i.MX6SLL")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
100/200MHz states for USDHC3 are not required since the SoC
does not support modes faster than DDR52 for the on board eMMC.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
VDDD is connected to VGEN4 of the PF0100. This rail should only
run at 1.8V since there are multiple consumer and they all
expect the rail to be at 1.8V.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Remove the 2.5V regulator, it does not exist. There is 3.3V and
3.3V_AUDIO provided to the module through the edge connector,
model those as fixed regulators like we use to do in other
Colibri device trees. The SGTL5000 uses 3.3V_AUDIO as VDDA. Note
that the driver derives the analog ground voltage (VAG) from this
supply. The new value should allow higher output swings before
clipping occurs. Refer to the SGTL5000 datasheet for details.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The fixed 1.8V regulator is not used, and there is in fact no
fixed 1.8V regulator on the module. Remove it.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Use the disable-wp to indicate that Apalis and Colibri iMX6 do not
make use of the native write-protect signal available on the i.MX 6
SoCs. This prevents warnings:
mmc0: host does not support reading read-only switch, assuming write-enable
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Use no-1-8-v device tree property to indicate that the board does
not support 1.8V signaling. The property voltage-ranges seems not
appropriate in our case since we do not have level shifters in
place.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add the 3.3V main supply on the carrier board. Currently as a fixed
supply since not all consumer are modeled yet. This gets also rid of
some missing supply warnings.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx_set_aips is assuming that the address returned from of_iomap is
valid which it probably is in the normal case - as the call site
is void error propagation is not possible but never the less at least
a WARN_ON() seems warranted here.
Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org>
Fixes: commit e57e4ab5fc ("ARM: i.MX: allow disabling supervisor protect via DT")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
As documented in GCC naked functions should only use basic ASM
syntax. The extended ASM or mixture of basic ASM and "C" code is
not guaranteed. Currently this works because it was hard coded
to follow and check GCC behavior for arguments and register
placement.
Furthermore with clang using parameters in Extended asm in a
naked function is not supported:
arch/arm/firmware/trusted_foundations.c:47:10: error: parameter
references not allowed in naked functions
: "r" (type), "r" (arg1), "r" (arg2)
^
Use a regular function to be more portable. This aligns also with
the other SMC call implementations e.g. in qcom_scm-32.c and
bcm_kona_smc.c.
Cc: Dmitry Osipenko <digetx@gmail.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Since commit 654f2b937b ("crypto: caam - allow retrieving 'era' from
register") the CAAM driver is capable of obtaining the era version by
reading the appropriate CAAM registers, so let the CAAM driver discover
the era version in run-time instead of hardcoding such information in the
device tree.
According to Documentation/devicetree/bindings/crypto/fsl-sec4.txt the
'fsl,sec-era' is an optional property and this can be safely removed
now.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
