* henninger: Remove as it is now replaced by silk
* koelsch: Move SPI partitions to subnode
* porter: Add CAN0 and HS-USB support
* r8a7793/gose: Add QSPI, PFC support
* r8a7793: Add GPIO, DMAC, theral, IPMMU support
* r8a7794/alt: Add DU support
* r8a7794: Disable all IPMMU nodes by default
* r8a779[0134]: Use Use SoC specific binding for rcar-dmac
* r8a779[01], r8a73a4, r8a7740, sh73a0: replace gpio-key, wakeup with
wakeup-source property
* r8a779[14]: Correct "gpio-ranges" properties
* r8a779[14]: Remove bogus imp_clk node
* silk: Add SDHI1 support
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWTnFmAAoJENfPZGlqN0++JaYP/RPq8zvAt/x7QXNfo/9OPbpk
lYjJpeBnTunK6UZBjG74ZOEL0SJh4F3Ti1N+7jmjN73Kp5OE2p8/z5bRsiElLyez
LwHDx4FwksOGF/90zRAFX+WGWEInKlwVKopp9DIgHc1MS98/7VsxM5v9g3ZsCp0U
GLpvaMnNoC6es6qi2O8Qc5lwI1g2XWRptzozOtjo04bjzUshEomOUXQ78Xj17T95
+KxJmIyIuUvHX4kNen7GLpUheR9AgqMn7NTjFzXDo3q2DeTLMrMPQZlXIWCn17cD
AaJGK3geaRXy9t40Cqo38u5lKUr65SJUsjikmNNWGf0xpLWR+m8uHYnKUuljtiUS
H5tDuRVv9euzSTp0xs9XgcOuUg966iaO8IoX95GGukQ9+dW8UicGCg+5lKCJh+K0
d7ev+Z9UuAmNcrwk30VSgY0rq1iWAJSdngZisJKCjo38Een6RnZm7Kgg6ZEib6qX
z4d+ZPjvhOWRVC+k9XlnrqRNBqiK0H0wzBunY+2/cH056MfIqVy5gdGCK6CtHrdK
qx9G38kwyQB7FHGvvVS4X/KikQJPetyCl4tWFmMjBTmGlaoQSsDgRvBbJExzN/Hq
ERG2syGkB687DU+fhKCQryvDY1igKbKjUEAM1Ar/4ULLPNCZ0kB0wWmWlV9xobM7
EDocF4nkl69jyIGoUweD
=snxp
-----END PGP SIGNATURE-----
Merge tag 'renesas-dt-for-v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Merge "Renesas ARM Based SoC DT Updates for v4.5" from Simon Horman:
* henninger: Remove as it is now replaced by silk
* koelsch: Move SPI partitions to subnode
* porter: Add CAN0 and HS-USB support
* r8a7793/gose: Add QSPI, PFC support
* r8a7793: Add GPIO, DMAC, theral, IPMMU support
* r8a7794/alt: Add DU support
* r8a7794: Disable all IPMMU nodes by default
* r8a779[0134]: Use Use SoC specific binding for rcar-dmac
* r8a779[01], r8a73a4, r8a7740, sh73a0: replace gpio-key, wakeup with
wakeup-source property
* r8a779[14]: Correct "gpio-ranges" properties
* r8a779[14]: Remove bogus imp_clk node
* silk: Add SDHI1 support
* tag 'renesas-dt-for-v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (29 commits)
ARM: shmobile: alt: add VIN0, ADV7180 DT support
ARM: shmobile: alt: add I2C1 DT support
ARM: shmobile: alt: Add pfc pins to DT
ARM: shmobile: r8a7794: Use SoC specific binding for rcar-dmac nodes
ARM: shmobile: r8a7793: Use SoC specific binding for rcar-dmac nodes
ARM: shmobile: r8a7791: Use SoC specific binding for rcar-dmac nodes
ARM: shmobile: r8a7790: Use SoC specific binding for rcar-dmac nodes
ARM: shmobile: r8a7793: Add GPIO nodes to device tree
ARM: shmobile: r8a7794: alt: Enable VGA port
ARM: shmobile: r8a7794: Add DU node to device tree
ARM: shmobile: r8a7794: Add DU0 clock
ARM: shmobile: gose: Add QSPI device to DT
ARM: shmobile: r8a7793: Add QSPI device to DT
ARM: shmobile: r8a7793: Add DMAC devices to DT
ARM: shmobile: koelsch: Move SPI FLASH partitions to subnode
ARM: shmobile: gose: Configure PFC in DT
ARM: shmobile: r8a7793: Add PFC to DT
ARM: shmobile: r8a7793: Add thermal device to DT
ARM: shmobile: henninger: remove board DT
ARM: shmobile: porter: add CAN0 DT support
...
Add the dt-bindings header for the rk3228, that gets shared between
the clock controller and the clock references in the dts.
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the EtherAVB clock to the R8A7791 device tree.
Based on the commit 63d2d750c9 ("ARM: shmobile: r8a7790: add EtherAVB
clocks").
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a virtual arm clk to abstract the actual steps
when changing the ARM core frequency.So we can using
the 'cpufreq-dt' driver on i.MX7D/Solo.
Signed-off-by: Bai Ping <b51503@freescale.com>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The 4 MSIOF clocks are MSTP clocks, and children of the SUB clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a driver for the multimedia clock controller found on MSM8996
based devices. This should allow most multimedia device drivers
to probe and control their clocks.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add support for the global clock controller found on MSM8996
based devices. This should allow most non-multimedia device
drivers to probe and control their clocks.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Adds a new id for the sclk supplying the mipidsi on rk3288 socs.
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the dt-bindings header for the rk3036, that gets shared between
the clock controller and the clock references in the dts.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add an id for crypto clk to the binding header, so that it can be called
in other part.
Signed-off-by: Zain Wang <zain.wang@rock-chips.com>
Acked-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add a gate clock for controlling all clocks of Security Sub System
(SSS).
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
The DU0 clock is an MSTP clock, child of the CPG ZX clock.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a header file that defines the clock numbers for Tegra210. It is
meant to be included by device trees so that they can refer to the
clocks by symbolic name instead of numeric value.
Also add the device tree binding documentation which is largely the
same as for earlier generations of Tegra.
Extracted from a larger patch by Rhyland Klein <rklein@nvidia.com>.
Signed-off-by: Thierry Reding <treding@nvidia.com>
As usual, this is the massive branch we have for each release. Lots of
various updates and additions of hardware descriptions on existing hardware,
as well as the usual additions of new boards and SoCs.
This is also the first release where we've started mixing 64- and 32-bit
DT updates in one branch.
(Specific details on what's actually here and new is pretty easy to tell
from the diffstat, so there's little point in duplicating listing it here.)
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWQT2WAAoJEIwa5zzehBx37tgQAIBe5eDJFXFihTlyOQ2plL3q
vVH4OCzXIHELfM1J8CGZNah1wCQqNOts8RAmDCzxr+zSYuLOwJOEDZ6NKmErMxl0
NTj3+BsqKO3NRym970ofPqU9JRLQmpZ8K7dzk8Nwj2+r1WZHFu/j6Jv44n/Ns0lw
7+wxnG322lTm7SnvALCMD5lD4Y7VpThooWy5SdFtRoAetn+cLbVCJIeeQvO6Vxkp
NooeJR0t2e8cpbAND5Jwu6eeWRcIbrvgjYDe0omhrIY05i9yNvIsC2HuQFGjF43z
p2CnQvcKnhOXTZw3yse1Fx5igA7jqwVjjC/lVeDyxhusAtLpmuB6qbSaj7DpqkSQ
nJxX1d49WKm68K+aknmee1kYRrvc4DE/kORI4IxXnsVNMu16ifTVLnxKgUhwzukb
eZdTP6rsqgNozaYvh0k1vfSFd+CNSkBg+E9nrI3tU95yo3LOIhobVBCvBcWlmUvQ
JdavRztqosChjIx3a9i1eCNKJtCg9p4m+gWjUqVVWsxBHe/3HojzjZnsBSynIQMA
uGIVm0TKhNl1Svxl3oJo9257UCUK7+5PqJHK9IHrcWDULYx05JGSjuZcyvNS6Fo+
u1DMf0ud4gXJYhecFBa7b3zRjk5YxptgCCTjeEEOTUJbbhZqDjGFZlNuFi6dmqD3
ILJ2QMe/DGiPIlUmCfsx
=qY1q
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Olof Johansson:
"As usual, this is the massive branch we have for each release. Lots
of various updates and additions of hardware descriptions on existing
hardware, as well as the usual additions of new boards and SoCs.
This is also the first release where we've started mixing 64- and
32-bit DT updates in one branch.
(Specific details on what's actually here and new is pretty easy to
tell from the diffstat, so there's little point in duplicating listing
it here)"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (499 commits)
ARM: dts: uniphier: add system-bus-controller nodes
ARM64: juno: disable NOR flash node by default
ARM: dts: uniphier: add outer cache controller nodes
arm64: defconfig: Enable PCI generic host bridge by default
arm64: Juno: Add support for the PCIe host bridge on Juno R1
Documentation: of: Document the bindings used by Juno R1 PCIe host bridge
ARM: dts: uniphier: add I2C aliases for ProXstream2 boards
dts/Makefile: Add build support for LS2080a QDS & RDB board DTS
dts/ls2080a: Add DTS support for LS2080a QDS & RDB boards
dts/ls2080a: Update Simulator DTS to add support of various peripherals
dts/ls2080a: Remove text about writing to Free Software Foundation
dts/ls2080a: Update DTSI to add support of various peripherals
doc: DTS: Update DWC3 binding to provide reference to generic bindings
doc/bindings: Update GPIO devicetree binding documentation for LS2080A
Documentation/dts: Move FSL board-specific bindings out of /powerpc
Documentation: DT: Add entry for FSL LS2080A QDS and RDB boards
arm64: Rename FSL LS2085A SoC support code to LS2080A
arm64: Use generic Layerscape SoC family naming
ARM: dts: uniphier: add ProXstream2 Vodka board support
ARM: dts: uniphier: add ProXstream2 Gentil board support
...
As we've enabled multiplatform kernels on ARM, and greatly done away with
the contents under arch/arm/mach-*, there's still need for SoC-related
drivers to go somewhere.
Many of them go in through other driver trees, but we still have
drivers/soc to hold some of the "doesn't fit anywhere" lowlevel code
that might be shared between ARM and ARM64 (or just in general makes
sense to not have under the architecture directory).
This branch contains mostly such code:
- Drivers for qualcomm SoCs for SMEM, SMD and SMD-RPM, used to communicate
with power management blocks on these SoCs for use by clock, regulator and
bus frequency drivers.
- Allwinner Reduced Serial Bus driver, again used to communicate with PMICs.
- Drivers for ARM's SCPI (System Control Processor). Not to be confused with
PSCI (Power State Coordination Interface). SCPI is used to communicate with
the assistant embedded cores doing power management, and we have yet to see
how many of them will implement this for their hardware vs abstracting in
other ways (or not at all like in the past).
- To make confusion between SCPI and PSCI more likely, this release also
includes an update of PSCI to interface version 1.0.
- Rockchip support for power domains.
- A driver to talk to the firmware on Raspberry Pi.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWQC+cAAoJEIwa5zzehBx3jEUP/0GpxfDVanEUkudVLLe7J0RH
CNlRan107Cw6hXRUJo7elEsuCALjccXjc1CAH4+RnNpOAeBKW97n+WU7trTv+wUZ
sQX4SkBPKFBlgwGF2qhsi5q74gms/BrgtCa4kNb9joOYso039tlfIOPzK80DMkOm
TkyIJdUCgFJMjCQLhX6kGT0PDcrbIjb6aA2cF3FAVeaJA7uz8lNe/eHJr3oHxIEY
CvC651yJ2mIHQUU4BJx/AJo+wXg3dRUXNCAtBjwLRPEAzduYZXYm1ZTVIby/1q9r
dR2KDFEuibODXmXrDBzKNJwCu/TLJEwo/1oPaEIVfY91XLKfiWUhgVqa1o1I+d9U
XoGPibCW461qFahjQW87MfInALpCOA7/RbTNjFp+MVyipCYvkaYq7KFiYEldgFDx
z4Qx/J4hYc2TlDWrpNiUCZMfmhwi7y+Ib+tnenYTO1eyMuw0e9mfnVdjk5iU3Pvk
Ye4qPqpYclJruyHbYi164878+1lLaW2NCUgC3rkBO/GWPAzp7d9iLWoZ3PuyD5i5
PEjs668UcRdZYbI4rdrhGHL8Eq9Gnuc4Rthu7HxPOK+DG0XgP8r97PhM8aYGYVDO
+yikBtjWRsA9fPj3rMKA3UsQ61DAeR9LmZ0XPGjWFMCjCG0JlUoIMaA+Uu0i8fr8
95qxBVxbO7rhL39r1rhV
=dm+I
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Olof Johansson:
"As we've enabled multiplatform kernels on ARM, and greatly done away
with the contents under arch/arm/mach-*, there's still need for
SoC-related drivers to go somewhere.
Many of them go in through other driver trees, but we still have
drivers/soc to hold some of the "doesn't fit anywhere" lowlevel code
that might be shared between ARM and ARM64 (or just in general makes
sense to not have under the architecture directory).
This branch contains mostly such code:
- Drivers for qualcomm SoCs for SMEM, SMD and SMD-RPM, used to
communicate with power management blocks on these SoCs for use by
clock, regulator and bus frequency drivers.
- Allwinner Reduced Serial Bus driver, again used to communicate with
PMICs.
- Drivers for ARM's SCPI (System Control Processor). Not to be
confused with PSCI (Power State Coordination Interface). SCPI is
used to communicate with the assistant embedded cores doing power
management, and we have yet to see how many of them will implement
this for their hardware vs abstracting in other ways (or not at all
like in the past).
- To make confusion between SCPI and PSCI more likely, this release
also includes an update of PSCI to interface version 1.0.
- Rockchip support for power domains.
- A driver to talk to the firmware on Raspberry Pi"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (57 commits)
soc: qcom: smd-rpm: Correct size of outgoing message
bus: sunxi-rsb: Add driver for Allwinner Reduced Serial Bus
bus: sunxi-rsb: Add Allwinner Reduced Serial Bus (RSB) controller bindings
ARM: bcm2835: add mutual inclusion protection
drivers: psci: make PSCI 1.0 functions initialization version dependent
dt-bindings: Correct paths in Rockchip power domains binding document
soc: rockchip: power-domain: don't try to print the clock name in error case
soc: qcom/smem: add HWSPINLOCK dependency
clk: berlin: add cpuclk
ARM: berlin: dts: add CLKID_CPU for BG2Q
ARM: bcm2835: Add the Raspberry Pi firmware driver
soc: qcom: smem: Move RPM message ram out of smem DT node
soc: qcom: smd-rpm: Correct the active vs sleep state flagging
soc: qcom: smd: delete unneeded of_node_put
firmware: qcom-scm: build for correct architecture level
soc: qcom: smd: Correct SMEM items for upper channels
qcom-scm: add missing prototype for qcom_scm_is_available()
qcom-scm: fix endianess issue in __qcom_scm_is_call_available
soc: qcom: smd: Reject send of too big packets
soc: qcom: smd: Handle big endian CPUs
...
- Support for the Audio PLL and child clocks
- Support for the A33 AHB gates
- New clk-multiplier generic driver
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWJ+3uAAoJEBx+YmzsjxAgx8UP/2QOntzRCUQYZGaI/aG2Pcag
lWeoWRkHpEdjM288OxOgoqody6UU/5gecI2UgDLtziaXV5DfIFhP0Klq1gIYc7h0
WDts2IlGht+fIObL87mD0Pm9StFNAtxFe5tKoHpU5oS6NP+lowSWAQlZSgUWdQky
VEvXDcOtaEQ3UQgcuMsaqfzgRPJC9zz28MDF28EtPhnCeseb/LKdmvaGzxHHehSl
016mQ4DvNC92PeLXUdy3LLOkcHTfYnH1OUBPrv7u8bFU09zPKSimymDyL87D7FFM
vPGKtlD/cQb21z2OVK9GKNmd9dQ+8tnBn9Gbdem95LFHlhP/m+SJbW2P64dNVq0A
QK5Ria2H6ccRMpfjNQ4zCHjIJQ6+z9xRzIlHXeAT7PcBf9XNwn1/N7qSBJTRy+y/
uq9Wvgfuletk9lIiFstbJWT6Axu+w/QVWJwJSkOa63elkFSyz+9Dk88MDYd156or
R79fc9EMQFcCg7k5IeiePLV8G1XVHc/3+ZoRON2ZJYk0L3z5uv/klizkCwtWN5cN
55nzfQ8Mn69yG9vrR7DSbVY4eyXkr345Tqv0OFaDZlrpb9/oHjK6MNDWzmXY2Y+N
ZcdNXwWu8DOqEf2iPWXETp0R0wV3kuEaKOvkS4KpvK2UjdQUeEvGUbpxm7Omo583
5RN+z/gjJSZQx9AoGwBJ
=WtVW
-----END PGP SIGNATURE-----
Merge tag 'sunxi-clocks-for-4.4' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt
Bringing in the sunxi clock branch since it introduces header file contents
that is needed by the DT branch. This is a stable tag shared with the clk tree.
Allwinner clock additions for 4.4
- Support for the Audio PLL and child clocks
- Support for the A33 AHB gates
- New clk-multiplier generic driver
* tag 'sunxi-clocks-for-4.4' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
clk: sunxi: mod1 clock support
clk: sunxi: codec clock support
clk: sunxi: pll2: Add A13 support
clk: sunxi: Add a driver for the PLL2
clk: Add a basic multiplier clock
clk: sunxi: Add A33 gates support
Signed-off-by: Olof Johansson <olof@lixom.net>
This pull request contains the DT changes for BCM2835 in 4.4. It
pulls in clk/clk-bcm2835 (which Stephen Boyd has said would be stable)
because the DT changes to enable the clock driver need the driver
itself to be present. These changes include the following:
- Eric Anholt, moves the bcm2835 clock driver under bcm/ where it belongs with
other Broadcom clock providers drivers, defines the binding for new clock
driver, adds support for programming the BCM2835 audio domain, adds the DDC I2C
controller to Device Tree, and finally migrates the Device Tree to use the new
clock driver binding
- Lubomir Rintel adds support for the Raspberry Pi Model A+ and B revision 2, and
remove the I2S controller which is non-existent on Raspberry Pi Model B
- Stefan Wahren adds an uart0 label for referencing the UART adapter
* tag 'arm/soc/for-4.4/rpi-dt-v2' of https://github.com/Broadcom/stblinux:
ARM: bcm2835: Add the DDC I2C controller to the device tree.
ARM: bcm2835: Switch to using the new clock driver support.
ARM: bcm2835: dt: Add Raspberry Pi Model A+
ARM: bcm2835: dt: Add Raspberry Pi Model B rev2
ARM: bcm2835: dt: Raspberry Pi Model B had no I2S
ARM: bcm2835: add label for uart0
clk: bcm2835: Add support for programming the audio domain clocks
clk: bcm2835: Add binding docs for the new platform clock driver.
clk: bcm2835: Move under bcm/ with other Broadcom SoC clk drivers.
Signed-off-by: Olof Johansson <olof@lixom.net>
- use exynos5420-dw-mshc instead of exynos5250 for exynos3250
- add DISP1 clocks and the DISP1 power domain of two closk
on exynos5250 (clock commit got Stephen's ack)
- add vbus regulators on exynos3250, exynos4210 and exynos4412 boards
- fix typo in regulator enable GPIO property on s5pv20-aquila and goni
- document: correct the example of exynos power domain clocks
- document: consolidate exynos SoC dt-bindings and non-Samsung
boards related compatibles (FriendlyARM, Google, Hardkernel
and Insignal)
- update MAINTAINER entries accordingly (documentation)
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJWKp8kAAoJEA0Cl+kVi2xq5fUP/Rf+zO2xnnM+nW31k/6GCQQu
4BgjBfiK6/coAfQ+mq1PNs3aOFDUmO1g3vwoly64vJbhylCd6jFEzPlbgb109ZnI
A7JrqoiZ0LE+i/RXjfgxJm/0v1gn7TOOBKkwWlIEJpgV7i8wWjdCnMxlNw+amSGF
H0pJ14TCN7OfsPZtX1S7dgz/dLSeQzCzMn8cJk4ccPcsN+1LqI4whFQ31ykOYCaT
5b3/EvORjqkn0gdEiQ/i2WtaM1yKgfNUYXaJP69j605ipzKaUCMt9WnBY9EB6RaJ
im36eKNQXW73dYGEuuf1I5L58Hb+poAmlz4TtI4re/ykQ1mrvOj1xYwgfD9Sjw+z
ZS4Io5WMZgdJrmMXFPxnd7BQHu4IbnEfU+408cgOVP/fPrAHxYtO8tVr7/n2lgJ3
3Hio2MBzAWAXMz45IfhCz2n/ITKBCkfjHFOkno7Rmmm/83cORM6ZleldMqtrj5sQ
oqGDcBwI0ijKptZIfaLFQfndMmzUd4t5i+UQTjyIDE1nBmvPyqHgPyetHQttQQM+
bWTCJU+SlKze7CIwogmrrFEfw2RhNU+FS/T9D7t5JCWLb4B5CgLnHt7NWth2cQUQ
NuiTIgoU+znke+t2A1PxE85CmBr5yuezqxq8bJv8qnGHrF/ougPaNCOdXPef0ci4
bfK3nV/axFga/7ag900e
=UPmG
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt
Samsung 2nd DT updates for v4.4
- use exynos5420-dw-mshc instead of exynos5250 for exynos3250
- add DISP1 clocks and the DISP1 power domain of two closk
on exynos5250 (clock commit got Stephen's ack)
- add vbus regulators on exynos3250, exynos4210 and exynos4412 boards
- fix typo in regulator enable GPIO property on s5pv20-aquila and goni
- document: correct the example of exynos power domain clocks
- document: consolidate exynos SoC dt-bindings and non-Samsung
boards related compatibles (FriendlyARM, Google, Hardkernel
and Insignal)
- update MAINTAINER entries accordingly (documentation)
* tag 'samsung-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
MAINTAINERS: Add documentation and dt-bindings for exynos stuff
dt-bindings: EXYNOS: Document compatibles from other vendors
dt-bindings: Consolidate Exynos SoC bindings
ARM: dts: Add clocks to DISP1 domain in exynos5250
dt-bindings: Correct the example for Exynos power domain clocks
ARM: dts: Fix typo in regulator enable GPIO property in s5pv210-goni
ARM: dts: Fix typo in regulator enable GPIO property in s5pv210-aquila
ARM: dts: Add vbus regulator to USB2 phy nodes on exynos3250, exynos4210 and exynos4412 boards
clk: samsung: exynos5250: Add DISP1 clocks
ARM: dts: use exynos5420-dw-mshc compatible for exynos3250
Signed-off-by: Olof Johansson <olof@lixom.net>
When the DISP1 power domain is powered off, there's two clocks that need
to be temporarily reparented to OSC, and back to their original parents
when the domain is powered on again.
We expose these two clocks in the DT bindings so that the DT node of the
power domain can reference them.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
- Add IOMUXC LPSR (Low Power State Retention) device for i.MX7D.
- Add a few low power mode related devices and touch controller for
i.MX6UL.
- Add a number of devices for i.MX7D SDB board support, USB, Dual FEC,
and eMMC5.0.
- i.MX6 Boundary Devices updates: relicense under GPLv2/X11, add Okaya
LCD, touch and wifi support, add new boards Nitrogen6_Lite and
Nitrogen6_Max.
- Enable touch screen and NAND Flash controller for a few Vybrid
devices.
- Some random and small updates on LS1021A and MXS support.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJWJQUPAAoJEFBXWFqHsHzOo+cH/irx+abVdFV97q6M0VwFsQ3/
Tf4/CsdiTjM5ZDrKZEtXzP8BZl+ZO4tQXLspP+wVceQ+PVUiVvdAHu0l68iuJRrA
+Bj9VrLIzMDf7FVpzbZHZD3kd1NALGh/5i0TerkuZMNl1KH57HyGjLnjKH43n7uz
mFPeZFAQMwSjEnRJj/6217Itqi+LurARJsnXQs6uhQ7feSsA88HU3EQ8QsiZqiAu
MULAJBYaE09shlokuXIKx67t8outdb8C0Uue64nt42y8NR0m5eVVG7NJoF+23T6C
CRX5zveYa7D2QXTkihvjdRpazhLiPnwV3RCVejLOZMk0G14hD9U39jkTp+9ws1w=
=kPBq
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
The i.MX device tree changes for 4.4:
- Add IOMUXC LPSR (Low Power State Retention) device for i.MX7D.
- Add a few low power mode related devices and touch controller for
i.MX6UL.
- Add a number of devices for i.MX7D SDB board support, USB, Dual FEC,
and eMMC5.0.
- i.MX6 Boundary Devices updates: relicense under GPLv2/X11, add Okaya
LCD, touch and wifi support, add new boards Nitrogen6_Lite and
Nitrogen6_Max.
- Enable touch screen and NAND Flash controller for a few Vybrid
devices.
- Some random and small updates on LS1021A and MXS support.
* tag 'imx-dt-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (53 commits)
ARM: dts: ls1021a: Add quirk for Erratum A009116
ARM: imx6sx-sdb: Fix typo in regulator enable GPIO property
ARM: dts: imx6: phyFLEX: fix typo in "pinctrl-names"
ARM: dts: imx6: change the core clock of spdif
ARM: dts: vf-colibri: enable NAND flash controller
ARM: dts: vf610twr: add NAND flash controller peripherial
ARM: dts: imx: add Boundary Devices Nitrogen6_Lite board
ARM: dts: imx: add Boundary Devices Nitrogen6_Max board
ARM: dts: imx6dl-nitrogen6x: change manufacturer to Boundary Devices
ARM: dts: imx6q-nitrogen6x: change manufacturer to Boundary Devices
of: Add Boundary Devices Inc. vendor prefix
ARM: dts: imx6qdl-sabrelite: relicense under GPLv2/X11
ARM: dts: imx6qdl-nitrogen6x: relicense under GPLv2/X11
ARM: dts: imx6qdl-nitrogen6x: add wifi wl1271 support
ARM: dts: imx6dql-nitrogen6x: add touchscreen support
ARM: dts: imx6qdl-sabrelite: add Okaya LCD panel
ARM: dts: imx6qdl-nitrogen6x: add Okaya LCD panel
ARM: dts: vf500-colibri: Add device tree node for touchscreen support
ARM: dts: i.MX35: fix cpu compatible value
ARM: dts: i.MX31: fix cpu compatible value
...
Signed-off-by: Olof Johansson <olof@lixom.net>
* clk-iproc:
clk: iproc: define Broadcom NS2 iProc clock binding
clk: iproc: define Broadcom NSP iProc clock binding
clk: ns2: add clock support for Broadcom Northstar 2 SoC
clk: iproc: Separate status and control variables
clk: iproc: Split off dig_filter
clk: iproc: Add PLL base write function
clk: nsp: add clock support for Broadcom Northstar Plus SoC
clk: iproc: Add PWRCTRL support
clk: cygnus: Convert all macros to all caps
ARM: cygnus: fix link failures when CONFIG_COMMON_CLK_IPROC is disabled
The Broadcom Northstar 2 SoC is architected under the iProc
architecture. It has the following PLLs: GENPLL SCR, GENPLL SW,
LCPLL DDR, LCPLL Ports, all derived from an onboard crystal.
Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
The Broadcom Northstar Plus SoC is architected under the iProc
architecture. It has the following PLLs: ARMPLL, GENPLL, LCPLL0, all
derived from an onboard crystal.
Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
- Support for the Audio PLL and child clocks
- Support for the A33 AHB gates
- New clk-multiplier generic driver
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWJ+3uAAoJEBx+YmzsjxAgx8UP/2QOntzRCUQYZGaI/aG2Pcag
lWeoWRkHpEdjM288OxOgoqody6UU/5gecI2UgDLtziaXV5DfIFhP0Klq1gIYc7h0
WDts2IlGht+fIObL87mD0Pm9StFNAtxFe5tKoHpU5oS6NP+lowSWAQlZSgUWdQky
VEvXDcOtaEQ3UQgcuMsaqfzgRPJC9zz28MDF28EtPhnCeseb/LKdmvaGzxHHehSl
016mQ4DvNC92PeLXUdy3LLOkcHTfYnH1OUBPrv7u8bFU09zPKSimymDyL87D7FFM
vPGKtlD/cQb21z2OVK9GKNmd9dQ+8tnBn9Gbdem95LFHlhP/m+SJbW2P64dNVq0A
QK5Ria2H6ccRMpfjNQ4zCHjIJQ6+z9xRzIlHXeAT7PcBf9XNwn1/N7qSBJTRy+y/
uq9Wvgfuletk9lIiFstbJWT6Axu+w/QVWJwJSkOa63elkFSyz+9Dk88MDYd156or
R79fc9EMQFcCg7k5IeiePLV8G1XVHc/3+ZoRON2ZJYk0L3z5uv/klizkCwtWN5cN
55nzfQ8Mn69yG9vrR7DSbVY4eyXkr345Tqv0OFaDZlrpb9/oHjK6MNDWzmXY2Y+N
ZcdNXwWu8DOqEf2iPWXETp0R0wV3kuEaKOvkS4KpvK2UjdQUeEvGUbpxm7Omo583
5RN+z/gjJSZQx9AoGwBJ
=WtVW
-----END PGP SIGNATURE-----
Merge tag 'sunxi-clocks-for-4.4' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next
Pull Allwinner clock additions for 4.4 from Maxime Ripard:
- Support for the Audio PLL and child clocks
- Support for the A33 AHB gates
- New clk-multiplier generic driver
* tag 'sunxi-clocks-for-4.4' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
clk: sunxi: mod1 clock support
clk: sunxi: codec clock support
clk: sunxi: pll2: Add A13 support
clk: sunxi: Add a driver for the PLL2
clk: Add a basic multiplier clock
clk: sunxi: Add A33 gates support
The PLL2 on the A10 and later SoCs is the clock used for all the audio
related operations.
This clock has a somewhat complex output tree, with three outputs (2X, 4X
and 8X) with a fixed divider from the base clock, and an output (1X) with a
post divider.
However, we can simplify things since the 1X divider can be fixed, and we
end up by having a base clock not exposed to any device (or at least
directly, since the 4X output doesn't have any divider), and 4 fixed
divider clocks that will be exposed.
This clock seems to have been introduced, at least in this form, in the
revision B of the A10, but we don't have any information on the clock used
on the revision A.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Add all R-Car H3 Clock Pulse Generator Core Clock Outputs, as listed in
Table 8.2a ("List of Clocks [R-Car H3]") of the R-Car Gen3 datasheet
(rev. 0.5E).
Note that internal CPG clocks (S0, S1, S2, S3, SDSRC, SSPSRC, and
RPCSRC) are not included, as they're used as internal clock sources
only.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Michael Turquette <mturquette@baylibre.com>
Reviewed-by: Magnus Damm <damm+renesas@opensource.se>
On Renesas ARM SoCs (SH/R-Mobile, R-Car, RZ), the CPG (Clock Pulse
Generator) and MSSR (Module Standby and Software Reset) blocks are
intimately connected, and share the same register block.
Hence it makes sense to describe these two blocks using a
single device node in DT, instead of using a hierarchical structure with
multiple nodes, using a mix of generic and SoC-specific bindings.
These new DT bindings are intended to replace the existing DT bindings
for CPG core clocks ("renesas,*-cpg-clocks", "renesas,cpg-div6-clock")
and module clocks ("renesas,*-mstp-clocks"), at least for new SoCs.
This will make it easier to add module reset support later, which is
currently not implemented, and difficult to achieve using the existing
bindings due to the intertwined register layout.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Michael Turquette <mturquette@baylibre.com>
Reviewed-by: Magnus Damm <damm+renesas@opensource.se>
- A couple of fixes on i.MX31 and i.MX35 clock initialization functions
which makes mxc_timer_init() currently be called twice for DT boot.
- Increase i.MX6UL AXI bus clock rate to 264MHz which is the optimal
design target.
- Add a few missing clocks, ADC clock for i.MX7D, OCOTP clock for
Vybrid, and SPDIF_GCLK for i.MX6.
- A series from Lucas to fix early debug UART clock setup. This is
currently a one-off fix for i.MX platform, and can be extended to
become a generic solution later.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJWIRFyAAoJEFBXWFqHsHzOE7wH/25WaamOOOL3vGVCBeIs2+aB
nibCEKCPGu2/b1YN+BEQMlh+K7d59Ogd0xVtTkLEGhIBW+LF5zDpsd6jNl7Ts6PQ
5w3gG7K/NqPzIXlgo+z5Oa4UI1DlDemcA1xihR+hFWjLQb8DBmnusK52ctS5MLfP
6SoepDWHJvtuAfoL/3ytNTi/xCW12sEVkzRV7QbG9GV2UmUgF2AVWKBkH+c28vnP
dyt2Cyrr4+9ov6p0k0OJnHDv1AxkkNlHh0G33pZMZmnqcn/ZagmdH2GReGWZi6PM
XLMY/piEK7zzryJ51hL9AGZi7so1LWs27kBtYo9r7bN9/cG4kaENGw6Du1jEf4I=
=OBCO
-----END PGP SIGNATURE-----
Merge tag 'imx-clk-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into clk-next
Pull i.MX updates from Shawn Guo:
"The i.MX clock updates for 4.4:
- A couple of fixes on i.MX31 and i.MX35 clock initialization functions
which makes mxc_timer_init() currently be called twice for DT boot.
- Increase i.MX6UL AXI bus clock rate to 264MHz which is the optimal
design target.
- Add a few missing clocks, ADC clock for i.MX7D, OCOTP clock for
Vybrid, and SPDIF_GCLK for i.MX6.
- A series from Lucas to fix early debug UART clock setup. This is
currently a one-off fix for i.MX platform, and can be extended to
become a generic solution later."
* tag 'imx-clk-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
clk: imx6: Add SPDIF_GCLK clock in clock tree
clk: imx7d: add ADC root clock
clk: imx31: Do not call mxc_timer_init twice when booting with DT
clk: imx7d: retain early UART clocks during kernel init
clk: imx6: retain early UART clocks during kernel init
clk: imx5: retain early UART clocks during kernel init
clk: imx35: retain early UART clocks during kernel init
clk: imx31: retain early UART clocks during kernel init
clk: imx27: retain early UART clocks during kernel init
clk: imx25: retain early UART clocks during kernel init
clk: imx: add common logic to detect early UART usage
clk: imx35: Do not call mxc_timer_init twice when booting with DT
clk: clk-vf610: Add clock for Vybrid OCOTP controller
clk: imx: increase AXI clock rate to 264MHz for i.MX6UL
Marvell Berlin BG2Q SoC also has a clock for the CPU, add a
corresponding CLKID to the dt-binding include.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* clk-bcm2835:
clk: bcm2835: Add support for programming the audio domain clocks
clk: bcm2835: Add binding docs for the new platform clock driver.
clk: bcm2835: Move under bcm/ with other Broadcom SoC clk drivers.
Correct SPDIF clock setting issue in clock tree, the SPDIF_GCLK is also
one clock of SPDIF, which is missed before.
We found an issue that imx can't enter low power mode with spdif
if IMX6x_CLK_SPDIF is used as the core clock of spdif. Because
spdif driver will register IMX6x_CLK_SPDIF clock to regmap, regmap will do
clk_prepare in init function, then IMX6x_CLK_SPDIF clock is prepared in probe,
so its parent clock (PLL clock) is prepared, the prepare operation of
PLL clock is to enable the clock. But I.MX needs all PLL clock is disabled,
then it can enter low power mode.
So we can't use IMX6x_CLK_SPDIF as the core clock of spdif, the correct spdif
core clock is SPDIF_GCLK, which share same gate bit with IMX6x_CLK_SPDIF clock.
SPDIF_GCLK's parent clock is ipg clock.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Pull mediatek clock support and fixes from James Liao:
"This is a collection of new Mediatek clocks support and fixes.
These patches come from Joe and me, including clock support for
subsystems, GPT and some minor fixes."
* 'v4.3-rc3-clk' of https://github.com/jamesjjliao/linux:
clk: mediatek: Add USB clock support in MT8173 APMIXEDSYS
clk: mediatek: Add subsystem clocks of MT8173
dt-bindings: ARM: Mediatek: Document devicetree bindings for clock controllers
clk: mediatek: Fix rate and dependency of MT8173 clocks
clk: mediatek: Add fixed clocks support for Mediatek SoC.
clk: mediatek: Add __initdata and __init for data and functions
clk: mediatek: Remove unused code from MT8173.
clk: mediatek: Removed unused dpi_ck clock from MT8173
clk: mediatek: add 13mhz clock for MT8173
Previously we've only supported a few fixed clocks based on
assumptions about how the firmware sets up the clocks, but this
binding will let us control the actual (audio power domain) clock
manager.
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Lee Jones <lee@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add support for the new sama5d2 SoC and adapt capabilities.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add REF2USB_TX clock support into MT8173 APMIXEDSYS. This clock
is needed by USB 3.0.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Most multimedia subsystem clocks will be accessed by multiple
drivers, so it's a better way to manage these clocks in CCF.
This patch adds clock support for MM, IMG, VDEC, VENC and VENC_LT
subsystems.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
The dpi_ck clock can be removed because it not actually used
in topckgen and subsystems.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Add 13mhz clock used by GPT timer in infracfg.
Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Add clock support for Vybrid On-Chip One Time Programmable
(OCOTP) controller.
While the OCOTP block does not require explicit clock gating,
for programming the OCOTP timing register the clock rate of
ipg clock is required for timing calculations related to fuse
and shadow register read sequence. We explicitly specify the
ipg clock for OCOTP as a result.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for the msm8916 audio clocks. This includes core bus,
low-power audio and codec clocks. They are required for audio playback.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add support for the msm8916 BIMC (Bus Integrated Memory Controller)
clocks that are needed for GPU.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add support for the msm8916 TCU (Translation Control Unit) clocks that
are needed for IOMMU.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add the GDSC instances that exist as part of apq8084 MMCC block.
Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add the GDSC instances that exist as part of apq8084 GCC block
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add the GDSC instances that exist as part of msm8974 MMCC block
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
There's just one GDSC as part of the msm8974 GCC block.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add all data for the GDSCs which are part of msm8916 GCC block.
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
This patch renames CMU_FSYS1 clocks names to match with user manual.
And also adds missing gate clock for aclk_fsys1_200.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
This patch renames CMU_FSYS0 clocks names to match with user manual.
And also adds missing gate clock for aclk_fsys0_200.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
This patch renames CMU_PERIC1 clocks names to match with user manual.
And also adds missing gate clock for aclk_peric1_66.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
This patch renames CMU_PERIC0 clocks names to match with user manual.
And also adds missing gate clock for aclk_peric0_66.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
This adds some of the missing GATE clocks of CMU_TOPC block.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
This is the usual large batch of DT updates. Lots and lots of smaller
changes, some of the larger ones to point out are:
- Rockchip veyron (Chromebook) support, as well as several other new boards
- DRM support on Atmel AT91SAM9N12EK
- USB additions on some Allwinner platforms
- Mediatek MT6580 support
- Freescale i.MX6UL support
- Cleanups for Renesas shmobile platforms
- Lots of added devices on LPC18xx
- Lots of added devices and boards on UniPhier
There's also some dependent code added here, in particular some branches
that are primarily merged through the clock tree.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJV5OMWAAoJEIwa5zzehBx3r2QP/1skn0zzgfvbK0kkPOh9q3Jk
jX1elN4Wde1SnScz8UbdVb9nmdbhxsuYE/3+Lz7yCndWScBiak4qcsNHrSRhh3FA
ST7Ub8DLc2TxY9K7eDkyVCcNkP35+UQTHCN76R5Lgrlfw3UO9Zr3xPFX3+Kd6aWz
9X8UnvJacQQIN/vO6J02kB96sKPEIANfuMgO6vDSbmcZ1RrdlHzjoRwAV0smECtJ
NyOh+NQdPBR0gSl/peyKzAXoDHNXpDotltTmIz3tPA+dYBO/qG//B73H/oqox0ql
AKAktyaDzdxXEuixPtAroo4dDy3xuIQ6xU+DNhPWQq0BgaxHWqkwq60d74ot8vCz
8gvC8pwA6gavbqVFNePOnwPNSyWZX01scX4fp903NjVM8/rGPvCR4y6p8lFIyVkG
P0L8rmY/UYq3fieaAb1W0odASDrQpgg3zsHD7to43hz6jaRnMRCpA8nTVqJcyHqI
E6YfGQH87Kpbvkjo0FYqo5P6xCCRTq+QUys6JruNYg05R/gd8AG7cXaVNO3yvg3T
lRwNXDBt/zcp2exKnGR0IdGMUMICzsuoB8ZePkQdIWwePrd4AzT5qYJe/txmg1rd
q+9VJqQkeF+txLd9XUV2W/Hcuzu3ZPCbs97I9tTKQHMGwKUZaPfuk2r4+4K+Ps5a
dYwdms39p6AIT43rK+m3
=D2Pm
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Olof Johansson:
"Ladies and gentlemen, we proudly announce to you the latest branch of
ARM device tree contents for the mainline kernel. Come and see, come
and see!
No less than twentythree thousand lines of additions! Just imagine the
joy you will have of using your mainline kernel on newly supported
hardware such as Rockchip Chromebooks, Freescale i.MX6UL boards or
UniPhier hardware!
For those of you feeling less adventurous, added hardware support on
platforms such as TI DM814x and Gumstix Overo platforms might be more
of your liking.
We've got something for everyone here!
Ahem. Cough. So, anyway...
This is the usual large batch of DT updates. Lots and lots of smaller
changes, some of the larger ones to point out are:
- Rockchip veyron (Chromebook) support, as well as several other new boards
- DRM support on Atmel AT91SAM9N12EK
- USB additions on some Allwinner platforms
- Mediatek MT6580 support
- Freescale i.MX6UL support
- cleanups for Renesas shmobile platforms
- lots of added devices on LPC18xx
- lots of added devices and boards on UniPhier
There's also some dependent code added here, in particular some
branches that are primarily merged through the clock tree"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (389 commits)
ARM: tegra: Add gpio-ranges property
ARM: tegra: Fix AHB base address on Tegra20, Tegra30 and Tegra114
ARM: tegra: Add Tegra124 PMU support
ARM: tegra: jetson-tk1: Add GK20A GPU DT node
ARM: tegra: venice2: Add GK20A GPU DT node
ARM: tegra: Add IOMMU node to GK20A
ARM: tegra: Add CPU regulator to the Jetson TK1 device tree
ARM: tegra: Add entries for cpufreq on Tegra124
ARM: tegra: Enable the DFLL on the Jetson TK1
ARM: tegra: Add the DFLL to Tegra124 device tree
ARM: dts: zynq: Add devicetree entry for Xilinx Zynq reset controller.
ARM: dts: UniPhier: fix PPI interrupt CPU mask of timer nodes
ARM: dts: rockchip: correct regulator power states for suspend
ARM: dts: rockchip: correct regulator PM properties
ARM: dts: vexpress: Use assigned-clock-parents for sp810
pinctrl: tegra: Only set the gpio range if needed
arm: boot: dts: am4372: add ARM timers and SCU nodes
ARM: dts: AM4372: Add the am4372-rtc compatible string
ARM: shmobile: r8a7794 dtsi: Add CPG/MSTP Clock Domain
ARM: shmobile: r8a7793 dtsi: Add CPG/MSTP Clock Domain
...
- Add audio and eTSEC device support and update dspi node for LS1021A.
- Add initial i.MX6UL and imx6ul-14x14-evk board support, and enable
a bunch of device support for i.MX6UL, including RTC, power key, USB,
QSPI, and dual FEC.
- Enable HDMI and LVDS dual display support for a few imx6qdl boards.
- Support of imx6sl-warp board rev1.12, the version which will be
publicly available for the customers.
- A few i.MX7D device additions, watchdog, cortex-a7 coresight
components, RTC, power key, power off.
- Some Vybrid updates: add device support for I2C, QSPI, eSDHC etc.,
update ADC node, and define stdout-path property.
- A few random updates for i.MX27 and i.MX53 devices.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJVyhktAAoJEFBXWFqHsHzOjQwH/0CXyzRUCJjHqxAHsnvHzOZG
AvjYWqaimxP5PD6TRG1bRxfWWXNL7zZGqj9Jd/l5HIWdWfUxnOLeMy40yfcs+AsH
9CHUunu0rahIDY6YF4gA7F5jyfnSIzxwE8Bkva7nmXvf0XmazTwhCXxYPzdBjMSG
Cf39datyTj9ZS3DD/DAKzRN//zebQCJmPuAdmIlRZljBkoLVPeEZrVxkSN0trRin
vKPQIpamM2DXIMmdiPK52J0j8Vwq4qbiGvvAwUKsaRCUVYfpunpVcZSYgMqm8iEa
7PKuurbVeuvZLzS0Bdq05tCkwVXt0upk0ayf0i8DkHFExX79TNTbONOLJwmigjo=
=iAvA
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
The i.MX device tree updates for 4.3:
- Add audio and eTSEC device support and update dspi node for LS1021A.
- Add initial i.MX6UL and imx6ul-14x14-evk board support, and enable
a bunch of device support for i.MX6UL, including RTC, power key, USB,
QSPI, and dual FEC.
- Enable HDMI and LVDS dual display support for a few imx6qdl boards.
- Support of imx6sl-warp board rev1.12, the version which will be
publicly available for the customers.
- A few i.MX7D device additions, watchdog, cortex-a7 coresight
components, RTC, power key, power off.
- Some Vybrid updates: add device support for I2C, QSPI, eSDHC etc.,
update ADC node, and define stdout-path property.
- A few random updates for i.MX27 and i.MX53 devices.
* tag 'imx-dt-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (44 commits)
ARM: dts: imx6ul: add snvs power key support
ARM: dts: imx6ul: add RTC support
ARM: dts: imx6ul: enable GPC as extended interrupt controller
ARM: dts: imx6sx: correct property name for wakeup source
ARM: dts: add property for maximum ADC clock frequencies
ARM: dts: imx7d: enable snvs rtc, onoffkey and power off
ARM: dts: imx6ul-14x14-evk: add fec1 and fec2 support
ARM: dts: imx: add fec1 and fec2 nodes for SOC i.MX6UL
ARM: dts: imx27: add support of internal rtc
ARM: dts: vf-colibri: define stdout-path property
ARM: dts: ls1021a: Enable the eTSEC ports on QDS and TWR
ARM: dts: ls1021a: Add the eTSEC controller nodes
ARM: dts: imx6ul: add qspi support
ARM: dts: imx6ul: fix low case define in imx6ul-pinfunc.h
ARM: dts: imx6ul: add usb host and function support
ARM: dts: vfxxx: Add io-channel-cells property for ADC node
ARM: dts: ls1021a: Add dts nodes for audio on LS1021A
ARM: imx6qdl-sabreauto.dtsi: enable USB support
ARM: dts: imx: update snvs to use syscon access register
ARM: dts: imx: add imx6ul and imx6ul evk board support
...
Signed-off-by: Olof Johansson <olof@lixom.net>
The i.MX clock updates for 4.3:
- Provide a better IPU clock initial settings on imx6dl for getting
HDMI and LVDS at the same time.
- Add clock driver support for i.MX6UL SoC
- Add a second clock for RTC device on i.MX31 and i.MX35
Add CAAM clock support to the i.MX6 clocking infrastructure.
Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
Tested-by: Horia Geantă <horia.geanta@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This patch add CPU clock configuration data and instantiate the CPU
clock type for Exynos3250 to support Samsung specific cpu-clock type.
Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
With the addition of the new Samsung specific cpu-clock type, the
arm clock can be represented as a cpu-clock type. Add the CPU clock
configuration data and instantiate the CPU clock type for Exynos5250.
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
[b.zolnierkie: split exynos5250 support from the original patch]
[b.zolnierkie: moved E5250_CPU_DIV[0,1] macros to clk-exynos5250.c]
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
Tested-by: Javier Martinez Canillas <javier@dowhile0.org>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Review for the rk3368 turned up that the clock header was missing include
guards. This is also true for the already existing clock binding headers,
so add them.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add the dt-bindings header for the rk3368, that gets shared between
the clock controller and the clock references in the dts.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add the EtherAVB clock to the R8A7790 device tree.
Based on original patch by Mitsuhiro Kimura <mitsuhiro.kimura.kc@renesas.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Minimal r8a7793 device tree including one CPU core, interrupt controllers,
timers, two serial ports, and the Ethernet controller, plus the required
clock descriptions.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
drivers and updates to existing ones, as usual. There are some fixes to
the framework itself and several cleanups for sparse warnings, etc.
Please consider pulling.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVlCubAAoJEKI6nJvDJaTUJ3cQAKdaU+NpWX9Qajt6snIHcqB6
nBg57DltuPh1XFMPHDIdPe+8rK0RDQjao6jwzzqUKGaZJ3sycPCIn8mh+iZCP7Se
yxhacQIAIp2qbIlIQ8Epcc6jnma/8cUyfB0BuYMddzb7bk2PXLfLxzJgAo5pXZM1
LQoBxdpBh3Y7vcdBFLuHsnORTZdRI29Nu7p5dRK27vxWFBoCqL3bshHSS8g7lTBc
XUWcFhfFe7WvMvBqqF8pSJlCmHzO90S0MmFPT4OQy4NtAysPpjsqI6RPCHBTyvy+
oniMM6zM/RdN1VnLB49HvAL4mArjAdsQGxNywsUpvD/IcZPbpM8N3VA3xHzANMfy
iJ9374zgjRn3/YBfjYFCcyVUY7SPeiRsXh97ZMZJGY5BC5FbXuKMn3STPrUilhw/
CMSq9ARdmjlPQDW5EuEGFeap+7oz4q4Kgk0qgmOktIVYhtt9Pn0ddMKINIpokzbi
4w0z1kc/YVHZpFMNYxAQoxYzejU9hxybUvYUEnu9RFzzOW+o7DsmMv7k5r1XY+oO
P1Kz0jVWCw46XnvP6z1V4SforZOQXr1Om698O8fd7ke7Q7gFCr2UQjIuXliC/g8u
NREqu1kceXTeWnt0LFZB7GMOo2Edo21qYIAILyqTO50QJL2at5WLoibaM03y7I7x
GeMP1APDHJI0E5dn0v5P
=Iv72
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clock framework updates from Michael Turquette:
"The changes to the common clock framework for 4.2 are dominated by new
drivers and updates to existing ones, as usual.
There are some fixes to the framework itself and several cleanups for
sparse warnings, etc"
* tag 'clk-for-linus-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (135 commits)
clk: stm32: Add clock driver for STM32F4[23]xxx devices
dt-bindings: Document the STM32F4 clock bindings
cpufreq: exynos: remove Exynos4210 specific cpufreq driver support
ARM: Exynos: switch to using generic cpufreq driver for Exynos4210
clk: samsung: exynos4: add cpu clock configuration data and instantiate cpu clock
clk: samsung: add infrastructure to register cpu clocks
clk: add CLK_RECALC_NEW_RATES clock flag for Exynos cpu clock support
doc: dt: add documentation for lpc1850-ccu clk driver
clk: add lpc18xx ccu clk driver
doc: dt: add documentation for lpc1850-cgu clk driver
clk: add lpc18xx cgu clk driver
clk: keystone: add support for post divider register for main pll
clk: mvebu: flag the crypto clk as CLK_IGNORE_UNUSED
clk: cygnus: remove Cygnus dummy clock binding
clk: cygnus: add clock support for Broadcom Cygnus
clk: Change bcm clocks build dependency
clk: iproc: add initial common clock support
clk: iproc: define Broadcom iProc clock binding
MAINTAINERS: update email for Michael Turquette
clk: meson: add some error handling in meson_clk_register_cpu()
...
Pull MIPS updates from Ralf Baechle:
- Improvements to the tlb_dump code
- KVM fixes
- Add support for appended DTB
- Minor improvements to the R12000 support
- Minor improvements to the R12000 support
- Various platform improvments for BCM47xx
- The usual pile of minor cleanups
- A number of BPF fixes and improvments
- Some improvments to the support for R3000 and DECstations
- Some improvments to the ATH79 platform support
- A major patchset for the JZ4740 SOC adding support for the CI20 platform
- Add support for the Pistachio SOC
- Minor BMIPS/BCM63xx platform support improvments.
- Avoid "SYNC 0" as memory barrier when unlocking spinlocks
- Add support for the XWR-1750 board.
- Paul's __cpuinit/__cpuinitdata cleanups.
- New Malta CPU board support large memory so enable ZONE_DMA32.
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (131 commits)
MIPS: spinlock: Adjust arch_spin_lock back-off time
MIPS: asmmacro: Ensure 64-bit FP registers are used with MSA
MIPS: BCM47xx: Simplify handling SPROM revisions
MIPS: Cobalt Don't use module_init in non-modular MTD registration.
MIPS: BCM47xx: Move NVRAM driver to the drivers/firmware/
MIPS: use for_each_sg()
MIPS: BCM47xx: Don't select BCMA_HOST_PCI
MIPS: BCM47xx: Add helper variable for storing NVRAM length
MIPS: IRQ/IP27: Move IRQ allocation API to platform code.
MIPS: Replace smp_mb with release barrier function in unlocks.
MIPS: i8259: DT support
MIPS: Malta: Basic DT plumbing
MIPS: include errno.h for ENODEV in mips-cm.h
MIPS: Define GCR_GIC_STATUS register fields
MIPS: BPF: Introduce BPF ASM helpers
MIPS: BPF: Use BPF register names to describe the ABI
MIPS: BPF: Move register definition to the BPF header
MIPS: net: BPF: Replace RSIZE with SZREG
MIPS: BPF: Free up some callee-saved registers
MIPS: Xtalk: Update xwidget.h with known Xtalk device numbers
...
As usual, quite a few device-tree updates in ARM land. There was ome
minor churn in DTs due to relicensing under a dual-license, and lots
of little additions of new peripherals, features etc, but nothing
really exciting to call to your attention. Some higlights, focsuing
on support for new SoCs and boards:
- AT91: new boards: Overkiz, Acme Systems' Arietta G25
- tegra: HDA support
- bcm: new platforms: Buffalo WXR-1900DHP, SmartRG SR400ac, ASUS RT-AC87U
- mvebu: new platforms: Compulab CM-A510, Armada 385-based Linksys
boards, DLink DNS-327L
- OMAP: new platforms: Baltos IR5221, LogicPD Torpedo, Toby-Churchill SL50
- ARM: added support for Juno r1 board
- sunxi: A33 SoC support; new boards: A23 EVB, SinA33, GA10H-A33, Mele A1000G
- imx: i.MX7D SoC support; new boards: Armadeus Systems APF6,
Gateworks GW5510, and aristainetos2 boards
- hisilicon: hi6220 SoC support; new boards: 96boards hikey
Conflicts: None
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVi4ROAAoJEFk3GJrT+8ZlBcsP/jjXN+pucA3oHE/Jn9j1yF8e
aPENC0iXVDr2ru5SikBlgmBYeoZjsXV90HWnEo3RZrF4/zMa8CUOD6UqKZLp7x9d
SYEtuFk98VM/7Qtho6qDvZaLTnzWT5CL24E+J899P8V9lWVm3mwklKE9ScmkDd5m
kQxtj5rk1HcaDPmtJ0rseqNoaqRSG1UmhAHLkHMYLg5CyQb7L4FZx+l+Zj4FpYFE
js9uIVpp2gIuJu3nLRWgkhnoOVQzLAftPnmkbgEYYjqY3/kCtkvRA3g3QoDwn6nc
qjI3iFSYudyum9CmCMfvPYFfwXJ7uT3s+GPXJj+vLZomFfQm5g9S0/RGLQh2loi+
zCBeCw63y22qqJfNVLx3yVdyEYslu9RcFeuBzWrQ2R+ZYYq1MBdKeNIUqlnbRAvv
gB5jOT5yg5Tzme94Uk2WfTiy5Es2d7KsqlvnKSRuItFI2+LvjfMipV7JLf/5gPE1
1A/A9ALW550kyxVsQtST8wMyTN5ASQ+fyM9MvICgpZa/LBA2hXsO+XCKO0LzOZUg
3ABJVogUpqLwuA6qVAToq4bRNPC7p72odM1tKRHHCNf29r5wtYqu79Eon+3v4Zgf
1wjSJocjJ9yCFxxLMn8PgxcF8Maedp9y/I6dCHEYN5zI6RdwlelUvWcuul6RIEeO
+XORenPq9ZRR8tDO+HSU
=wWIc
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC DT updates from Kevin Hilman:
"As usual, quite a few device-tree updates in ARM land. There was one
minor churn in DTs due to relicensing under a dual-license, and lots
of little additions of new peripherals, features etc, but nothing
really exciting to call to your attention. Some higlights, focsuing
on support for new SoCs and boards:
- AT91: new boards: Overkiz, Acme Systems' Arietta G25
- tegra: HDA support
- bcm: new platforms: Buffalo WXR-1900DHP, SmartRG SR400ac, ASUS
RT-AC87U
- mvebu: new platforms: Compulab CM-A510, Armada 385-based Linksys
boards, DLink DNS-327L
- OMAP: new platforms: Baltos IR5221, LogicPD Torpedo, Toby-Churchill
SL50
- ARM: added support for Juno r1 board
- sunxi: A33 SoC support; new boards: A23 EVB, SinA33, GA10H-A33,
Mele A1000G
- imx: i.MX7D SoC support; new boards: Armadeus Systems APF6,
Gateworks GW5510, and aristainetos2 boards
- hisilicon: hi6220 SoC support; new boards: 96boards hikey"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (462 commits)
ARM: hisi: revert changes from hisi/hip04-dt branch
ARM: nomadik: set proper compatible for accelerometer
ARM64: juno: add GPIO keys
ARM: at91/dt: sama5d4: fix dma conf for aes, sha and tdes nodes
ARM: dts: Introduce STM32F429 MCU
ARM: socfpga: dts: enable ethernet for Arria10 devkit
ARM: dts: k2l: fix the netcp range size
ARM: dts: k2e: fix the netcp range size
ARM: dts: k2hk: fix the netcp range size
ARM: dts: k2l-evm: Add device bindings for netcp driver
ARM: dts: k2e-evm: Add device bindings for netcp driver
ARM: dts: k2hk-evm: Add device bindings for netcp driver
ARM: BCM5301X: Add DT for Asus RT-AC87U
ARM: BCM5301X: add IRQ numbers for PCIe controller
ARM: BCM5301X: add NAND flash chip description
arm64: dts: Add dts files for Hisilicon Hi6220 SoC
clk: hi6220: Document devicetree bindings for hi6220 clock
arm64: hi6220: Document devicetree bindings for Hisilicon hi6220 SoC
ARM: at91/dt: sama5d4ek: mci0 uses slot 0
ARM: at91/dt: kizbox: fix mismatch LED PWM device
...
Our SoC branch usually contains expanded support for new SoCs and
other core platform code. Some highlights from this round:
- sunxi: SMP support for A23 SoC
- socpga: big-endian support
- pxa: conversion to common clock framework
- bcm: SMP support for BCM63138
- imx: support new I.MX7D SoC
- zte: basic support for ZX296702 SoC
Conflicts:
arch/arm/mach-socfpga/core.h
Trivial remove/remove conflict with our cleanup branch.
Resolution: remove both sides
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVi4RMAAoJEFk3GJrT+8Zl6/kP/1Rv9O++1Kxua6R54Og6AF1J
0miFr2fnUrUWUYg/NVbseRH5bBe6N6ir3SQMfde8W2/QibEjOoEwSwrle+mC/eiq
CE0x0gtyRvXMrMU/FWkOvbmmw9uv5oz1z3IHZV6AiecNuSMLUBPfamryikQ8C+d1
O/QZtX543tJQJDOBihO5cuhoVVM37UX0unNmqGsyswlyqTPF8FxcIJAYVNtnxjmj
AFaOB0nDJKLKFTiX2Ype2wOxxJX1lrLatNo4W4T+YaaK+i1uCOhgTdSN+n49K7YA
KNDFEgZFQqT8VMJyG+eJVeYF+cI7yWQ7lBzIftPUjPk/7+dIHBjWPz2QdjVz3U38
kxncf4S9xGAF5G2rcKe4mFrfT3Y8QLWQpA/jFs06yLwW1O3Hlfq3DzMdGNcF7hth
17LOP8namn9+NepZEp/vAlFzRRypxWWtbkPNBIItkImC6zn0IiGjBy50DE1io27W
hmQcnMb7d+0wWl2Y8OmR2lZSB97JiRZkRYMCVHVt+0zGJzp4prLvl9wbjh1VXkPv
ERCDJ9nCmZsl7ZVmIXMI7KNXYuPNp7R/QAzCvuSUueswF0qxTAQ0VSSBwRMqvQsQ
UUNC6p63VnjUeMUdn2EBsUQZ0Uqw3t2U5TtvooHNt9FkiGsSpwjWrvVD+LItaPoJ
GPeeJrJaYQsDvTrO8wjU
=ZtPK
-----END PGP SIGNATURE-----
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform support updates from Kevin Hilman:
"Our SoC branch usually contains expanded support for new SoCs and
other core platform code. Some highlights from this round:
- sunxi: SMP support for A23 SoC
- socpga: big-endian support
- pxa: conversion to common clock framework
- bcm: SMP support for BCM63138
- imx: support new I.MX7D SoC
- zte: basic support for ZX296702 SoC"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (134 commits)
ARM: zx: Add basic defconfig support for ZX296702
ARM: dts: zx: add an initial zx296702 dts and doc
clk: zx: add clock support to zx296702
dt-bindings: Add #defines for ZTE ZX296702 clocks
ARM: socfpga: fix build error due to secondary_startup
MAINTAINERS: ARM64: EXYNOS: Extend entry for ARM64 DTS
ARM: ep93xx: simone: support for SPI-based MMC/SD cards
MAINTAINERS: update Shawn's email to use kernel.org one
ARM: socfpga: support suspend to ram
ARM: socfpga: add CPU_METHOD_OF_DECLARE for Arria 10
ARM: socfpga: use CPU_METHOD_OF_DECLARE for socfpga_cyclone5
ARM: EXYNOS: register power domain driver from core_initcall
ARM: EXYNOS: use PS_HOLD based poweroff for all supported SoCs
ARM: SAMSUNG: Constify platform_device_id
ARM: EXYNOS: Constify irq_domain_ops
ARM: EXYNOS: add coupled cpuidle support for Exynos3250
ARM: EXYNOS: add exynos_get_boot_addr() helper
ARM: EXYNOS: add exynos_set_boot_addr() helper
ARM: EXYNOS: make exynos_core_restart() less verbose
ARM: EXYNOS: fix exynos_boot_secondary() return value on timeout
...
Add driver for NXP LPC18xx/43xx Clock Control Unit (CCU). The CCU
provides fine grained gating of most clocks present in the SoC.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Add driver for NXP LPC18xx/43xx Clock Generation Unit (CGU). The CGU
contains several clock generators and output stages that route the
clocks either directly to peripherals or to a Clock Control Unit
(CCU).
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
The Broadcom Cygnus SoC is architected under the iProc architecture. It
has the following PLLs: ARMPLL, GENPLL, LCPLL0, MIPIPLL, all dervied
from an onboard crystal. Cygnus also has various ASIU clocks that are
derived directly from the onboard crystal.
Signed-off-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
* zte/soc:
ARM: zx: Add basic defconfig support for ZX296702
ARM: dts: zx: add an initial zx296702 dts and doc
clk: zx: add clock support to zx296702
dt-bindings: Add #defines for ZTE ZX296702 clocks
Add clocks defines for the global clock controller
found on ZTE ZX296702 SoCs.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
- for exyos3250
: use s3c6410-rtc instead of exynos3250-rtc
: add JPEG codec node and support it on exynos3250-rinato
: use s3c-rtc clock id for exynos3250-rinato and monk boards
- for exynos4
: add JPEG codec node and syscon property to MIPI DPHY
: remove obsolete MIPI DPHY reg property
: enable s3c-rtc on exynos4412-trats2
- for exynos5
: add syscon property to MIPI DPHY for exynos5420
: enable s3c-rtc on exynos5420-arndale-octa
: add missing irq pinctrl for max77686 on exynos5250-smdk5250
: clk: add bindings for 32kHz clocks from s2mps11
: fix pinctrl for s2mps11-irq on exynos5420-arndale-octa
- for exynos5422-odroidxu3
: add mmc detect gpio and LEDs
: add HS400 support, simple-audio-card and rtc_src clock
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJVcdi/AAoJEA0Cl+kVi2xqpSUQAIyssldks3xXgM5xH7FbQO+o
az4havpqNm/1P6b2QWEW4+NejrrHrs5SYGAQBFmE/ziMCDfDGiMsnwCZleRRoWXs
oPndr2fLtVBzFR+IGZbEdCQ7e3RC6x/Sn0RVJsYLvhaUjQhI1TxhR/xGUF0nsjrL
BM1bvXFPLL0p3qzCxyPPIz2k3o8YyKiLC3WiUX+pOIb7cHT1wH/sz7/lfH/Lbsmz
wLMgUZqHsFan48qsMFDHNKChkgL4Ph/prPTM6AmDTTz/KzK2FLz8IojDKUDfBJvB
lCPxn9AZ/mpSt+8zxSuWfKhaInOZ+t2AhxjKbks28RMcJtrttTYt1dIBld5J2u7p
25DClKmL8/UbUp0AyHD3NTo5+RUlwz2pChVrFW3LjE3lgTBzy0zx0wcs0Rhr7y3L
12FuV8YC7olIgP4YiPwRAVty9nFlbPWCvQu6lamYWW4XB40e1UXxk/bPSaL9hlNz
HN2skHVRh7uGwa9txPQFkWXPjdfSmWAuhu7VA+E8hMRSeND9hcbseImkq1S8MCNd
n17vIb4g3IwMAj/lGYJJNJ+DRhRuYeK1yjSfqpswlNxGqlHuKKbKxiuT+MR+NpvE
YM7o2Vs5V1dJB5iJZxyxh+fzz/Cz8N2Qj7If1lDJC6I1Z5qlQk/1r4gONPDEorn0
iAliP2yOAj2/cTylK73m
=bWPy
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt
Samsung DT updates for v4.2
- for exyos3250
: use s3c6410-rtc instead of exynos3250-rtc
: add JPEG codec node and support it on exynos3250-rinato
: use s3c-rtc clock id for exynos3250-rinato and monk boards
- for exynos4
: add JPEG codec node and syscon property to MIPI DPHY
: remove obsolete MIPI DPHY reg property
: enable s3c-rtc on exynos4412-trats2
- for exynos5
: add syscon property to MIPI DPHY for exynos5420
: enable s3c-rtc on exynos5420-arndale-octa
: add missing irq pinctrl for max77686 on exynos5250-smdk5250
: clk: add bindings for 32kHz clocks from s2mps11
: fix pinctrl for s2mps11-irq on exynos5420-arndale-octa
- for exynos5422-odroidxu3
: add mmc detect gpio and LEDs
: add HS400 support, simple-audio-card and rtc_src clock
* tag 'samsung-dt-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: Add syscon property to the MIPI DPHY for exynos4415
ARM: dts: Remove obsolete MIPI DPHY 'reg' property for exynos4
ARM: dts: Use last parent for clocks during power domain on/off
ARM: dts: add support JPEG codec for exynos3250-rinato
ARM: dts: support simple-audio-card for exynos5420 and exynos5422-odroidxu3
ARM: dts: add jpeg-codec node for exynos4 and exynos4x12
ARM: dts: Enable S3C RTC on exynos4412-trats2 and exynos5420-arndale-octa
ARM: dts: Use define for s3c-rtc clock id for exynos3250-monk
ARM: dts: Use define for s3c-rtc clock id for exynos3250-rinato
ARM: dts: Use s3c6410-rtc instead of exynos3250-rtc for exynos3250/4415
ARM: dts: add 'rtc_src' clock to rtc node for exynos5422-odroidxu3
clk: samsung: Add bindings for 32kHz clocks from s2mps11
ARM: dts: fix pinctrl for s2mps11-irq on exynos5420-arndale-octa
ARM: dts: Add syscon property to the MIPI phy in exynos5420
ARM: dts: Add HS400 support for exynos5422-odroidxu3
ARM: dts: Add LEDs for exynos5422-odroidxu3
ARM: dts: add mmc detect gpio for exynos5422-odroidxu3
ARM: dts: add JPEG codec device node for exynos3250
ARM: dts: Add missing irq pinctrl for max77686 on smdk5250
- Add device tree for i.MX7D SoC and imx7d-sdb board
- New i.MX6 board support: Armadeus Systems APF6, Gateworks GW5510,
and aristainetos2 boards
- Change LVDS to use simple-panel for nitrogen6x and sabrelite boards
- Add Wifi/Bluetooth devices support for cubox-i board
- Remove unused regulators and correct OTG roles setting for
imx6sl-warp board
- Add I2C support for imx23-olinuxino board
- Move imx6qdl HDMI device to a better place
- Add power-domain for imx6qdl CODA device
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJVb7iWAAoJEFBXWFqHsHzOIGEIAJjoZ+80PKH6+obh7gCuEkIx
MkZobKxYyRRh+wD+7NZEqSPMYxBW6eUCYGCCy+f/4xjmlIfHkp/DaaCeIU0EZItl
GU1ZE7qg6kWGbamun7zXcrg1cZ+bFOpQ926isETurL8LC2+PLm6OSg1pl6hwjqpA
rGzY2aEH5Lke6wDN0cMus0ApMlIQ8HpOLABtqosuzUWclyZBmoxBQshbW8ztzS3Y
pjpRfAHS91+0vZpoqmULTc/ENbTToNYk5NxJgMMDigkz1Gqp0Ni+rxmDmRPayo09
/Nq4VHDT+wx3CSf6nC9YIrabxrBMpvTky2jWOAJ4OxMFjT0xle3XISGRoa1ifqo=
=PbGi
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
The i.MX device tree changes for 4.2:
- Add device tree for i.MX7D SoC and imx7d-sdb board
- New i.MX6 board support: Armadeus Systems APF6, Gateworks GW5510,
and aristainetos2 boards
- Change LVDS to use simple-panel for nitrogen6x and sabrelite boards
- Add Wifi/Bluetooth devices support for cubox-i board
- Remove unused regulators and correct OTG roles setting for
imx6sl-warp board
- Add I2C support for imx23-olinuxino board
- Move imx6qdl HDMI device to a better place
- Add power-domain for imx6qdl CODA device
* tag 'imx-dt-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (24 commits)
ARM: dts: imx6dl: add imx6dl gpt specific compatible string
ARM: dts: imx6: add DT for aristainetos2 board
ARM: dts: cubox-i/hummingboard: Fix the license text
ARM: dts: sabrelite: use simple-panel instead of display-timings for LVDS0
ARM: dts: nitrogen6x: use simple-panel instead of display-timings for LVDS0
ARM: dts: add imx7d-sdb support
ARM: dts: add imx7d soc dtsi file
ARM: dts: Armadeus Systems APF6 family support (i.MX6)
ARM: dts: vf610: Nomenclature fixup for PTC12 pin used in RMII mode.
ARM: dts: cubox-i: add support for Broadcom Wifi/Bluetooth devices
Document: dt: binding: imx: update document for imx7d support
ARM: dts: imx6qdl: Add power-domain phandle to CODA device node
ARM: dts: Gateworks GW5510 support (i.MX6)
ARM: dts: imx6sl-warp: Fix OTG roles
ARM: dts: imx6sl-warp: Remove USB regulators
ARM: dts: imx6sl-warp: Remove unused regulator
ARM: dts: add pinfunc include file to support imx7d
ARM: mxs: fix in tree users of ssd1306
ARM: dts: imx6qdl-hummingboard: Add PCIe support
ARM: dts: imx23-olinuxino: Add i2c support
...
* clk-meson8b:
clk: meson8b: Add support for Meson8b clocks
clk: meson: Document bindings for Meson8b clock controller
clk: meson: Add support for Meson clock controller
This patchset adds the infrastructure for registering and managing the
core clocks found on Amlogic MesonX SoCs. In particular:
- PLLs
- CPU clock
- Fixed rate clocks, fixed factor clocks, ...
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Timer has external fast clock, and it is a mux clock.
Add the timer clock type for timer driver.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add the header file "hi6220-clock.h" used by both
hi6220 clock driver and hi6220 device tree file.
Suggested-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Bintian Wang <bintian.wang@huawei.com>
Tested-by: Will Deacon <will.deacon@arm.com>
Tested-by: Tyler Baker <tyler.baker@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Enabled DAP (debug access port) by default. This enables the hw-
breakpoint framework to make use of the breakpoints and watchpoints
supported by hardware.
[ 0.215805] hw-breakpoint: found 2 (+1 reserved) breakpoint and 1 watchpoint registers.
[ 0.224624] hw-breakpoint: maximum watchpoint size is 4 bytes.
Without this clock, the hw-breakpoint driver claims an undefined
instruction during initialization:
[ 0.227380] hw-breakpoint: Debug register access (0xee003e17) caused undefined instruction on CPU 0
[ 0.227519] hw-breakpoint: CPU 0 failed to disable vector catch
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
It adds the imx7d clock ID definitions which will be used by both imx7d
clock driver and device tree.
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Add the NSS/GMAC clocks and the TCM clock and NSS resets.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
This creates include/dt-bindings/clock/samsung,s2mps11.h with
the three 32kHz clock outputs from the s2mps11 mfd.
Signed-off-by: Markus Reichl <m.reichl@fivetechno.de>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
This adds the clock binding documentation for the Marvell PXA1928 SOC.
The PXA1928 has 3 clock control blocks for different subsystems of the
chip.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Link the external IRQ controller irqc0 to the IRQC module clock, so it
can be power managed using that clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Link the external IRQ controller irqc0 to the IRQC module clock, so it
can be power managed using that clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Link the external IRQ controller irqc0 to the IRQC module clock, so it
can be power managed using that clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Link the external IRQ controllers irqc0 and irqc1 to the IRQC module
clock, so they can be power managed using that clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[horms: corrected typo in changelog to refer to r8a73a4]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
