Since init_failed flag was moved to struct hda_intel, its access in
the commit [4da63c6f: ALSA: hda - Fix broken PM due to incomplete
i915 initialization] is also replaced with hda->init_failed
appropriately.
We got a regression report for 3.15.x kernels, and this turned out to
be triggered by the fix for stream assignment order. On reporter's
machine with Intel controller (8086:1e20) + VIA VT1802 codec, the
first playback slot can't work with speaker outputs.
But the original commit was actually a fix for AMD controllers where
no proper GCAP value is returned, we shouldn't revert the whole
commit. Instead, in this patch, a new flag is introduced to determine
the stream assignment order, and follow the old behavior for Intel
controllers.
Fixes: dcb32ecd9a ('ALSA: hda - Do not assign streams in reverse order')
Reported-and-tested-by: Steven Newbury <steve@snewbury.org.uk>
Cc: <stable@vger.kernel.org> [v3.15+]
Signed-off-by: Takashi Iwai <tiwai@suse.de>
ICH6_ prefix doesn't mean that it's specific to ICH6 chipset but
rather its generic for all HD-audio (or "Azalia") devices.
Use AZX_ prefix instead to align with other constants.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Just move struct fields between struct azx and struct hda_intel, and
move some definitions from hda_priv.h to hda_intel.c.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
... and move most parts into hda_intel.c from the generic controller
code. This is a clean up, and there should be no functional change by
this patch.
Now, struct azx obtains the generic callbacks for getting the position
and the delay. As default NULL, posbuf is read. These replace the
old position_fix[], and each is implemented as a callback.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
The recent commit (ca460f8652) changed the CORB RP reset procedure to
follow the specification with a couple of sanity checks.
Unfortunately, Nvidia controller chips seem not following this way,
and spew the warning messages like:
snd_hda_intel 0000:00:10.1: CORB reset timeout#1, CORBRP = 0
This patch adds the workaround for such chips. It just skips the new
reset procedure for the known broken chips.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
The ops to read and write registers should take pointers labeled as
__iomem. Thanks to the sparse bot for catching this.
Signed-off-by: Dylan Reid <dgreid@chromium.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Using readl, writel, etc. resulted in some architectures, such as
s390, expanding the member names into zpci_writel. Obviously not the
intended result.
Fixes s390 build breakage introduced by "4083081 - ALSA: hda - Allow
different ops to read/write registers"
Signed-off-by: Dylan Reid <dgreid@chromium.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
This op will be used by hda_intel to do the position check. Takashi
wisely suggested adding this before moving the interrupt handler to
common HDA code. Having this callback prevents the need to move the
hda_intel specific delayed interrupt handling with the irq.
Signed-off-by: Dylan Reid <dgreid@chromium.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Adding this op allows the X86 specific mmap operation to help in
hda_intel without needing a CONFIG_X86 in future non-PCI hda drivers.
Signed-off-by: Dylan Reid <dgreid@chromium.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Break out the allocation of pages for DMA and PCM buffers to ops in
the chip structure. This is done to allow for architecture specific
work-arounds to be added. Currently mark_pages_wc is used by
hda_intel. This avoids needing to move that x86-specific code to a
common area shared with hda platform drivers.
Signed-off-by: Dylan Reid <dgreid@chromium.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Keeping a pointer to the jackpoll_ms array in the chip will allow
azx_codec_create to be shared between hda_intel and hda_platform
drivers. Also modify get_jackpoll_ms to make the jackpoll_ms member
optional, this way a platform driver can leave it out if it's not
needed.
Signed-off-by: Dylan Reid <dgreid@chromium.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
This is a PCI-only feature, but adding a callback for it in the chip
structure breaks the PCI dependency in the RIRB code allowing the
logic there to be re-used by the platform HDA driver.
Signed-off-by: Dylan Reid <dgreid@chromium.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
This will allow for a platform hda driver to use it as well. It
removes the dependency on the module param from hda_intel, which will
allow for azx_setup_periods to be shared.
Signed-off-by: Dylan Reid <dgreid@chromium.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
The forthcoming platform hda driver needs to override the way
registers are read and written. In preparation for that, introduce a
reg_ops struct that can be implemented differently by the new driver.
Change the existing macros to use the new structure, and move them to
hda_priv.h where they will be accessible to both PCI and platform
drivers.
Start with register access, but later commits will add more ops that
differ between PCI and platform.
Signed-off-by: Dylan Reid <dgreid@chromium.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Later commits adding support for hda platform drivers will want to use
the same defines and structures. Put them in a place reachable by both
hda_intel and the new platform driver.
This is a mostly a direct copy with a few whitespace and comment
changes to make checkpatch happy.
Signed-off-by: Dylan Reid <dgreid@chromium.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>