Commit Graph

536203 Commits

Author SHA1 Message Date
Ben Skeggs
fd166a1832 drm/nouveau/disp: cosmetic changes
This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:11 +10:00
Ben Skeggs
e2f1cf253e drm/nouveau/cipher: cosmetic changes
This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:11 +10:00
Ben Skeggs
d9261a6837 drm/nouveau/ce: cosmetic changes
This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:11 +10:00
Ben Skeggs
d8c304b504 drm/nouveau/bsp: cosmetic changes
This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:10 +10:00
Ben Skeggs
f0961867b8 drm/nouveau/xtensa: cosmetic changes
This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:10 +10:00
Ben Skeggs
b26ada6fed drm/nouveau/falcon: cosmetic changes
This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:10 +10:00
Ben Skeggs
6052dc5775 drm/nouveau/volt: cosmetic changes
This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:10 +10:00
Ben Skeggs
cb8bb9cedb drm/nouveau/tmr: cosmetic changes
This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:09 +10:00
Ben Skeggs
da06b46b72 drm/nouveau/therm: cosmetic changes
This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:09 +10:00
Ben Skeggs
5a7d1e22fe drm/nouveau/pmu: cosmetic changes
This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:09 +10:00
Ben Skeggs
2d9d5889e8 drm/nouveau/mxm: cosmetic changes
This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:09 +10:00
Ben Skeggs
1f5bffca22 drm/nouveau/mmu: cosmetic changes
This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:09 +10:00
Ben Skeggs
2ca0ddbc03 drm/nouveau/mc: cosmetic changes
This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:09 +10:00
Ben Skeggs
c7750cfbc1 drm/nouveau/ltc: cosmetic changes
This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:09 +10:00
Ben Skeggs
c44c06aeeb drm/nouveau/imem: cosmetic changes
This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:08 +10:00
Ben Skeggs
ac51596f27 drm/nouveau/ibus: cosmetic changes
This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:08 +10:00
Ben Skeggs
5b920d9264 drm/nouveau/i2c: cosmetic changes
This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:08 +10:00
Ben Skeggs
e7d6518104 drm/nouveau/gpio: cosmetic changes
This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:08 +10:00
Ben Skeggs
ce7b4f60a8 drm/nouveau/fuse: cosmetic changes
This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:08 +10:00
Ben Skeggs
b1e4553cb1 drm/nouveau/fb: cosmetic changes
This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:08 +10:00
Ben Skeggs
266f8b5ee6 drm/nouveau/devinit: cosmetic changes
This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:07 +10:00
Ben Skeggs
3eca809b3c drm/nouveau/clk: cosmetic changes
This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:07 +10:00
Ben Skeggs
01d6b95605 drm/nouveau/bus: cosmetic changes
This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:07 +10:00
Ben Skeggs
a00014e396 drm/nouveau/bios: cosmetic changes
This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:07 +10:00
Ben Skeggs
5b0c189fcb drm/nouveau/bar: cosmetic changes
This is purely preparation for upcoming commits, there should be no
code changes here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:07 +10:00
Ben Skeggs
9ace404b10 drm/nouveau/device: include core/device.h automatically for subdevs/engines
Pretty much every subdev/engine is going to need access to nvkm_device
shortly to touch registers and/or output messages.

The odd placement of the includes is necessary to work around some
inter-dependencies that currently exist.  This will be fixed later.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:07 +10:00
Ben Skeggs
6d0d40e7a5 drm/nouveau/device: add direct pointer to struct device
A future commit will hide the platform/pci specifics from nvkm_device,
but it's still very useful in a lot of places to have access to the
Linux device struct.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:06 +10:00
Ben Skeggs
741d778ea0 drm/nouveau/device: add direct pointers to subdevs from nvkm_device
Will be used in upcoming commits to remove the need for lookup/runtime
type-checking functions when accessing foreign subdevs.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:06 +10:00
Ben Skeggs
d351b8569e drm/nouveau/subdev: add direct pointer to nvkm_device
Will be utilised in upcoming commits to remove the need for heuristics
to lookup the device a subdev belongs to.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:06 +10:00
Ben Skeggs
0d5dd3f301 drm/nouveau/lib: various tweaks
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:05 +10:00
Ben Skeggs
205877f915 drm/nouveau/pmu/gk104: implement a hackish workaround for a hw bug
Only a handful of machines have this enabled by default, where it's been
proven to work.  The workaround can be explicitly enabled with a module
option also.

Still waiting on feedback from NVIDIA for a proper idea of exactly what
this fix is doing, and how to implement it properly.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:05 +10:00
Ben Skeggs
2a89359415 drm/nouveau/disp/dp: gm1xx appears to have same dp lane ordering as gm2xx
Fixes 2-lane DP on Quadro K620.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:05 +10:00
Ben Skeggs
fe0f5d0880 drm/nouveau/disp/dp: fix some tx_pu mishandling
We only need to mask 0x0f on GM2xx, and want to keep the higher bits on
earlier cards.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:05 +10:00
Ben Skeggs
f10956d445 drm/nouveau/bios/dp: use alternate set of drvctl values where necessary
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:05 +10:00
Ben Skeggs
7c11c99b3c drm/nouveau/bios/dcb: accept "maxwell" lane count values for dcb 4.0
We previously assumed that the values "2" and "4" were new in DCB 4.1,
however, there's at least one GM107 DCB 4.0 board (Quadro K620) that
uses the newer values.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:04 +10:00
Ilia Mirkin
895fb8e6f7 drm/nouveau/fb/sddr3: add WR/CWL values seen on a GK208
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:04 +10:00
Hans de Goede
0a363e85cd drm/nouveau/nv46: Change mc subdev oclass from nv44 to nv4c
MSI interrupts appear to not work for nv46 based cards. Change the mc
subdev oclass for these cards from nv44 to nv4c, the nv4c mc code is
identical to the nv44 mc code except that it does not use msi
(it does not define a msi_rearm callback).

BugLink: https://bugs.freedesktop.org/show_bug.cgi?id=90435
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:04 +10:00
Samuel Pitoiset
2df0bf57f8 drm/nouveau/pm/gf100: only use PBFB_BROADCAST.PM_UNK100 for PBFB signals
High level hardware events related to PBFB will monitor all partitions.
While we are at it, fix bitfield for this mux.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:04 +10:00
Samuel Pitoiset
8feece04db drm/nouveau/pm/gf100: remove multiple definitions of GPC_DOM signal 0x0e
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:04 +10:00
Samuel Pitoiset
9b4dc66d47 drm/nouveau/pm/gf100: remove undefined TEX.PM_UNKC8 mux
This mux only exists on GF108+ (except for GF110 one), but since it is
not used by the userspace we can drop it for now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:04 +10:00
Samuel Pitoiset
7fe882eb90 drm/nouveau/pm: allow zeroed signals to enable sources
Hardware signals index 0x00 are defined for some domains and they have
to be allowed to enable sources like the others.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:03 +10:00
Samuel Pitoiset
5a23936129 drm/nouveau/pm/nv50: TPC[0x3] must be used for PGRAPH muxs on G80
I thought that using TPC[0x0] like for G84:GT215 was sufficient on G80,
but it's actually not the case. According to NVIDIA PerfKit on Windows,
we have to configure PGRAPH related muxs on TPC[0x3] for this chipset.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:03 +10:00
Samuel Pitoiset
a4650ed9bd drm/nouveau/pm/nv50: fix wrong addr for ZCULL source on G80:GT215
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:03 +10:00
Ilia Mirkin
bacbad17fb drm/nouveau/bios: add opcodes 0x73 and 0x77
No known VBIOSes use these, but they are present in the actual VBIOS
table parsing logic. No harm in adding these too.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:03 +10:00
Alexandre Courbot
970fee29d0 drm/nouveau/platform: recognize GM20B
Allow the platform driver to recognize GM20B.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:02 +10:00
Alexandre Courbot
d10ae27130 drm/nouveau/device: recognize GM20B
Recognize GM20B and assign the right engines and subdevs.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:02 +10:00
Alexandre Courbot
a032fb9da6 drm/nouveau/gr: add GM20B support
Add support for GM20B's graphics engine, based on GK20A. Note that this
code alone will not allow the engine to initialize on released devices
which require PMU-assisted secure boot.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:02 +10:00
Alexandre Courbot
3326060a17 drm/nouveau/fifo: add GM20B fifo
GM20B has a 512-channels FIFO similar to GK104.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:02 +10:00
Alexandre Courbot
c4d0f8f6f8 drm/nouveau/gr/gk20a: use same initialization sequence as nvgpu
GK20A's initialization was based on GK104, but differences exist in the
way the initial context is built and the initialization process itself.

This patch follows the same initialization sequence as nvgpu performs
to avoid bad surprises. Since the register bundles initialization also
differ considerably from GK104, the register packs are now loaded from
firmware files, again similarly to what is done with nvgpu.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:02 +10:00
Alexandre Courbot
8539b37ace drm/nouveau/gr: use NVIDIA-provided external firmwares
NVIDIA will officially start providing GR firmwares through
linux-firmware for GPUs that require it. Change the GR firmware lookup
function to use these files.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:02 +10:00