Commit Graph

1606 Commits

Author SHA1 Message Date
Hiroshi Doyu
3fbf07d80b ARM: dt: tegra30: Rename "smmu" to "iommu"
Use functional name for DT entry instead of h/w name.

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-29 10:59:04 -07:00
Hiroshi Doyu
109269e878 ARM: dt: tegra20: Rename "gart" to "iommu"
Use functional name for DT entry instead of h/w name.

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-29 10:58:58 -07:00
Stephen Warren
abf80c276d ARM: tegra: move serial clock-frequency attr into the Tegra30 dtsi
No Tegra30 Platform is running PLL_P at another rate than 408MHz, nor is
any using any other PLL as UART source clock. Move attribute into SoC
level dtsi file to slim down board DT files.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:09 -07:00
Lucas Stach
bf5fcc76d3 ARM: tegra: Add Toradex Iris carrier board DT with T20 512MB COM
This adds the device tree for the Toradex Iris carrier board used
together with a Colibri T20 512MB COM.

The Iris has the following features, in brackets the current status:
- DVI and VGA output through DVI-I connector (DVI-D enabled and tested)
- LVDS output
- 1 USB host port (enabled and tested)
- 1 USB OTG port (enabled)
- 100 MBit Ethernet (enabled and tested)
- 5 UART ports  (2 on 10way headers enabled and tested)
- 1 MicroSD Slot (enabled and tested)
- Audio connectors (enabled, only HP out and Line-in tested)
- i2c RTC
- GPIO connector (enabled, only sparsely tested)
- external i2c bus
- 4 PWM out
- analog in

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:09 -07:00
Lucas Stach
fc9c713a62 ARM: tegra: Add Colibri T20 512MB COM device tree
This adds the device tree include file for the Toradex Colibri T20
Computer on Module (COM). It's only valid for the 512MB RAM version of
the module, as the 256MB version needs different EMC tables and flash
configuration. To make this clear the suffix -512 was added to the board
compatible string.

The Colibri T20 uses a Tegra20 SoC and has onboard USB Ethernet and AC97
sound.

Still some things like onboard NAND support missing, but should be a
good base for further development.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:09 -07:00
Lucas Stach
ab343e91aa ARM: tegra: move serial clock-frequency attr into the Tegra20 dtsi
No Tegra20 Platform is running PLL_P at another rate than 216MHz, nor is
any using any other PLL as UART source clock. Move attribute into SoC
level dtsi file to slim down board DT files.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:09 -07:00
Laxman Dewangan
c0967ce0a7 ARM: tegra: harmony: enable keyboard in DT
Enable Tegra based keyboard interfacing for keys and provide
all key mapping through DTS file.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:08 -07:00
Laxman Dewangan
3a5c64d6ba ARM: tegra: whistler: enable keyboard in DT
Enable Tegra based keyboard controller and populate the key mapping
for Whistler.

With this patch, HOME, BACK, POWER and MENU keys will work.
Still other keys which are in ROW3 and ROW4 will not work as it
conflicts with KBC pins on SDIO2 pinmux.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:08 -07:00
Laxman Dewangan
ecfd6c7f05 ARM: tegra: cardhu: register UARTC
UARTC is used for the interfacing with bluetooth device.
Register this UART channel as high speed serial channel
so that it can use the APB DMA for data transfer.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:08 -07:00
Laxman Dewangan
beb0e325be ARM: tegra: seaboard: enable keyboard in DT
Enable Tegra based keyboard controller and populate the key matrix for
seaboard. The key matrix was originally on driver code which is removed
to have clean driver. The key mapping is now passed through dts file.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:08 -07:00
Laxman Dewangan
699ed4b94c ARM: tegra: add DT entry for KBC controller
NVIDIA's Tegra SoCs have the matrix keyboard controller which
supports 16x8 type of matrix. The number of rows and columns
are configurable.

Add DT entry for KBC controller.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
[swarren: added clocks property]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:08 -07:00
Stephen Warren
bb2c1de9ff ARM: tegra: swap cache-/interrupt-ctrlr nodes in DT
This ensures nodes are sorted in order of reg address. This makes it
easier to compare against e.g. the U-Boot device trees, and is simply
consistent and clean.

While we're at it, remove the unit address from the cache-controller
node name, since it's unique without it.

Reported-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:08 -07:00
Lucas Stach
0698ed1986 ASoC: tegra: add ac97 host controller to device tree
Add default entry for the AC97 host controller.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:08 -07:00
Bryan Wu
d7df69fe25 ARM: DT: tegra: Add Tegra30 Beaver board support
This patch adds support for Tegra30 Beaver board in upstream kernel.

Beaver board is a Tegra30 SoC based development board, it has
following features:
 - T30 or T33 SoC (Qual core ARM Cortex A9)
 - 2 GB DDR3L
 - 16 GB EMMC
 - 1 SD slot
 - 1 USB Standart A port and 1 USB micro AB port
 - PCI-E Gig Ethernet
 - Audio input/output
 - SATA port
 - HDMI output
 - UART and JTAG

Signed-off-by: Bryan Wu <pengw@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:07 -07:00
Stephen Warren
11a3c868f9 ARM: tegra: paz00: enable HDMI port
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:07 -07:00
Stephen Warren
97d5520f93 ARM: tegra: ventana: enable HDMI port
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:07 -07:00
Stephen Warren
a75191e6b4 ARM: tegra: seaboard: enable HDMI port
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:07 -07:00
Stephen Warren
bff1ea70e7 ARM: tegra: trimslice: add gpio-poweroff node to DT
... and disable tri-state from the pingroup that contains the poweroff
GPIO.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:07 -07:00
Bryan Wu
8fef5dffde ARM: DT: tegra: Unify the description of Tegra20 boards
Use engineering name 'Tegra20' instead of 'Tegra2'

Signed-off-by: Bryan Wu <pengw@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:06 -07:00
Laxman Dewangan
b6551bb933 ARM: tegra: dts: add aliases and DMA requestor for serial controller
Add APB DMA requestor and serial aliases for serial controller.
There will be two serial driver i.e. 8250 based simple serial driver
and APB DMA based serial driver for higher baudrate and performace.

The simple serial driver get enabled with compatible nvidia,tegra20-uart
and APB DMA based driver will get enabled with compatible
nvidia,tegra20-hsuart.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:06 -07:00
Laxman Dewangan
35f210eca0 ARM: tegra30: tegra30 gpio is not compatible with tegra20 gpio
tegra30 gpio controller is not compatible with the tegra20 due to
their bank stride i.e. Tegra20 bank stride is 0x80 where Tegra30
bank stride is 0x100.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
[swarren: fixed typo syntax error]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:06 -07:00
Hiroshi Doyu
9f19cbef99 ARM: dt: tegra114: Add new board, Pluto
Add a new evaluation board, Pluto for Tegra 114 family.

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:23:11 -07:00
Hiroshi Doyu
a71c03e7fd ARM: dt: tegra114: Add new board, Dalmore
Add a new evaluation board, Dalmore for Tegra 114 family.

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:23:08 -07:00
Hiroshi Doyu
18a4df7051 ARM: dt: tegra114: Add new SoC base, Tegra114 SoC
Initial support for Tegra 114 SoC. This is expected to be included in
the board DTS files, Tegra 114 SoC based evaluation board family.

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:23:05 -07:00
Stephen Warren
ee05948517 Merge branch 'for-3.9/scu-base-rework' into for-3.9/soc-t114
Conflicts:
	arch/arm/mach-tegra/platsmp.c
2013-01-28 11:22:46 -07:00
Stephen Warren
540fc9d971 ARM: tegra: add clocks properties to USB PHY nodes
The patch to add USB PHY nodes to device tree was written before Tegra
supported the clocks property in device tree. Now that it does, add the
required clocks properties to these nodes.

This will allow all clk_get_sys() calls in tegra_usb_phy.c to be replaced
by clk_get(phy->dev, clock_name), as part of converting the PHY driver to
a platform driver.

Acked-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:20:05 -07:00
Venu Byravarasu
e374b65c9b ARM: tegra: add DT nodes for Tegra USB PHY
Add DT nodes for Tegra USB PHY along with related documentation.
Also added a phandle property to controller DT node, for referring
to connected PHY instance.

Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:20:05 -07:00
Venu Byravarasu
b4e074788a ARM: tegra: Add new DT property to USB node.
As Tegra USB host driver is using instance number for resetting
PORT0 twice, adding a new DT property for handling this.

Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:20:05 -07:00
Prashant Gaikwad
d409b3af89 ARM: tegra: paz00: add clock information to DT
Add clock i2c clock information to device node.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:19:33 -07:00
Prashant Gaikwad
1cbc733d1e ARM: tegra: add clock properties to Tegra30 DT
Add clock information to device nodes.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: added second clock to 3d node]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:19:33 -07:00
Prashant Gaikwad
8d8b43dae3 ARM: tegra: add clock properties to Tegra20 DT
Add clock information to device nodes.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:19:33 -07:00
Prashant Gaikwad
9598566721 ARM: tegra: define Tegra30 CAR binding
The device tree binding models Tegra30 CAR (Clock And Reset)
as a single monolithic clock provider.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: fixed typo in binding doc]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:19:07 -07:00
Stephen Warren
270f8ce312 ARM: tegra: define Tegra20 CAR binding
The Tegra20 CAR (Clock And Reset) Controller controls most aspects of
most clocks within Tegra20. The device tree binding models this as a
single monolithic clock provider, which exports many clocks. This reduces
the number of nodes needed in device tree to represent these clocks.

This binding is only useful for Tegra20; the set of clocks that exists on
Tegra30 is sufficiently different to merit its own binding.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
[pgaikwad: Added mux clk ids and sorted CAR node]
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:19:06 -07:00
Hiroshi Doyu
7d19a34a89 ARM: tegra: Add CPU nodes to Tegra30 device tree
Add CPU node for Tegra30.

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 10:40:49 -07:00
Hiroshi Doyu
4dd2bd3736 ARM: tegra: Add CPU nodes to Tegra20 device tree
Add CPU node for Tegra20.

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 10:40:41 -07:00
Linus Torvalds
974b33586b ARM: arm-soc fixes for 3.8-rc
People are back from the holiday breaks, and it shows. Here are a bunch of
 fixes for a number of platforms:
  - A couple of small fixes for Nomadik
  - A larger set of changes for kirkwood/mvebu
    - uart driver selection, dt clocks, gpio-poweroff fixups,
      a few __init annotation fixes and some error handling improvement
      in their xor dma driver.
  - i.MX had a couple of minor fixes (and a critical one for flexcan2
    clock setup)
  - MXS has a small board fix and a framebuffer bugfix
  - A set of fixes for Samsung Exynos, fixing default bootargs and some
    Exynos5440 clock issues
  - A set of OMAP changes including PM fixes and a few sparse warning
    fixups
 
 All in all a bit more positive code delta than we'd ideally want to see
 here, mostly from the OMAP PM changes, but nothing overly crazy.
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Merge tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "People are back from the holiday breaks, and it shows.  Here are a
  bunch of fixes for a number of platforms:
   - A couple of small fixes for Nomadik
   - A larger set of changes for kirkwood/mvebu
     - uart driver selection, dt clocks, gpio-poweroff fixups, a few
       __init annotation fixes and some error handling improvement in
       their xor dma driver.
   - i.MX had a couple of minor fixes (and a critical one for flexcan2
     clock setup)
   - MXS has a small board fix and a framebuffer bugfix
   - A set of fixes for Samsung Exynos, fixing default bootargs and some
     Exynos5440 clock issues
   - A set of OMAP changes including PM fixes and a few sparse warning
     fixups

  All in all a bit more positive code delta than we'd ideally want to
  see here, mostly from the OMAP PM changes, but nothing overly crazy."

* tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (44 commits)
  ARM: clps711x: Fix bad merge of clockevents setup
  ARM: highbank: save and restore L2 cache and GIC on suspend
  ARM: highbank: add a power request clear
  ARM: highbank: fix secondary boot and hotplug
  ARM: highbank: fix typos with hignbank in power request functions
  ARM: dts: fix highbank cpu mpidr values
  ARM: dts: add device_type prop to cpu nodes on Calxeda platforms
  ARM: mx5: Fix MX53 flexcan2 clock
  ARM: OMAP2+: am33xx-hwmod: Fix wrongly terminated am33xx_usbss_mpu_irqs array
  pinctrl: mvebu: make pdma clock on dove mandatory
  ARM: Dove: Add pinctrl clock to DT
  dma: mv_xor: fix error handling for clocks
  dma: mv_xor: fix error handling of mv_xor_channel_add()
  arm: mvebu: Add missing ; for cpu node.
  arm: mvebu: Armada XP MV78230 has only three Ethernet interfaces
  arm: mvebu: Armada XP MV78230 has two cores, not one
  clk: mvebu: Remove inappropriate __init tagging
  ARM: Kirkwood: Use fixed-regulator instead of board gpio call
  ARM: Kirkwood: Fix missing sdio clock
  ARM: Kirkwood: Switch TWSI1 of 88f6282 to DT clock providers
  ...
2013-01-08 18:53:56 -08:00
Olof Johansson
2f64a8d7b2 Merge branch 'v3.8-samsung-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes
From Kukjin Kim:
Most of them are EXYNOS5440 fixes which are for changing uart console,
cpu id (typo)  and silent complaining gpio error in kernel boot.

* 'v3.8-samsung-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: EXYNOS: skip the clock initialization for exynos5440
  ARM: EXYNOS: enable PINCTRL for EXYNOS5440
  ARM: dts: use uart port1 for console on exynos4210-smdkv310
  ARM: dts: use uart port0 for console on exynos5440-ssdk5440
  ARM: SAMSUNG: fix the cpu id for EXYNOS5440
  ARM: EXYNOS: Revise HDMI resource size
2013-01-08 09:42:52 -08:00
Olof Johansson
5595e755b6 I have to send one critical mxsfb fix through arm-soc, as FB maintainer
is unresponsive for quite a while.  People start complaining the missing
 of such an important fix.
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Merge tag 'mxs-fixes-3.8' of git://git.linaro.org/people/shawnguo/linux-2.6 into fixes

From Shawn Guo:
I have to send one critical mxsfb fix through arm-soc, as FB maintainer
is unresponsive for quite a while.  People start complaining the missing
of such an important fix.

* tag 'mxs-fixes-3.8' of git://git.linaro.org/people/shawnguo/linux-2.6:
  video: mxsfb: fix crash when unblanking the display
  ARM: dts: imx23-olinuxino: Fix IOMUX settings
2013-01-08 08:39:27 -08:00
Olof Johansson
2d9e02cad6 It includes one critical fix - wrong flexcan2 clock will hang system
when the port gets brought up.  The other two are non-critical fixes,
 which are sent together here, since it's still early -rc stage.
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Merge tag 'imx-fixes-3.8' of git://git.linaro.org/people/shawnguo/linux-2.6 into fixes

From Shawn Guo:

It includes one critical fix - wrong flexcan2 clock will hang system
when the port gets brought up.  The other two are non-critical fixes,
which are sent together here, since it's still early -rc stage.

* tag 'imx-fixes-3.8' of git://git.linaro.org/people/shawnguo/linux-2.6:
  ARM: mx5: Fix MX53 flexcan2 clock
  ARM: dts: imx31-bug: Fix manufacturer compatible string
  clk: imx: Remove 'clock-output-names' from the examples
2013-01-08 08:39:00 -08:00
Olof Johansson
5cf87a12ca fixes for mvebu/kirkwood v3.8
- use correct uart driver for mvebu boards
  - add a missing DT clocks
  - gpio-poweroff level vs. edge triggering, use gpio_is_valid()
  - remove an inappropriate __init, modules need to access function.
  - various DT fixes
  - error handling in mv_xor
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Merge tag 'mvebu_fixes_for_v3.8' of git://git.infradead.org/users/jcooper/linux into fixes

From Jason Cooper:

fixes for mvebu/kirkwood v3.8
 - use correct uart driver for mvebu boards
 - add a missing DT clocks
 - gpio-poweroff level vs. edge triggering, use gpio_is_valid()
 - remove an inappropriate __init, modules need to access function.
 - various DT fixes
 - error handling in mv_xor

* tag 'mvebu_fixes_for_v3.8' of git://git.infradead.org/users/jcooper/linux:
  pinctrl: mvebu: make pdma clock on dove mandatory
  ARM: Dove: Add pinctrl clock to DT
  dma: mv_xor: fix error handling for clocks
  dma: mv_xor: fix error handling of mv_xor_channel_add()
  arm: mvebu: Add missing ; for cpu node.
  arm: mvebu: Armada XP MV78230 has only three Ethernet interfaces
  arm: mvebu: Armada XP MV78230 has two cores, not one
  clk: mvebu: Remove inappropriate __init tagging
  ARM: Kirkwood: Use fixed-regulator instead of board gpio call
  ARM: Kirkwood: Fix missing sdio clock
  ARM: Kirkwood: Switch TWSI1 of 88f6282 to DT clock providers
  Power: gpio-poweroff: Fix documentation and gpio_is_valid
  ARM: Kirkwood: Fix missing clk for USB device.
  arm: mvebu: Use dw-apb-uart instead of ns16650 as UART driver

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-01-07 21:11:12 -08:00
Rob Herring
3943deedda ARM: dts: fix highbank cpu mpidr values
With the addition of commit a0ae0240 (ARM: kernel: add device tree init
map function), the cpu reg values must match the cpu mpidr register or we'll
get warnings. For some reason, the CLUSTERID on highbank is 9, so the reg
value needs to be 0x90n to quiet the warnings.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-01-07 21:08:23 -08:00
Rob Herring
36ff67bc94 ARM: dts: add device_type prop to cpu nodes on Calxeda platforms
While device_type is considered deprecated, it is still needed for tools
like lshw to identify cpu nodes.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-01-07 21:08:23 -08:00
Marek Vasut
e37f0d5b32 ARM: mx5: Fix MX53 flexcan2 clock
The second FlexCAN port uses different clock than the first one, configure
correct clock to prevent hanging of the system during bringing up of the port.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-01-08 08:53:07 +08:00
Sebastian Hesselbarth
db7d77e6a7 ARM: Dove: Add pinctrl clock to DT
During merge of the mvebu patches a clock gate for pinctrl was
lost. This patch just readds the clock gate.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-01-07 16:18:57 +00:00
Andrew Lunn
41be8dc1a4 arm: mvebu: Add missing ; for cpu node.
The Armada XP MV78230 DT include file is missing a ; at the
end of the cpu node.

Reported-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-01-06 17:53:22 +00:00
Thomas Petazzoni
77916519cb arm: mvebu: Armada XP MV78230 has only three Ethernet interfaces
We originally thought that the MV78230 variant of the Armada XP had
four Ethernet interfaces, like the other variants MV78260 and
MV78460. In fact, this is not true, and the MV78230 has only three
Ethernet interfaces.

So, the definitions of the Ethernet interfaces is now done as follows:

 * armada-370-xp.dtsi: definitions of the first two interfaces, that
   are common to Armada 370 and Armada XP

 * armada-xp.dtsi: definition of the third interface, common to all
   Armada XP variants.

 * armada-xp-mv78260.dtsi and armada-xp-mv78460.dtsi: definition of
   the fourth interface.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-01-06 17:53:19 +00:00
Thomas Petazzoni
44cfae9ac6 arm: mvebu: Armada XP MV78230 has two cores, not one
Contrary to our understanding at the time armada-xp-mv78230.dtsi was
written, the MV78230 variant of the Armada XP SoC has two cores and
not one. This patch updates the .dtsi file to take into account this
reality.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-01-06 17:53:16 +00:00
Andrew Lunn
8758c885c4 ARM: Kirkwood: Use fixed-regulator instead of board gpio call
With the change to a DT based pinctrl/gpio driver, using gpio API
calls in board-*.c files no longer works, a dereferenced NULL pointer
exception occurs instead. By converting the GPIO code into a
fixed-regulator which gets probed later once pinctrl/gpio is
available, we avoid the exception.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Stefan Peter <s.peter@mplch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-01-06 17:53:10 +00:00
Nobuhiro Iwamatsu
107c21c346 ARM: Kirkwood: Switch TWSI1 of 88f6282 to DT clock providers
Clock Management of kirkwood has moved to DT clock providers.
However, TWSI1 has not yet been done.
This switches TWSI1 of 88f6282 to DT clock providers.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-01-06 17:53:04 +00:00
Andrew Lunn
53dfa8e4aa ARM: Kirkwood: Fix missing clk for USB device.
Without the clock being held by a driver, it gets turned off at a bad
time causing the SoC to lockup. This is often during reboot.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Stefan Peter <s.peter@mpl.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-01-06 17:52:56 +00:00