Commit Graph

400636 Commits

Author SHA1 Message Date
Alex Deucher
b188025888 drm/radeon/audio: write audio/video latency info for DCE6/8
Needed by the hda driver to properly set up synchronization
on the audio side.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2013-11-01 12:43:20 -04:00
Alex Deucher
712fd8a2cd drm/radeon/audio: write audio/video latency info for DCE4/5
Needed by the hda driver to properly set up synchronization
on the audio side.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2013-11-01 12:43:19 -04:00
Alex Deucher
8a992ee145 drm/radeon/audio: break out of loops once we match connector
No need to continue with the loops once we've matched
the appropriate connector.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01 12:43:19 -04:00
Alex Deucher
4039096199 drm/radeon/atom: don't call [EN|DIS]ABLE_OUTPUT on DCE4.x
The plain [EN|DIS]ABLE functions do the same thing and more
and aren't broken on some systems like [EN|DIS]ABLE_OUTPUT.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01 12:43:18 -04:00
Alex Deucher
43a340262a drm/radeon/atom: don't call [EN|DIS]ABLE_OUTPUT on DCE3.x
The plain [EN|DIS]ABLE functions do the same thing and more
and aren't broken on some systems like [EN|DIS]ABLE_OUTPUT.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01 12:43:18 -04:00
Alex Deucher
4573388c92 drm/radeon/si: tell dpm there is a display connected
On SI asics, the SMC will automatically force the performance
level to the lowest level if there are no displays active.  This
prevents automatic performance scaling on PowerXpress systems or
for offscreen rendering or compute when displays are disabled.

Going forward, it would be best to dynamically change this, but
for now leave scaling enabled.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=69395

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01 12:43:17 -04:00
Alex Deucher
c9dbd70552 drm/radeon: implement blit copy callback for CIK
Uses the CP ring rather than the DMA ring.  Useful
for debugging and benchmarking.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01 12:43:16 -04:00
Dan Carpenter
43e917251a drm/radeon/dpm: cleanup a type issue with rv6xx_clocks_per_unit()
The rv6xx_clocks_per_unit() function pretends it can set flags in a u64
bitfield but really because "1" is an int it doesn't work for more than
32 bits.  The only caller truncates the high bits away anyway.  I've
just changed it to be a u32.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01 12:43:16 -04:00
Alex Deucher
5c72273913 drm/radeon: plug in blit copy routine for SI
Uses CP DMA packet just like previous asics.
Useful for debugging and benchmarking.  Uses
same packet format as prior asics.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01 12:43:15 -04:00
Alex Deucher
ad41550666 drm/radeon: enable hdmi audio by default
Seems to be stable enough for the majority of users.
It can be disabled on the fly via connector attributes.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01 12:43:15 -04:00
Dave Airlie
10ebc0bc09 drm/radeon: add runtime PM support (v2)
This hooks radeon up to the runtime PM system to enable
dynamic power management for secondary GPUs in switchable
and powerxpress laptops.

v2: agd5f: clean up, add module parameter

Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01 12:43:14 -04:00
Dave Airlie
7473e830c4 drm/radeon: convert to pmops
This is a pre-requisite for runtime pm on powerxpress systems.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01 12:43:14 -04:00
Alex Deucher
6214bb7487 drm/radeon: add a connector property for dither
Allows you to enable dither in the display hardware
when the monitor supports lower a lower bpc than the
current framebuffer format.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01 12:43:13 -04:00
Alex Deucher
134b480f4b drm/radeon: Add support for programming the FMT blocks
The FMT blocks control how data is sent from the backend
of the display pipe to to monitor.  Proper set up of the
FMT blocks are required for 30bpp formats.  Additionally,
dithering can be enabled on for better display with 18 and
24bpp displays.  The exception is LVDS/eDP which atom
takes care of in the SelectCRTC_Source table.  For now
just enable truncation until we test dithering more.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01 12:43:12 -04:00
Thierry Reding
977386a04b drm/tegra: Reserve syncpoint base for gr3d
Request a syncpoint base to be associated with the gr3d syncpoint.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:49 +01:00
Arto Merilainen
61644dc7df drm/tegra: Reserve base for gr2d
This patch modifies the gr2d to reserve a base for syncpoint.

Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:48 +01:00
Arto Merilainen
c54a169b52 drm/tegra: Deliver syncpoint base to user space
This patch adds a separate ioctl for delivering syncpoint base number
to user space. If the syncpoint does not have an associated base, the
function returns -ENXIO.

Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:48 +01:00
Arto Merilainen
f5a954fed9 gpu: host1x: Add syncpoint base support
This patch adds support for hardware syncpoint bases. This creates
a simple mechanism to stall the command FIFO until an operation is
completed.

Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:48 +01:00
Arto Merilainen
8736fe8153 gpu: host1x: Add 'flags' field to syncpt request
Functions host1x_syncpt_request() and _host1x_syncpt_alloc() have
been taking a separate boolean flag ('client_managed') for indicating
if the syncpoint value should be tracked by the host1x driver.

This patch converts the field into generic 'flags' field so that
we can easily add more information while requesting a syncpoint.
Clients are adapted to use the new interface accordingly.

Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:47 +01:00
Wei Yongjun
b0084031f2 drm/tegra: Disable clock on probe failure
Add a missing clk_disable_unprepare() before returning from the driver's
.probe() function on error.

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:47 +01:00
Wei Yongjun
9c78c4c38e gpu: host1x: Disable clock on probe failure
Add a missing clk_disable_unprepare() before returning from the driver's
.probe() function on error.

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:46 +01:00
Thierry Reding
db7fbdfd25 drm/tegra: Support bottom-up buffer objects
The gr3d engine renders images bottom-up. Allow buffers that are used
for 3D content to be marked as such and implement support in the display
controller to present them properly.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:46 +01:00
Thierry Reding
773af77fc4 drm/tegra: Add support for tiled buffer objects
The gr2d and gr3d engines work more efficiently on buffers with a tiled
memory layout. Allow created buffers to be marked as tiled so that the
display controller can scan them out properly.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:46 +01:00
Thierry Reding
5f60ed0d84 drm/tegra: Add 3D support
Initialize and power the 3D unit on Tegra20, Tegra30 and Tegra114 and
register a channel with the Tegra DRM driver so that the unit can be
used from userspace.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:45 +01:00
Thierry Reding
c40f0f1afc drm/tegra: Introduce tegra_drm_submit()
Command stream submissions are the same across all devices that expose
a channel to userspace, so move the code into a generic function.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:45 +01:00
Thierry Reding
497c56a581 drm/tegra: Use symbolic names for gr2d registers
Instead of using magic numbers for the registers which contain memory
addresses in the firewall table, using symbolic names.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:44 +01:00
Thierry Reding
f8c3325584 drm/tegra: Start connectors with correct DPMS mode
A connector's DPMS mode isn't initialized by default, therefore using a
default of 0 (DRM_MODE_DPMS_ON). This can cause problems in that the DRM
core won't explicitly turn on a connector because it thinks that it is
already on.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:44 +01:00
Mikko Perttunen
18ebc0f404 drm/tegra: hdmi: Enable VDD earlier for hotplug/DDC
The VDD regulator used to be enabled only at tegra_output_hdmi_enable,
which is called after a sink is detected. However, the HDMI hotplug pin
works by returning the voltage supplied by the VDD pin, so this meant
that the hotplug pin was never asserted and the sink was not detected
unless the VDD regulator was set to be always on.

This patch moves the enable to the tegra_hdmi_init() function to make
sure the regulator will get enabled and therefore ensure proper hotplug
detection.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:44 +01:00
Thierry Reding
ef284c7549 drm/tegra: hdmi: Fix build warnings
These seem to show up when building for architectures other than ARM,
which I guess will never happen. The reason why the kbuild test bot ran
into these was a missing dependency which has hence been fixed. Still it
doesn't hurt to fix them anyway.

Reported-by: kbuild test bot <fengguang.wu@intel.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:43 +01:00
Mikko Perttunen
9f1591231a drm/tegra: hdmi: Detect DVI-only displays
Use EDID data to determine whether the display supports HDMI or DVI
only. The HDMI output used to assume to be connected to HDMI displays,
but that broke support for DVI displays that don't understand the
interspersed audio/other data.

To be on the safe side, default to DVI if no EDID data is available.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
[treding@nvidia.com: move detection to separate function]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:43 +01:00
Mikko Perttunen
7d1d28aca0 drm/tegra: Add Tegra114 HDMI support
Tegra114 TMDS configuration requires a new peak_current field and the
driver current override bit has changed position.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:42 +01:00
Thierry Reding
59af0595f4 drm/tegra: hdmi: Parameterize based on compatible property
Use a structure to parameterize the code to handle differences between
the HDMI hardware on various SoC generations. This removes the need to
clutter the code with checks for individual compatible values.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:42 +01:00
Thierry Reding
f27db9615a drm/tegra: hdmi: Rename tegra{2,3} to tegra{20,30}
Everything related to Tegra uses Tegra20 and Tegra30 instead of Tegra2
and Tegra3, respectively. Rename the TMDS arrays in the HDMI driver for
consistency.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:42 +01:00
Thierry Reding
5407f31bd3 gpu: host1x: Add support for Tegra114
Tegra114 uses a slightly updated version of host1x with an additional
syncpoint.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:41 +01:00
Thierry Reding
59d29c0ec9 drm/tegra: Allocate resources at probe time
Since the .init() and .exit() functions are executed whenever the DRM
driver is loaded or unloaded, care must be taken not to use them for
resource allocation. Otherwise deferred probing cannot be used, since
the .init() and .exit() are not run at probe time. Similarly the code
that frees resources must be run at .remove() time. If it is run from
the .exit() function, it can release resources multiple times.

To handle this more consistently, rename the tegra_output_parse_dt()
function to tegra_output_probe() and introduce tegra_output_remove()
which can be used to free output-related resources.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:41 +01:00
Thierry Reding
f002abc19a drm/tegra: Properly cleanup and zero out resources
When the DRM driver is unloaded, all the associated resources must be
cleaned up and zeroed out. This is necessary because of the architecture
of the Tegra DRM driver, where not all subdrivers are unloaded along
with the DRM driver. Therefore device-managed managed won't be freed and
memory cannot be assumed to have been cleared (because it hasn't been
reallocated using kzalloc()) by the time the DRM driver is reloaded. It
is therefore necessary to zero out the structures to prevent strange
errors (such as slab corruptions) from occurring.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:40 +01:00
Thierry Reding
dee8268f8f drm/tegra: Move driver to DRM tree
In order to make subsystem-wide changes easier, move the Tegra DRM
driver back into the DRM tree.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:40 +01:00
Thierry Reding
fc3be3e8fc gpu: host1x: Use relative include paths
This is slightly safer than adding -Idrivers/gpu/host1x to cflags-y.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:40 +01:00
Thierry Reding
776dc38403 drm/tegra: Move subdevice infrastructure to host1x
The Tegra DRM driver currently uses some infrastructure to defer the DRM
core initialization until all required devices have registered. The same
infrastructure can potentially be used by any other driver that requires
more than a single sub-device of the host1x module.

Make the infrastructure more generic and keep only the DRM specific code
in the DRM part of the driver. Eventually this will make it easy to move
the DRM driver part back to the DRM subsystem.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:55:33 +01:00
Thierry Reding
35d747a81d gpu: host1x: Expose syncpt and channel functionality
Expose the buffer objects, syncpoint and channel functionality in the
public public header so that drivers can use them.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:11 +01:00
Thierry Reding
53fa7f7204 drm/tegra: Introduce tegra_drm_client structure
This structure derives from host1x_client. DRM-specific fields are moved
from host1x_client to this structure, so that host1x_client can remain
agnostic of DRM.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:10 +01:00
Thierry Reding
e1e906448d gpu: host1x: Make host1x header file public
In preparation to support host1x clients other than DRM, move this
header into a public location.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:10 +01:00
Thierry Reding
3be8274341 drm/tegra: gem: Miscellaneous cleanups
Rename the host1x_to_drm_bo() macro to host1x_to_tegra_bo() for
consistency and fixup various stylistic issues.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:10 +01:00
Thierry Reding
a137ce3438 drm/tegra: Rename gr2d to tegra-gr2d
Other drivers use the tegra- prefix in their names, so add it to this
driver's name as well for consistency.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:09 +01:00
Thierry Reding
c1bef81fe7 drm/tegra: gr2d: Miscellaneous cleanups
Rework the address table code for the host1x firewall. The previous
implementation allocated a bitfield but didn't check for a valid pointer
so it could potentially crash. Instead, embed a static bitmap within the
gr2d structure to avoid the allocation and use the Linux bitmap API to
reduce code complexity.

Don't annotate the driver's .remove() function __exit. Even if built in
the driver can be unloaded via sysfs, so .remove() needs to stick around
after initialization. Also remove the explicit initialization of the
driver's .owner field to THIS_MODULE because that's now handled by the
driver core.

Furthermore make an error message more consistent with other subdrivers,
index the syncpts array for better readability, remove a gratuituous
newline and reorder some variable declarations to make the code easier
to read.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:09 +01:00
Thierry Reding
d77563ff56 gpu: host1x: firewall: Refactor register check
The same code sequence is used in various places to validate a register
access in the command stream. This can be refactored into a separate
function.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:08 +01:00
Thierry Reding
d7fbcf477a gpu: host1x: firewall: Rename cmdbuf_id -> cmdbuf
The value stored in this field is a pointer to a command buffer, not an
ID. Avoid some confusion by reflecting that in the field's name.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:08 +01:00
Thierry Reding
37857cd2c5 gpu: host1x: Fix alignment of function arguments
Arguments on subsequent lines should be aligned with the first argument.
This one occurrence went unnoticed during code review.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:08 +01:00
Thierry Reding
452e7f0cda gpu: host1x: Do not discard .remove()
The device can be unbound from the driver via sysfs, so regardless of
whether the driver is builtin or a module, its .remove() function needs
to stick around.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:07 +01:00
Thierry Reding
9eb9b220fc gpu: host1x: Cleanup includes
Most of the included files are either not required or already included
by some other header file.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31 09:20:07 +01:00