In some cases when firmware is busy or updating, some mailbox commands
still timeout on some newer CPUs. To fix this issue, change how we
process timeout.
With this change, replaced timeout from using simple count with real
timeout in micro-seconds using ktime. When the command response takes
more than average processing time, yield to other tasks. The worst case
timeout is extended upto 1 milli-second.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Link: https://lore.kernel.org/r/20210330220840.3113959-1-srinivas.pandruvada@linux.intel.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Fix the following sparse warnings:
drivers/platform/x86/intel_speed_select_if/isst_if_mmio.c:23:24: warning: symbol 'mmio_range_devid_0' was not declared. Should it be static?
drivers/platform/x86/intel_speed_select_if/isst_if_mmio.c:28:24: warning: symbol 'mmio_range_devid_1' was not declared. Should it be static?
Signed-off-by: Zou Wei <zou_wei@huawei.com>
Link: https://lore.kernel.org/r/1607430489-116200-1-git-send-email-zou_wei@huawei.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
The mmio offset range can be different based on the PCI device id. Here
for INTEL_RAPL_PRIO_DEVID_1, the range is increased from 45 to 64. Pass
the range as the driver_data. Also account for different ranges during
save/restore via suspend/resume callbacks.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Link: https://lore.kernel.org/r/20201204015746.1168941-2-srinivas.pandruvada@linux.intel.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Added new PCI device ids for supporting mailbox and MMIO interface for
Sapphire Rapids.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Fix timeout issue on some Ice Lake servers, where mail box command is
timing out before the response,
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* Fix for improper handling of fan_boost_mode in sysfs for ASUS laptops.
* On newer ASUS laptops the 1st battery is named differently, here is a fix.
* Fix Lex 2I385SW to allow both network cards to be used.
* The power integrated circuit driver for Surface 3 has been added.
* Refactor and clean up of Intel PMC driver and enable it on Intel Jasper Lake.
* Clean up of Dell RBU driver.
* Big update for Intel Speed Select technology support tool and driver.
The following is an automated git shortlog grouped by driver:
asus-wmi:
- Support laptops where the first battery is named BATT
- Fix return value of fan_boost_mode_store
dell_rbu:
- Unify format of the printed messages
- Use max_t() to get rid of casting
- Simplify cleanup code in create_packet()
- don't open code list_for_each_entry*()
- Use sysfs_create_group() API
GPD pocket fan:
- Fix error message when temp-limits are out of range
i2c-multi-instantiate:
- Replace zero-length array with flexible-array member
intel-hid:
- Move MODULE_DEVICE_TABLE() closer to the table
intel_pmc_core:
- Make pmc_core_substate_res_show() generic
- Make pmc_core_lpm_display() generic for platforms that support sub-states
- Add slp_s0_offset attribute back to tgl_reg_map
- Remove duplicate 'if' to create debugfs entry
- Relocate pmc_core_*_display() to outside of CONFIG_DEBUG_FS
- Add debugfs support to access live status registers
- Dump low power status registers on an S0ix.y failure
- Add an additional parameter to pmc_core_lpm_display()
- Remove slp_s0 attributes from tgl_reg_map
- Refactor the driver by removing redundant code
- Add debugfs entry for low power mode status registers
- Add debugfs entry to access sub-state residencies
- Add Atom based Jasper Lake (JSL) platform support
intel-vbtn:
- Move MODULE_DEVICE_TABLE() closer to the table
ISST:
- Fix wrong unregister type
PDx86:
- Kconfig: Fix a typo
- Kconfig: Group modules by companies and functions
- MAINTAINERS: Sort entries in database for PDx86
- Makefile: Group modules by companies and functions
platform/x86/intel-uncore-freq:
- Add release callback
- Fix static checker issue and potential race condition
pmc_atom:
- Add Lex 2I385SW to critclk_systems DMI table
sony-laptop:
- Use scnprintf() for avoiding potential buffer overflow
surface3_power:
- Fix always true condition in mshw0011_space_handler()
- Fix Kconfig section ordering
- Add missed headers
- Reformat GUID assignment
- Drop useless macro ACPI_PTR()
- Prefix POLL_INTERVAL with SURFACE_3
- Simplify mshw0011_adp_psr() to one liner
- Use dev_err() instead of pr_err()
- Drop unused structure definition
- MSHW0011 rev-eng implementation
tools/power/x86/intel-speed-select:
- Fix a typo in error message
- Update version
- Avoid duplicate Package strings for json
- Add display for enabled cpus count
- Print friendly warning for bad command line
- Fix avx options for turbo-freq feature
- Improve CLX commands
- Show error for invalid CPUs in the options
- Improve core-power result and error display
- Kernel interface error handling
- Improve error display for turbo-freq feature
- Improve error display for base-freq feature
- Improve output of perf-profile commands
- Enhance help for core-power assoc
- Display error for invalid priority type
- Check feature status first
- Improve error display for perf-profile feature
- Add an API for error/information print
- Enhance --info option
- Enhance help
- Helpful warning for missing kernel interface
- Store topology information
- Max CPU count calculation when CPU0 is offline
- Special handling for CPU 0 online/offline
- Use more verbiage for clos information
- Enhance core-power info command
- Make target CPU optional for core-power info
- Warn for invalid package id
- Fix last cpu number
- Fix mailbox usage for CLOS_PM_QOS_CONFIG
- Avoid duplicate names for json parsing
- Fix display for turbo-freq auto mode
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEqaflIX74DDDzMJJtb7wzTHR8rCgFAl6DMoEACgkQb7wzTHR8
rChW3w//WgzlhbKCl3EO8WjfSGmQHwszLq/Zcj+LLzoPQOl7t1nel1cEIWv7Y4+P
/I24l2pqAD2JRgs03hNDg9i/YovPuqhLtS7t7hDNKFfNGdOhIJQkMwhrjXcapbBj
UgE5cFbzXjf4400Tv1EkOylIZhOlpTmv5eGk/Dbw+5adTOlTH3MYLntv8ZfBulOh
A6Dolto+zPvrbCyrMrgJSpQRIx1Rd8JV3YDXQRTpimmdsTJ7VFC55i1RLJSQ5sGw
rF2qAekMExKScezSV8Yy9npDGJ1qUolhj/PciLPr71rmIuWqfdqc8eLeLmsJzIfY
WO4TIQ3CTTY1FlZsOZyoeh+Kla//hRyaUoHAU0xEWDD9xKJBdzOIMEs4O/islWYL
ILHs7ZdZPrHFI63mxyF0Mw5SgsSG1c6VNa19+H+YxpC4Pp8hbo891RRF7+7hBbdT
YRT5yaQMD2M8QowMgxJQ7Xt3Kyz/jRO/8L59v202v3RzJvJ0UJhT+fmHV6OSz5MD
SLOmLsXcWvgteNxM8TQ5yxmuDJdQVRuJqQpvPhysqlUEyhoTSLsII5evu/U/jXA4
vIx+QfUejDiy0vMeQu2xUOzxIzSzja6gLO6hKgiAw2cvUMqbOi2CIG7qwbRZkIis
uj/GxlwiNfIsEKUE4728ivOHwT9Yke1x+QLl/oVwMh7zSgb+noE=
=G0jF
-----END PGP SIGNATURE-----
Merge tag 'platform-drivers-x86-v5.7-1' of git://git.infradead.org/linux-platform-drivers-x86
Pull x86 platform driver updates from Andy Shevchenko:
- Fix for improper handling of fan_boost_mode in sysfs for ASUS
laptops.
- On newer ASUS laptops the 1st battery is named differently, here is a
fix.
- Fix Lex 2I385SW to allow both network cards to be used.
- The power integrated circuit driver for Surface 3 has been added.
- Refactor and clean up of Intel PMC driver and enable it on Intel
Jasper Lake.
- Clean up of Dell RBU driver.
- Big update for Intel Speed Select technology support tool and driver.
* tag 'platform-drivers-x86-v5.7-1' of git://git.infradead.org/linux-platform-drivers-x86: (75 commits)
platform/x86: surface3_power: Fix always true condition in mshw0011_space_handler()
platform/x86: surface3_power: Fix Kconfig section ordering
platform/x86: surface3_power: Add missed headers
platform/x86: surface3_power: Reformat GUID assignment
platform/x86: surface3_power: Drop useless macro ACPI_PTR()
platform/x86: surface3_power: Prefix POLL_INTERVAL with SURFACE_3
platform/x86: surface3_power: Simplify mshw0011_adp_psr() to one liner
platform/x86: surface3_power: Use dev_err() instead of pr_err()
platform/x86: surface3_power: Drop unused structure definition
platform/x86: surface3_power: MSHW0011 rev-eng implementation
platform/x86: intel_pmc_core: Make pmc_core_substate_res_show() generic
platform/x86: intel_pmc_core: Make pmc_core_lpm_display() generic for platforms that support sub-states
tools/power/x86/intel-speed-select: Fix a typo in error message
tools/power/x86/intel-speed-select: Update version
tools/power/x86/intel-speed-select: Avoid duplicate Package strings for json
tools/power/x86/intel-speed-select: Add display for enabled cpus count
tools/power/x86/intel-speed-select: Print friendly warning for bad command line
tools/power/x86/intel-speed-select: Fix avx options for turbo-freq feature
tools/power/x86/intel-speed-select: Improve CLX commands
tools/power/x86/intel-speed-select: Show error for invalid CPUs in the options
...
The new macro set has a consistent namespace and uses C99 initializers
instead of the grufty C89 ones.
Get rid the of the local macro wrappers for consistency.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Link: https://lkml.kernel.org/r/20200320131509.766573641@linutronix.de
The MMIO driver is not unregistering with the correct type with the ISST
common core during module removal. This should be unregistered with
ISST_IF_DEV_MMIO instead of ISST_IF_DEV_MBOX.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To discover core-power capability, some new mailbox commands are added. Allow
those commands to execute.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Additional Turbo Ratio Limit (TRL) MSRs are required to get bucket vs core
count relationship. So add them to the list of allowed MSRs.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Instead of using to_pci_dev + pci_get_drvdata,
use dev_get_drvdata to make code simpler.
Signed-off-by: Chuhong Yuan <hslester96@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Commands which causes PUNIT writes, store them and restore them on system
resume. The driver stores all such requests in a hash table and stores the
the latest mailbox request parameters. On resume these commands mail box
commands are executed again. There are only 5 such mail box commands which
will trigger such processing so a very low overhead in store and execute
on resume. Also there is no order requirement for mail box commands for
these write/set commands. There is one MSR request for changing turbo
ratio limits, this also stored and get restored on resume and cpu online.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
While using new non arhitectural features using PUNIT Mailbox and MMIO
read/write interface, still there is need to operate using MSRs to
control PUNIT. User space could have used user user-space MSR interface for
this, but when user space MSR access is disabled, then it can't. Here only
limited number of MSRs are allowed using this new interface.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Add an IOCTL to send mailbox commands to PUNIT using PUNIT MSRs for
mailbox. Some CPU models don't have PCI device, so need to use MSRs.
A limited set of mailbox commands can be sent to PUNIT.
This MMIO interface is used by the intel-speed-select tool under
tools/x86/power to enumerate and control Intel Speed Select features.
The MBOX commands ids and semantics of the message can be checked from
the source code of the tool.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Add an IOCTL to send mailbox commands to PUNIT using PUNIT PCI device.
A limited set of mailbox commands can be sent to PUNIT.
This MMIO interface is used by the intel-speed-select tool under
tools/x86/power to enumerate and control Intel Speed Select features.
The MBOX commands ids and semantics of the message can be checked from
the source code of the tool.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Added MMIO interface to read/write specific offsets in PUNIT PCI device
which export core priortization. This MMIO interface can be used using
ioctl interface on /dev/isst_interface using IOCTL ISST_IF_IO_CMD.
This MMIO interface is used by the intel-speed-select tool under
tools/x86/power to enumerate and set core priority. The MMIO offsets and
semantics of the message can be checked from the source code of the tool.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Add processing for IOCTL command ISST_IF_GET_PHY_ID. This converts from the
Linux logical CPU to PUNIT CPU numbering scheme.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
There are two per CPU data needs to be stored and cached to avoid repeated
MSR readings for accessing them later:
- Physical to logical CPU conversion
The PUNIT uses a different CPU numbering scheme which is not APIC id based.
So we need to establish relationship between PUNIT CPU number and Linux
logical CPU numbering which is based on APIC id. There is an MSR 0x53
(MSR_THREAD_ID), which gets physical CPU number for the local CPU where it
is read. Also the CPU mask in some messages will inform which CPUs needs
to be online/offline for a TDP level. During TDP switch if user offlined
some CPUs, then the physical CPU mask can't be converted as we can't
read MSR on an offlined CPU to go to a lower TDP level by onlining more
CPUs. So the mapping needs to be established at the boot up time.
- Bus number corresponding to a CPU
A group of CPUs are in a control of a PUNIT. The PUNIT device is exported
as PCI device. To do operation on a PUNIT for a CPU, we need to find out
to which PCI device it is related to. This is done by reading MSR 0x128
(MSR_CPU_BUS_NUMBER).
So during CPU online stages the above MSRs are read and stored. Later
this stored information is used to process IOCTLs request from the user
space.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Encapsulate common functions which all Intel Speed Select Technology
interface drivers can use. This creates API to register misc device for
user kernel communication and handle all common IOCTLs. As part of the
registry it allows a callback which is to handle domain specific ioctl
processing.
There can be multiple drivers register for services, which can be built
as modules. So this driver handle contention during registry and as well
as during removal. Once user space opened the misc device, the registered
driver will be prevented from removal. Also once misc device is opened by
the user space new client driver can't register, till the misc device is
closed.
There are two types of client drivers, one to handle mail box interface
and the other is to allow direct read/write to some specific MMIO space.
This common driver implements IOCTL ISST_IF_GET_PLATFORM_INFO.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
