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12 Commits

Author SHA1 Message Date
Dmytro Laktyushkin
0a93dc7f59 drm/amd/display: add rq/dlg/ttu to dtn log 
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2018-05-15 13:43:26 -05:00
Dave Airlie
6b7dcb536e Linux 4.15-rc4 
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BackMerge tag 'v4.15-rc4' into drm-next

Linux 4.15-rc4

Daniel requested it to fix some messy conflicts.
 2017-12-19 21:37:24 +10:00
Dmytro Laktyushkin
42cf181b59 drm/amd/display: add warning on long reg_wait 
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-06 12:47:32 -05:00
Alex Deucher
bf93b448b8 drm/amdgpu: add license to files where it was missing 
These files were missing it before.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-12-04 11:48:24 -05:00
Tony Cheng
8a5d82451e drm/amd/display: use some sensible time out 
40s time out is not sensible.

also make all udelay poll happen more frequently since CPU is busy anyways

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:16:23 -04:00
Eric Yang
755d3bcfd4 drm/amd/display: Fix generic_reg_wait 1000ms case 
Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:31 -04:00
Dmytro Laktyushkin
daf6b57dd7 drm/amd/display: add line number to reg_wait timeout print 
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:15:11 -04:00
Dmytro Laktyushkin
f0558542a7 drm/amd/display: redesign mpc 
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:57 -04:00
Dmytro Laktyushkin
11589813e6 drm/amd/display: fix enable_optc_clock reg_wait timeouts 
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 18:07:55 -04:00
Andrew Wong
98d2cc2b03 drm/amd/display: Change locking of registers when flipping frames. 
- Introduce GRPH_UPDATE_LOCK around programming surface flip.
- Remove the now unused graphic surface lock.
- Add macros to get and set four registers
- both immediate and H Retrace should not be enabled at the same time

Signed-off-by: Andrew Wong <andrew.wong1@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:04:52 -04:00
Dmytro Laktyushkin
8318a7eb98 drm/amd/display: add newline to generic_reg_wait timeout message 
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:03:04 -04:00
Harry Wentland
4562236b3b drm/amd/dc: Add dc display driver (v2) 
Supported DCE versions: 8.0, 10.0, 11.0, 11.2

v2: rebase against 4.11

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2017-09-26 17:01:32 -04:00