Commit Graph

982974 Commits

Author SHA1 Message Date
Maulik Shah
0924dad5d4 soc: qcom: rpmh: Use __fill_rpmh_msg API during rpmh_write()
Use __fill_rpmh_msg API during rpmh_write(). This allows to
remove duplication of code in error checking, copying commands
and setting message state.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Link: https://lore.kernel.org/r/1606379490-4052-1-git-send-email-mkshah@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-26 11:43:00 -06:00
Sai Prakash Ranjan
24244cefed arm64: dts: qcom: sm8150: Add Coresight support
Add coresight components found on Qualcomm Technologies,
Inc. SM8150 SoC.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20201126052422.24869-1-saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-26 11:40:02 -06:00
Feng Tang
4df910620b mm: memcg: relayout structure mem_cgroup to avoid cache interference
0day reported one -22.7% regression for will-it-scale page_fault2
case [1] on a 4 sockets 144 CPU platform, and bisected to it to be
caused by Waiman's optimization (commit bd0b230fe1) of saving one
'struct page_counter' space for 'struct mem_cgroup'.

Initially we thought it was due to the cache alignment change introduced
by the patch, but further debug shows that it is due to some hot data
members ('vmstats_local', 'vmstats_percpu', 'vmstats') sit in 2 adjacent
cacheline (2N and 2N+1 cacheline), and when adjacent cache line prefetch
is enabled, it triggers an "extended level" of cache false sharing for
2 adjacent cache lines.

So exchange the 2 member blocks, while keeping mostly the original
cache alignment, which can restore and even enhance the performance,
and save 64 bytes of space for 'struct mem_cgroup' (from 2880 to 2816,
with 0day's default RHEL-8.3 kernel config)

[1]. https://lore.kernel.org/lkml/20201102091543.GM31092@shao2-debian/

Fixes: bd0b230fe1 ("mm/memcg: unify swap and memsw page counters")
Reported-by: kernel test robot <rong.a.chen@intel.com>
Signed-off-by: Feng Tang <feng.tang@intel.com>
Acked-by: Waiman Long <longman@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-11-26 09:35:49 -08:00
Iskren Chernev
45dfa741df ARM: dts: qcom: msm8974-lge-nexus5: Add fuel gauge
The LG Nexus 5 uses a maxim17048 fuelgauge. The maxim,rcomp value is
taken from downstream dt. Temperature-based compensation is not yet
supported in the mainline driver, but the readings seem fine nevertheless.

Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Tested-by: Nícolas F. R. A. Prado <nfraprado@protonmail.com>
Link: https://lore.kernel.org/r/20201126141144.1763779-2-iskren.chernev@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-26 11:33:57 -06:00
Iskren Chernev
da8d46992e ARM: dts: qcom: msm8974-klte: Add fuel gauge
The Samsung Galaxy S5 uses a maxim17048 fuelgauge. The maxim,rcomp value
is taken from downstream kernel. Model data and temperature-based
compensation are not yet supported in the mainline driver, but the
readings seem fine nevertheless.

Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Link: https://lore.kernel.org/r/20201126141144.1763779-1-iskren.chernev@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-11-26 11:33:56 -06:00
Lukasz Luba
90a9965449 thermal: power allocator: change the 'k_*' always in estimate_pid_constants()
The PID coefficients should be estimated again when there was a change to
sustainable power value made by user. This change removes unused argument
'force' and makes the function ready for such updates.

Signed-off-by: Lukasz Luba <lukasz.luba@arm.com>
Reviewed-by: Ionela Voinescu <ionela.voinescu@arm.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20201124161025.27694-4-lukasz.luba@arm.com
2020-11-26 17:11:59 +01:00
Lukasz Luba
eda1ecfa77 thermal: power allocator: refactor sustainable power estimation
The sustainable power value might come from the Device Tree or can be
estimated in run time. The sustainable power might be updated by the user
via sysfs interface, which should trigger new estimation of PID
coefficients. There is no need to estimate it every time when the
governor is called and temperature is high. Instead, store the estimated
value and make it available via standard sysfs interface, so it can be
checked from the user-space.

Signed-off-by: Lukasz Luba <lukasz.luba@arm.com>
Reviewed-by: Ionela Voinescu <ionela.voinescu@arm.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20201124161025.27694-3-lukasz.luba@arm.com
2020-11-26 17:11:59 +01:00
Lukasz Luba
e34a723389 thermal: power allocator: change the 'k_i' coefficient estimation
Intelligent Power Allocation (IPA) is built around the PID controller
concept. The initialization code tries to setup the environment based on
the information available in DT or estimate the value based on minimum
power reported by each of the cooling device. The estimation will have an
impact on the PID controller behaviour via the related 'k_po', 'k_pu',
'k_i' coefficients and also on the power budget calculation.

This change prevents the situation when 'k_i' is relatively big compared
to 'k_po' and 'k_pu' values. This might happen when the estimation for
'sustainable_power' returned small value, thus 'k_po' and 'k_pu' are
small.

Signed-off-by: Lukasz Luba <lukasz.luba@arm.com>
Reviewed-by: Ionela Voinescu <ionela.voinescu@arm.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20201124161025.27694-2-lukasz.luba@arm.com
2020-11-26 17:11:59 +01:00
Avihai Horon
8138a4c21b RDMA/mlx4: Enable querying AH for XRC QP types
Address handle is set for connected QP types such as RC and UC, and thus
can also be queried.

Since XRC QP types INI and TGT are connected, it should be possible to
query their address handle as well.

Until now it was not the case, and although the firmware supported it, the
driver allowed querying the address handle only for RC and UC.

Hence, we enable it now for INI and TGT QPs as well.

Link: https://lore.kernel.org/r/20201115121425.139833-3-leon@kernel.org
Reviewed-by: Maor Gottlieb <maorg@nvidia.com>
Signed-off-by: Avihai Horon <avihaih@nvidia.com>
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2020-11-26 11:58:19 -04:00
Avihai Horon
f957d4d09a RDMA/mlx5: Enable querying AH for XRC QP types
Address handle is set for connected QP types such as RC and UC, and thus
can also be queried.

Since XRC QP types INI and TGT are connected, it should be possible to
query their address handle as well.

Until now it was not the case, and although the firmware supported it, the
driver allowed querying the address handle only for RC and UC.

Hence, we enable it now for INI and TGT QPs as well.

Link: https://lore.kernel.org/r/20201115121425.139833-2-leon@kernel.org
Reviewed-by: Maor Gottlieb <maorg@nvidia.com>
Signed-off-by: Avihai Horon <avihaih@nvidia.com>
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2020-11-26 11:58:19 -04:00
Christian König
aea656b0d0 drm/nouveau: make sure ret is initialized in nouveau_ttm_io_mem_reserve
This wasn't initialized for pre NV50 hardware.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reported-and-Tested-by: Mark Hounschell <markh@compro.net>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Link: https://patchwork.freedesktop.org/series/84298/
2020-11-26 16:58:14 +01:00
Rustam Kovhaev
d24396c529 reiserfs: add check for an invalid ih_entry_count
when directory item has an invalid value set for ih_entry_count it might
trigger use-after-free or out-of-bounds read in bin_search_in_dir_item()

ih_entry_count * IH_SIZE for directory item should not be larger than
ih_item_len

Link: https://lore.kernel.org/r/20201101140958.3650143-1-rkovhaev@gmail.com
Reported-and-tested-by: syzbot+83b6f7cf9922cae5c4d7@syzkaller.appspotmail.com
Link: https://syzkaller.appspot.com/bug?extid=83b6f7cf9922cae5c4d7
Signed-off-by: Rustam Kovhaev <rkovhaev@gmail.com>
Signed-off-by: Jan Kara <jack@suse.cz>
2020-11-26 16:57:28 +01:00
Pavel Begunkov
af60470347 io_uring: fix files grab/cancel race
When one task is in io_uring_cancel_files() and another is doing
io_prep_async_work() a race may happen. That's because after accounting
a request inflight in first call to io_grab_identity() it still may fail
and go to io_identity_cow(), which migh briefly keep dangling
work.identity and not only.

Grab files last, so io_prep_async_work() won't fail if it did get into
->inflight_list.

note: the bug shouldn't exist after making io_uring_cancel_files() not
poking into other tasks' requests.

Signed-off-by: Pavel Begunkov <asml.silence@gmail.com>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
2020-11-26 08:50:21 -07:00
Michal Simek
05cdf45747 microblaze: Remove noMMU code
This configuration is obsolete and likely none is really using it. That's
why remove it to simplify code.

Note about CONFIG_MMU in hw_exception_handler.S is left intentionally
for better comment understanding.

Cc: Mike Rapoport <rppt@kernel.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Mike Rapoport <rppt@linux.ibm.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/43486cab370e0c0a79860120b71e0caac75a7e44.1606397528.git.michal.simek@xilinx.com
2020-11-26 16:39:35 +01:00
Sameer Pujar
48f6e19503 arm64: tegra: Fix Tegra194 HDA {clock,reset}-names ordering
As per the HDA binding doc reorder {clock,reset}-names entries for
Tegra194. This also serves as a preparation for converting existing
binding doc to json-schema.

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 16:33:04 +01:00
Sivaram Nair
a886c310d9 clk: tegra: bpmp: Clamp clock rates on requests
BPMP firmware ABI expects the rate inputs in int64_t. However,
tegra_bpmp_clk_round_rate() and tegra_bpmp_clk_set_rate() functions
directly assign 'unsigned long' inputs to a int64_t value causing
unexpected rounding errors.

Fix this by clipping the input rate to S64_MAX.

Signed-off-by: Sivaram Nair <sivaramn@nvidia.com>
[mperttunen: slight cleanup]
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: Sivaram Nair <sivaramn@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 16:28:07 +01:00
Sowjanya Komatineni
e061fbdf7d arm64: tegra: Enable AHCI on Jetson TX2
This patch enables AHCI on Jetson TX2.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 16:25:50 +01:00
Sowjanya Komatineni
c84ebdfd26 arm64: tegra: Change order of SATA resets for Tegra132 and Tegra210
Tegra AHCI dt-binding doc is converted from text based to yaml based.

dtbs_check valdiation strictly follows reset-names order specified
in yaml dt-binding.

Tegra124 thru Tegra210 has 3 resets sata, sata-oob and sata-cold.
Tegra186 has 2 resets sata and sata-cold.

This patch changes order of SATA resets to maintain proper resets
order for commonly available resets across Tegra124 thru Tegra186
for dtbs_check to pass.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 16:24:59 +01:00
JC Kuo
6450da3dab arm64: tegra: Add XUSB pad controller interrupt
This commit adds "interrupts" property to Tegra210/Tegra186/Tegra194
XUSB PADCTL node. XUSB PADCTL interrupt will be raised when USB wake
event happens. This is required for supporting XUSB host controller
ELPG.

Signed-off-by: JC Kuo <jckuo@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 16:15:51 +01:00
Yixian Liu
17475e104d RDMA/hns: Bugfix for memory window mtpt configuration
When a memory window is bound to a memory region, the local write access
should be set for its mtpt table.

Fixes: c7c2819140 ("RDMA/hns: Add MW support for hip08")
Link: https://lore.kernel.org/r/1606386372-21094-1-git-send-email-liweihang@huawei.com
Signed-off-by: Yixian Liu <liuyixian@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2020-11-26 10:57:32 -04:00
Wenpeng Liang
ab6f7248cc RDMA/hns: Fix retry_cnt and rnr_cnt when querying QP
The maximum number of retransmission should be returned when querying QP,
not the value of retransmission counter.

Fixes: 99fcf82521 ("RDMA/hns: Fix the wrong value of rnr_retry when querying qp")
Fixes: 926a01dc00 ("RDMA/hns: Add QP operations support for hip08 SoC")
Link: https://lore.kernel.org/r/1606382977-21431-1-git-send-email-liweihang@huawei.com
Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2020-11-26 10:57:32 -04:00
Wenpeng Liang
ebed7b7ca4 RDMA/hns: Fix wrong field of SRQ number the device supports
The SRQ capacity is got from the firmware, whose field should be ended at
bit 19.

Fixes: ba6bb7e974 ("RDMA/hns: Add interfaces to get pf capabilities from firmware")
Link: https://lore.kernel.org/r/1606382812-23636-1-git-send-email-liweihang@huawei.com
Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2020-11-26 10:57:32 -04:00
Yang Yingliang
058236eef6 iommu: return error code when it can't get group
Although iommu_group_get() in iommu_probe_device() will always succeed
thanks to __iommu_probe_device() creating the group if it's not present,
it's still worth initialising 'ret' to -ENODEV in case this path is
reachable in the future.

For now, this patch results in no functional change.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Link: https://lore.kernel.org/r/20201126133825.3643852-1-yangyingliang@huawei.com
Signed-off-by: Will Deacon <will@kernel.org>
2020-11-26 14:53:32 +00:00
David Woodhouse
d76b42e927 iommu/vt-d: Don't read VCCAP register unless it exists
My virtual IOMMU implementation is whining that the guest is reading a
register that doesn't exist. Only read the VCCAP_REG if the corresponding
capability is set in ECAP_REG to indicate that it actually exists.

Fixes: 3375303e82 ("iommu/vt-d: Add custom allocator for IOASID")
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Liu Yi L <yi.l.liu@intel.com>
Cc: stable@vger.kernel.org # v5.7+
Acked-by: Lu Baolu <baolu.lu@linux.intel.com>
Link: https://lore.kernel.org/r/de32b150ffaa752e0cff8571b17dfb1213fbe71c.camel@infradead.org
Signed-off-by: Will Deacon <will@kernel.org>
2020-11-26 14:50:24 +00:00
Hans de Goede
c9aa128080 platform/x86: touchscreen_dmi: Add info for the Irbis TW118 tablet
Add touchscreen info for the Irbis TW118 tablet.

Reported-and-tested-by: russianneuromancer <russianneuromancer@ya.ru>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20201124110454.114286-1-hdegoede@redhat.com
2020-11-26 15:49:16 +01:00
Hans de Goede
0f511edc6a platform/x86: touchscreen_dmi: Add info for the Predia Basic tablet
Add touchscreen info for the Predia Basic tablet.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20201015194949.50566-1-hdegoede@redhat.com
2020-11-26 15:49:02 +01:00
Max Verevkin
8b205d3e1b platform/x86: intel-vbtn: Support for tablet mode on HP Pavilion 13 x360 PC
The Pavilion 13 x360 PC has a chassis-type which does not indicate it is
a convertible, while it is actually a convertible. Add it to the
dmi_switches_allow_list.

Signed-off-by: Max Verevkin <me@maxverevkin.tk>
Link: https://lore.kernel.org/r/20201124131652.11165-1-me@maxverevkin.tk
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2020-11-26 15:48:55 +01:00
Kaixu Xia
2a72c46ac4 platform/x86: toshiba_acpi: Fix the wrong variable assignment
The commit 78429e55e4 ("platform/x86: toshiba_acpi: Clean up
variable declaration") cleans up variable declaration in
video_proc_write(). Seems it does the variable assignment in the
wrong place, this results in dead code and changes the source code
logic. Fix it by doing the assignment at the beginning of the funciton.

Fixes: 78429e55e4 ("platform/x86: toshiba_acpi: Clean up variable declaration")
Reported-by: Tosk Robot <tencent_os_robot@tencent.com>
Signed-off-by: Kaixu Xia <kaixuxia@tencent.com>
Link: https://lore.kernel.org/r/1606024177-16481-1-git-send-email-kaixuxia@tencent.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2020-11-26 15:48:46 +01:00
Timo Witte
9e7a005ad5 platform/x86: acer-wmi: add automatic keyboard background light toggle key as KEY_LIGHTS_TOGGLE
Got a dmesg message on my AMD Renoir based Acer laptop:
"acer_wmi: Unknown key number - 0x84" when toggling keyboard
background light

Signed-off-by: Timo Witte <timo.witte@gmail.com>
Reviewed-by: "Lee, Chun-Yi" <jlee@suse.com>
Link: https://lore.kernel.org/r/20200804001423.36778-1-timo.witte@gmail.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2020-11-26 15:48:37 +01:00
Matthias Maier
80a8c3185f platform/x86: thinkpad_acpi: Whitelist P15 firmware for dual fan control
This commit enables dual fan control for the following new Lenovo
models: P15, P15v.

Signed-off-by: Matthias Maier <tamiko@43-1.org>
Link: https://lore.kernel.org/r/20201126000416.2459645-2-tamiko-ibm-acpi-devel@43-1.org
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2020-11-26 15:45:40 +01:00
Benjamin Berg
e40cc1b476 platform/x86: thinkpad_acpi: Send tablet mode switch at wakeup time
The lid state may change while the machine is suspended. As such, we may
need to re-check the state at wake-up time (at least when waking up from
hibernation).
Add the appropriate call to the resume handler in order to sync the
SW_TABLET_MODE switch state with the hardware state.

Fixes: dda3ec0aa6 ("platform/x86: thinkpad_acpi: Implement tablet mode using GMMS method")
BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=210269
Signed-off-by: Benjamin Berg <bberg@redhat.com>
Acked-by: Henrique de Moraes Holschuh <hnh@hmh.eng.br>
Link: https://lore.kernel.org/r/20201123132157.866303-1-benjamin@sipsolutions.net
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2020-11-26 15:45:24 +01:00
Hans de Goede
c986a70249 platform/x86: thinkpad_acpi: Add BAT1 is primary battery quirk for Thinkpad Yoga 11e 4th gen
The Thinkpad Yoga 11e 4th gen with the N3450 / Celeron CPU only has
one battery which is named BAT1 instead of the expected BAT0, add a
quirk for this. This fixes not being able to set the charging tresholds
on this model; and this alsoe fixes the following errors in dmesg:

ACPI: \_SB_.PCI0.LPCB.EC__.HKEY: BCTG evaluated but flagged as error
thinkpad_acpi: Error probing battery 2
battery: extension failed to load: ThinkPad Battery Extension
battery: extension unregistered: ThinkPad Battery Extension

Note that the added quirk is for the "R0K" BIOS versions which are
used on the Thinkpad Yoga 11e 4th gen's with a Celeron CPU, there
is a separate "R0L" BIOS for the i3/i5 based versions. This may also
need the same quirk, but if that really is necessary is unknown.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20201109103550.16265-1-hdegoede@redhat.com
2020-11-26 15:44:44 +01:00
Hans de Goede
f2eae1888c platform/x86: thinkpad_acpi: Do not report SW_TABLET_MODE on Yoga 11e
The Yoga 11e series has 2 accelerometers described by a BOSC0200 ACPI node.
This setup relies on a Windows service which reads both accelerometers and
then calculates the angle between the 2 halves to determine laptop / tent /
tablet mode and then reports the calculated mode back to the EC by calling
special ACPI methods on the BOSC0200 node.

The bmc150 iio driver does not support this (it involves double
calculations requiring sqrt and arccos so this really needs to be done
in userspace), as a result of this on the Yoga 11e the thinkpad_acpi
code always reports SW_TABLET_MODE=0, starting with GNOME 3.38 reporting
SW_TABLET_MODE=0 causes GNOME to:

1. Not show the onscreen keyboard when a text-input field is focussed
   with the touchscreen.
2. Disable accelerometer based auto display-rotation.

This makes sense when in laptop-mode but not when in tablet-mode. But
since for the Yoga 11e the thinkpad_acpi code always reports
SW_TABLET_MODE=0, GNOME does not know when the device is in tablet-mode.

Stop reporting the broken (always 0) SW_TABLET_MODE on Yoga 11e models
to fix this.

Note there are plans for userspace to support 360 degree hinges style
2-in-1s with 2 accelerometers and figure out the mode by itself, see:
https://gitlab.freedesktop.org/hadess/iio-sensor-proxy/-/issues/216

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20201106140130.46820-1-hdegoede@redhat.com
2020-11-26 15:44:35 +01:00
Iakov 'Jake' Kirilenko
15d89c9f6f platform/x86: thinkpad_acpi: add P1 gen3 second fan support
Tested on my P1 gen3, works fine with `thinkfan`. Since thinkpad_acpi fan
control is off by default, it is safe to add 2nd fan control for brave
overclockers

Signed-off-by: Iakov 'Jake' Kirilenko <jake.kirilenko@gmail.com>
Link: https://lore.kernel.org/r/20201105152556.34073-1-jake.kirilenko@gmail.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2020-11-26 15:44:09 +01:00
Vadim Pasternak
912b341585 platform/x86: mlx-platform: Remove PSU EEPROM from MSN274x platform configuration
Remove PSU EEPROM configuration for systems class equipped with
Mellanox chip Spectrum and ATOM CPU - system types MSN274x. Till now
all the systems from this class used few types of power units, all
equipped with EEPROM device with address space two bytes. Thus, all
these devices have been handled by EEPROM driver "24c02".

There is a new requirement is to support power unit replacement by "off
the shelf" device, matching electrical required parameters. Such device
can be equipped with different EEPROM type, which could be one byte
address space addressing or even could be not equipped with EEPROM.
In such case "24c02" will not work.

Fixes: ef08e14a3 ("platform/x86: mlx-platform: Add support for new msn274x system type")
Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
Link: https://lore.kernel.org/r/20201125101056.174708-3-vadimp@nvidia.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2020-11-26 15:26:22 +01:00
Vadim Pasternak
2bf5046bdb platform/x86: mlx-platform: Remove PSU EEPROM from default platform configuration
Remove PSU EEPROM configuration for systems class equipped with
Mellanox chip Spectrum and Celeron CPU - system types MSN2700, MSN2100.
Till now all the systems from this class used few types of power units,
all equipped with EEPROM device with address space two bytes. Thus, all
these devices have been handled by EEPROM driver "24c02".

There is a new requirement is to support power unit replacement by "off
the shelf" device, matching electrical required parameters. Such device
can be equipped with different EEPROM type, which could be one byte
address space addressing or even could be not equipped with EEPROM.
In such case "24c02" will not work.

Fixes: c6acad68e ("platform/mellanox: mlxreg-hotplug: Modify to use a regmap interface")
Fixes: ba814fdd0 ("platform/x86: mlx-platform: Use defines for bus assignment")
Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
Link: https://lore.kernel.org/r/20201125101056.174708-2-vadimp@nvidia.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2020-11-26 15:26:22 +01:00
Neil Armstrong
88b9ae6001 clk: meson: g12a: add MIPI DSI Host Pixel Clock
This adds the MIPI DSI Host Pixel Clock, unlike AXG, the pixel clock can be different
from the VPU ENCL output clock to feed the DSI Host controller with a different clock rate.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20201126141600.2084586-3-narmstrong@baylibre.com
2020-11-26 15:25:20 +01:00
Jerome Brunet
dee6ecc7c3 Merge branch 'v5.11/headers' into v5.11/drivers 2020-11-26 15:25:12 +01:00
Matthias Maier
e8637dfca1 platform/x86: thinkpad_acpi: Whitelist P15 firmware for dual fan control
This commit enables dual fan control for the following new Lenovo
models: P15, P15v.

Signed-off-by: Matthias Maier <tamiko@43-1.org>
Link: https://lore.kernel.org/r/20201126000416.2459645-2-tamiko-ibm-acpi-devel@43-1.org
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2020-11-26 15:23:56 +01:00
Neil Armstrong
312489790c dt-bindings: clk: g12a-clkc: add DSI Pixel clock bindings
This adds the MIPI DSI Host Pixel Clock bindings.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/20201126141600.2084586-2-narmstrong@baylibre.com
2020-11-26 15:23:34 +01:00
Chris Wilson
977933b5da drm/i915/gt: Program mocs:63 for cache eviction on gen9
Ville noticed that the last mocs entry is used unconditionally by the HW
when it performs cache evictions, and noted that while the value is not
meant to be writable by the driver, we should program it to a reasonable
value nevertheless.

As it turns out, we can change the value of mocs:63 and the value we
were programming into it would cause hard hangs in conjunction with
atomic operations.

v2: Add details from bspec about how it is used by HW

Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2707
Fixes: 3bbaba0cea ("drm/i915: Added Programming of the MOCS")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Jason Ekstrand <jason@jlekstrand.net>
Cc: <stable@vger.kernel.org> # v4.3+
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201126140841.1982-1-chris@chris-wilson.co.uk
2020-11-26 14:17:50 +00:00
Justin Ernst
4fc2cf1f2d x86/platform/uv: Add new uv_sysfs platform driver
Add the uv_sysfs driver to construct a read-only sysfs interface at
/sys/firmware/sgi_uv/ to expose information gathered from UV BIOS. This
information includes:

  * UV Hub descriptions, including physical location
  * Cabling layout between hubs on the fabric
  * PCI topology, including physical location of PCI cards

Together, the information provides a robust physical description of a UV
system, useful for correlating to performance data or performing remote
support.

Signed-off-by: Justin Ernst <justin.ernst@hpe.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Steve Wahl <steve.wahl@hpe.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lkml.kernel.org/r/20201125175444.279074-4-justin.ernst@hpe.com
2020-11-26 14:46:11 +01:00
Olivier Moysan
01d1386254 ARM: multi_v7_defconfig: enable STM32 dfsdm audio support
Add STM32 DFSDM audio support by enabling CONFIG_SND_SOC_STM32_DFSDM
as module.

Signed-off-by: Olivier Moysan <olivier.moysan@st.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2020-11-26 14:46:04 +01:00
Olivier Moysan
1c6b157ba6 ARM: multi_v7_defconfig: enable STM32 spdifrx support
Add STM32 SPDIFRX support by enabling CONFIG_SND_SOC_STM32_SPDIFRX
as module.

Signed-off-by: Olivier Moysan <olivier.moysan@st.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2020-11-26 14:46:04 +01:00
Amelie Delaunay
8939178317 ARM: multi_v7_defconfig: enable STUSB160X Type-C port controller support
Enable support for the STMicroelectronics STUSB160X USB Type-C port
controller driver by turning on CONFIG_TYPEC and CONFIG_TYPEC_STUSB160X as
modules.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:46:04 +01:00
Lionel Debieve
8e4eeb83a6 ARM: multi_v7_defconfig: add STM32 crypto support
Enable crypto controllers enabling following flags as module:
CONFIG_CRYPTO_DEV_STM32_CRC
CONFIG_CRYPTO_DEV_STM32_HASH
CONFIG_CRYPTO_DEV_STM32_CRYP

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:46:04 +01:00
Fabrice Gasnier
46957c06d3 ARM: multi_v7_defconfig: enable counter subsystem and stm32 counter drivers
This enables the counter subsystem and drivers for the stm32 timer and LP
timer.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:46:04 +01:00
Ahmad Fatoum
6660e24455 ARM: dts: stm32: lxa-mc1: add OSD32MP15x to list of compatibles
Earlier commit modified the binding, so the SiP is to be specified
as well. Adjust the device tree accordingly.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Ahmad Fatoum
acf6f33163 dt-bindings: arm: stm32: add extra SiP compatible for lxa,stm32mp157c-mc1
The Linux Automation MC-1 is built around an OSD32MP15x SiP with CPU,
RAM, PMIC, Oscillator and EEPROM. Adjust the binding, so the SiP
compatible is contained as well. This allows boot firmware to match
against it to apply fixups if necessary.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00
Ahmad Fatoum
a24bde12f9 dt-bindings: vendor-prefixes: document Octavo Systems oct prefix
Octavo Systems is an American company specializing in design and
manufacturing of System-in-Package devices.

The prefix is already in use for the Octavo Systems OSD3358-SM-RED
device tree, but was so far undocumented. Fix this.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Cc: Neeraj Dantu <neeraj.dantu@octavosystems.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00