Move definitions from mfp-gplugd.h to mfp-pxa168.h as they aren't
gplugD specific.
Signed-off-by: Tanmay Upadhyay <tanmay.upadhyay@einfochips.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* 'next/cross-platform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc:
ARM: Consolidate the clkdev header files
ARM: set vga memory base at run-time
ARM: convert PCI defines to variables
ARM: pci: make pcibios_assign_all_busses use pci_has_flag
ARM: remove unnecessary mach/hardware.h includes
pci: move microblaze and powerpc pci flag functions into asm-generic
powerpc: rename ppc_pci_*_flags to pci_*_flags
Fix up conflicts in arch/microblaze/include/asm/pci-bridge.h
As suggested by Arnd, move platform data to include/linux/platform_data
in order to improve build coverage for the driver.
Signed-off-by: Zhangfei Gao <zhangfei.gao@marvell.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Chris Ball <cjb@laptop.org>
Update MMP2 platform code to "sdhci-pxav3", following the driver rename.
Signed-off-by: Zhangfei Gao <zhangfei.gao@marvell.com>
Acked-by: Philip Rakity <prakity@marvell.com>
Acked-by: Mark F. Brown <mark.brown314@gmail.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
Now most of ARM machines has the alsmot same __clk_get/put() macro
So place it at the arch/arm/include/asm/clkdev.h and remove the reduntant header files
But some machines don't have the same form as above. It can use the machince specific clkdev file by HAVE_MACH_CLKDEV config
Now there are only 3 caese.
1) define the clk structure with clkdev macro => Need to move clk structure to proper header file
arch/arm/mach-versatile/include/mach/clkdev.h
arch/arm/mach-realview/include/mach/clkdev.h
arch/arm/mach-vexpress/include/mach/clkdev.h
arch/arm/mach-integrator/include/mach/clkdev.h
2) export the __clk_get/put function at clock.c
arch/arm/mach-shmobile/include/mach/clkdev.h
3) demuxing the clk source
arch/arm/mach-u300/include/mach/clkdev.h
Acked-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
PXA168 has 3 onchip UARTs. Added support for the third one
Signed-off-by: Tanmay Upadhyay <tanmay.upadhyay@einfochips.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Since there're mulitple clock rates in some device controllers, enable
clk_set_rate() for this usage.
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
The original pair of <0x01db, 208000000> is invalid. Correct it to
the valid value.
The 6th bit of the NFC APMU register indicates NFC works whether
at 156Mhz or 78Mhz. So 0x19b indicates NFC works at 156Mhz, and
0x1db indicates it works at 78Mhz.
Signed-off-by: Lei Wen <leiwen@marvell.com>
Cc: stable@kernel.org
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
The original pair of <0x01db, 208000000> is invalid.
Correct to the valid value.
Signed-off-by: Lei Wen <leiwen@marvell.com>
Cc: stable@kernel.org
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
To be able to relocate the .bss section at run time independently from
the rest of the code, we must make sure that no GOTOFF relocations are
used with .bss symbols. This usually means that no global variables can
be marked static unless they're also const.
Let's remove the static qualifier from current offenders, or turn them
into const variables when possible. Next commit will ensure the build
fails if one of those is reintroduced due to otherwise enforced coding
standards for the kernel.
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Tested-by: Tony Lindgren <tony@atomide.com>
Avoid to mismatch between NR_BUILTIN_GPIO and gpio interrupt number.
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
This patch moves the platform data definition from
arch/arm/plat-pxa/include/plat/i2c.h to include/linux/i2c/pxa-i2c.h so
it can be accessed from x86 the same way as on ARM.
This change should make no functional change to the PXA code. The move
is verified by building the following defconfigs:
cm_x2xx_defconfig corgi_defconfig em_x270_defconfig ezx_defconfig
imote2_defconfig pxa3xx_defconfig spitz_defconfig zeus_defconfig
raumfeld_defconfig magician_defconfig mmp2_defconfig pxa168_defconfig
pxa910_defconfig
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This uncouple PHYS_OFFSET from the platform definitions, thereby
facilitating run-time computation of the physical memory offset.
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Magnus Damm <damm@opensource.se>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Wan ZongShun <mcuos.com@gmail.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Acked-by: Eric Miao <eric.y.miao@gmail.com>
Acked-by: Jiandong Zheng <jdzheng@broadcom.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Drive strength for PXA910 is a 2 bit value but because of the mapping in
plat-pxa/mfp.h needs to be shifted up one bit to handle real
location in mfp registers. (MMP2 and PXA910 drive strength start
at bit 11 while PXA168 starts at bit 10).
Values 0, 1, 2, and 3 effectively need to be
0, 2, 4, and 6 to fit into register. 8 does not work.
Signed-off-by: Philip Rakity <prakity@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Drive strength for MMP2 is a 2 bit value but because of the mapping in
plat-pxa/mfp.h needs to be shifted up one bit to handle real
location in mfp registers. (MMP2 and PXA910 drive strength start
at bit 11 while PXA168 starts at bit 10).
Values 0, 1, 2, and 3 effectively need to be
0, 2, 4, and 6 to fit into register. 8 does not work.
Signed-off-by: Philip Rakity <prakity@marvell.com>
Tested-by: John Watlington <wad@laptop.org>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Convert mmp to use the new sched_clock() infrastructure for extending
32bit counters to full 64-bit nanoseconds.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ftrace requires sched_clock() to be notrace. Ensure that all
implementations are so marked. Also make sure that they include
linux/sched.h
Also ensure OMAP clocksource read functions are marked notrace as
they're used for sched_clock() too.
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Will Deacon <will.deacon@arm.com>
Tested-by: Mikael Pettersson <mikpe@it.uu.se>
Tested-by: Eric Miao <eric.y.miao@gmail.com>
Tested-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
In d7e81c2 (clocksource: Add clocksource_register_hz/khz interface) new
interfaces were added which simplify (and optimize) the selection of the
divisor shift/mult constants. Switch over to using this new interface.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Mark F. Brown <mark.brown314@gmail.com>
Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Since CPU_PJ4 is shared between PXA95x and MMP2, select CPU_PJ4 in MMP2
configuration.
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
RTC clock will remain at 32KHz and powered on, there is no need for it
at this moment.
Signed-off-by: Jason Chagas <jason.chagas@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
factorise some generic infrastructure to assist looking up struct clks
for the ARM & SH architecture.
as the code is identical at 99%
put the arch specific code for allocation as example in asm/clkdev.h
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Since we're now using addruart to establish the debug mapping, we can
remove the io_pg_offst and phys_io members of struct machine_desc.
The various declarations were removed using the following script:
grep -rl MACHINE_START arch/arm | xargs \
sed -i '/MACHINE_START/,/MACHINE_END/ { /\.\(phys_io\|io_pg_offst\)/d }'
[ Initial patch was from Jeremy Kerr, example script from Russell King ]
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: Eric Miao <eric.miao at canonical.com>
Rather than checking the MMU status in every instance of addruart, do it
once in kernel/debug.S, and change the existing addruart macros to
return both physical and virtual addresses. The main debug code can then
select the appropriate address to use.
This will also allow us to retreive the address of a uart for the MMU
state that we're not current in.
Updated with fixes for OMAP from Jason Wang <jason77.wang@gmail.com>
and Tony Lindgren <tony@atomide.com>, and fix for versatile express from
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>.
Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Jason Wang <jason77.wang@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>
Defined I2C/ALARM pin definitions
DS1337 RTC alarm support is tied to RTC_INT_GPIO
Signed-off-by: Mark F. Brown <mark.brown314@gmail.com>
Acked-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Support for Matrix keypad ESC, ENTER, LEFT, and RIGHT
Signed-off-by: Mark F. Brown <mark.brown314@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Added board defintion, header, and debug UART support.
Signed-off-by: Mark F. Brown <mark.brown314@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
