Add the known i2c devices on seaboard to the i2c table.
Also rename the temperature sensor device node, and mark it as a nct1008
instead of an adt7461 (which it is -- the chips are compatible though).
Signed-off-by: Olof Johansson <olof@lixom.net>
[swarren: Removed isl29018 from patch; it's already there now. Fixed
interrupts properties now that Tegra GPIO is an interrupt controller.
Moved smart-battery to the correct I2C bus.]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The I2C2 controller can be routed to either pingroup DDC or PTA. Seaboard
actually uses this as an I2C bus mux, and devices are connected to both
pingroups. This change statically assigns the I2C2 controller to pingroup
PTA, so that on-board devices can be accessed. The DDC pingroup is used
for EDID/DDC accesses which are not yet required, given the absence of
any Tegra graphics support. I2C muxing will be supported later.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This I2C bus is used for EDID/DDC reads and other "slow" I2C devices.
This requires a 100KHz SCL (clock) rate.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Add the device info for ALS and proximity sensor for tegra
boards cardhu, ventana and seaboard.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
[swarren: s/PZ02/PZ2/ in .dts files, s/seabridge/seaboard/ in commit
description]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This adds a complete pinmux configuration to all Tegra20 device tree
files. This allows removal of board-dt-tegra20.c's use of the pinmux
board files, and the special device tree handling in board-pinmux.c.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Olof Johansson <olof@lixom.net>
The USB1 port on Tegra2 supports operation in host or device modes. On
Seaboard this is possible, so mark the port as OTG.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Add complete bindings to instantiate and configure the codec and
top-level audio complex on all currently supported boards using the
Tegra+WM8903 audio driver.
On those boards, disable the I2S2 controller since it isn't used.
On boards not using the WM8903 codec, disable all the audio devices;
they can be re-enabled once the relevant codec and ASoC machine drivers
have been ported to device-tree.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This brings all the GPIO key definitions from board-seaboard.c into
tegra-seaboard.dtsi.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
The ADT7461 is a temperature monitoring IC. One is present on the DVC
I2C bus on Seaboard.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Mark any SDHCI controllers that aren't registered by the board files as
disabled in the device-tree files.
In practice, these controllers:
* Have nothing hooked up to them at all, or
* For ports intended for SDIO usage, the drivers for anything that might
be attached are not in the device-tree yet. If/when drivers appear, the
SD/MMC port can be re-enabled.
The only possible exception is TrimSlice's mico SD slot, but that wasn't
enabled in the board files before anyway, and doesn't work when all the
SDHCI controllers are enabled anyway.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Mark any serial ports that aren't registered by the board files as disabled
in the device-tree files.
In practice, none of the now-disabled ports ended up succeeding device
probing because of the missing clock-frequency property. However,
explicitly marking the devices disabled has the advantage of squashing
the dev_warn() the failed probe causes, and documenting that we intend
the port not to be used, rather than accidentally left out the property.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
With board files, all I2C busses run at 400KHz. Fix the device-tree
to be consistent with this. It's possible this is incorrect, but at
least it keeps the board files and device-tree consistent.
Also, disable any I2C controllers that the board files don't register,
also for consistency.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
The command-lines present in the existing /chosen node are not necessarily
correct for all users. Ideally, we should simply use the command-line
supplied by the boot-loader.
In fact, using the boot-loader's cmdline is quite easy; either the
bootloader fully supports DT, in which case it can modify the DT passed
to the kernel to include its command-line, or CONFIG_APPENDED_DTB can
be used in conjunction with CONFIG_ARM_ATAG_DTB_COMPAT, and the kernel
will substitute the bootloader's command-line into the DT.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
There are no drivers in the kernel at present which can make use of the
memory reserved by /memreserve/, so there is no point reserving it. Remove
/memreserve/ to allow the user more memory. It's also unclear whether any
future driver would actually require /memreserve/, or allocate memory
through some other mechanism.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
For now they are a minimal binding. It needs to be amended with
vendor-specific settings for phy setup and link tuning, etc.
v2: Added bindings specification and phy_type properties
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Stephen Warren <swarren@nvidia.com>
For Seaboard's internal eMMC, this makes the difference between a
5.5MB/s and 10.2MB/s transfer rate. On Harmony, there wasn't any
measurable difference on my cheap/slow ~2MB/s card.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The bindings were recently updated to have separate properties for each
type of GPIO. Update the Device Tree source to match that.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Everything required to populate NVIDIA Tegra devices from the device
tree. This patch adds a new DT_MACHINE_DESC() which matches against
a tegra20 device tree. So far it only registers the on-chip devices,
but it will be refined in follow on patches to configure clocks and
pin IO from the device tree also.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
