please pull the following:
- Alvaro adds support for the BCM63xx (DSL) SoCs power domain controller
and adds support for the 6318, 6328, 6362, 63268.
- Florian adds support for tuning the Bus Interface Unit on 72164 and
72165, enables the Brahma-B53 and Cortex-A72 read-ahead cache for the
64-bit capable ARCH_BRCMSTB platforms, and finally updates the GISB
driver to support breakpoint notifications.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAl9ZkK4ACgkQh9CWnEQH
BwS8bQ//dn66KKeK2Fcw6pofTypsE7y69P2Jz7vA8IkYigNaNwIWABXXE+/FXrPE
ZVk9se/ZAI/kvWQXKj5T2JyjXWU8jphidwX0aK1xUymab60W6EdZUJcTiKdsdamA
KGSAQ0jjWaNuZHnNR2nsqa4OLDrnQz2ujdWCnz9SSBNtPFcAknbj+nkicbpWmHb7
1fjBXg7e+RkUuaHGNETIkKnjdEA/e2frlTCzwendsLTgJkhbr9j9y6jAOtJiXjE4
+UQd84cEPsuvSrx6dx6pnCVoL19m2aPFE9JTDVCXVYCOinjm+gQDXQTl8w+HvoZn
/w0deVOJSOF+YHoRbC7xLghaY2jjRmM86jjmopSB7/OF5KUbkuMj1Nz5xQxUI7gA
BuvRQvry+TedEiY1vfsDnrJZpv3vZTS2BRkTfiZXvhtfDM/unMr9L6vScxzQU7gA
Gj2hPEai3bB+pfTB+e1H4IAWFmQXgS+3Q+JpCtgHjZFZtmYy89MaJK5TY88pYceR
ZfnK6aHhHXNF3L594CYCNxZBovC2Jt/Mp6+MIPgFpvwTFKhqoLIjUP5bnuZRqHZ6
yVz0WJgU6R7FPtp8uTwES5moreeAWMdVdzHdZvTkOrPzRvBpT1tMWpk00eFaAn7E
PlTdM5OMuxDi2tZKcLNCW92To1Un0YRnMLZh8Q5sSS9MekY++hk=
=njcZ
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-5.10/drivers' of https://github.com/Broadcom/stblinux into arm/drivers
This pull request contains Broadcom SoCs drivers changes for 5.10,
please pull the following:
- Alvaro adds support for the BCM63xx (DSL) SoCs power domain controller
and adds support for the 6318, 6328, 6362, 63268.
- Florian adds support for tuning the Bus Interface Unit on 72164 and
72165, enables the Brahma-B53 and Cortex-A72 read-ahead cache for the
64-bit capable ARCH_BRCMSTB platforms, and finally updates the GISB
driver to support breakpoint notifications.
* tag 'arm-soc/for-5.10/drivers' of https://github.com/Broadcom/stblinux:
bus: brcmstb_gisb: Add support for breakpoint interrupts
dt-bindings: bus: Document breakpoint interrupt for gisb-arb
soc: bcm: brcmstb: biuctrl: Change RAC data line prefetching after 4 consecutive lines
soc: bcm: brcmstb: biuctrl: Change RAC prefetch distance from +/-1 to +/- 2
soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72165
soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72164
MIPS: BMIPS: dts: add BCM63268 power domain support
MIPS: BMIPS: dts: add BCM6362 power domain support
MIPS: BMIPS: dts: add BCM6328 power domain support
soc: bcm: add BCM63xx power domain driver
MIPS: BMIPS: add BCM6318 power domain definitions
MIPS: BMIPS: add BCM63268 power domain definitions
MIPS: BMIPS: add BCM6362 power domain definitions
MIPS: BMIPS: add BCM6328 power domain definitions
dt-bindings: soc: brcm: add BCM63xx power domain binding
soc: bcm: brcmstb: biuctrl: Enable Read-ahead cache
bus: brcmstb_gisb: Shorten prints
Link: https://lore.kernel.org/r/20200912032153.1216354-3-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
We now drop legacy platform data for RTC on am3, am4 and dra7.
And we add initial genpd support for PRM (Power and Reset Manager)
and use it to drop legacy platform data for am3 sgx and omap4/5
l4_abe interconnect instance.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAl9Qsw8RHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXNnORAAwV+49gsZdnGLQxqzLThegu5auzfQuRdZ
E82KGonAjoHONaBdk+pgVrEePpcJTUbUNQm8HeQRjusp/5CR8C+S6A9/RD+R1crc
F+9gDsbTuBSkUkOAVkMT6oGPom8zN8bISJ4gFymLoGsT7MTD3K1nK6wVXpRhCJs6
R2z/KpFIPMfz0psuYEgl5Uwu9RA+yi7P8ePulEBoOfOfMU/70nTRNhFoAAQK2vyO
fvQCRY+4gf6Y76iY+WBXlf/2Iq4Kd4Rbs/Jr3MBC9ov8owqZKlnZ4u3HXrCQPin5
ULS256Een4g8lnVZr48Dc0v6PWvu3AoHH6+gGsxFozKvmh+x5UXW+gUYozsvd/cW
y61RARwo0F1ZJRil95Qgp/0jk0uAjTPdU5q5/owMIaFEoHK+1oHruj7dajdoJ22y
9URXuCMwMKJIcefGvu8BWwuCZQx0zF16NffYmqkm3DPIobzNzCcMIbKNq6LPpgD4
AnDtaw9Bhoq3O4/pVI3AMqEpBtHRJdWBoObFG3Lg3TpYDIrWSPzjaDo+HNwgD5u4
7a1AqVrl1ZkTZIuJSfS7zZdeL5l8K02qYM1yjX13PderGTCzGmFVR4qRmItT9oVS
zIl0mnoFngUxw9qiTRHgkcQ90Z65KwWcJDBoX5bVxanEnOQXdToaJ3TG5Fh1L4lv
MWJhSe46Pdw=
=w5Zl
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.10/ti-sysc-drop-pdata-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/soc
Add initial genpd support for omaps to drop more platform data
We now drop legacy platform data for RTC on am3, am4 and dra7.
And we add initial genpd support for PRM (Power and Reset Manager)
and use it to drop legacy platform data for am3 sgx and omap4/5
l4_abe interconnect instance.
* tag 'omap-for-v5.10/ti-sysc-drop-pdata-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Drop legacy platform data for dra7 rtcss
ARM: OMAP2+: Drop legacy platform data for am3 and am4 rtc
soc: ti: pm33xx: Simplify RTC usage to prepare to drop platform data
ARM: dts: Configure omap4 and 5 l4_abe for genpd and drop platform data
ARM: dts: Configure am3 and am4 sgx for genpd and drop platform data
soc: ti: omap-prm: Configure omap4 and 5 l4_abe power domain
soc: ti: omap-prm: Configure sgx power domain for am3 and am4
soc: ti: omap-prm: Add basic power domain support
dt-bindings: omap: Update PRM binding for genpd
Link: https://lore.kernel.org/r/pull-1599132307-761202@atomide.com-2
Signed-off-by: Olof Johansson <olof@lixom.net>
- Drop a static qualifier in integrator_soc_init()
- Remove Integrator and Versatile from PHYS_OFFSET
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAl9OEHkACgkQQRCzN7AZ
XXPFcQ/+JV/W2nI5QQ0tE0OpUwDdfmkU93dEgF38tNB97LnG/mhS5T7u78u8/d8H
CBurShFXq3I/75Gfxno741K1h3qtf0XlYsuQ9vN0aDP3lqcgaQtfAlYDA/cg7z6a
ppanIC/Akxu6zEETPCbG+j0n/TIQqWuT+0y+65jbeKm+eAEVDy/sPIXuVd5YTDd2
8f1EjLywMzSDfmn3YP6AOzoQWg0HPC52bzea0MAFv0L9vOa2X4/SkJnFGPyJu46h
jgrobaaqOKNq/7lxUfXBsfEEE5QbEQ26G67rIVAjYGk8CjdfWg0qJUBsDpKgnfVt
79VnKqk13YJ2ywlD2+IG+rbWraE+ZI9aShITx3JFR3JM9Nsjbae/myYN+9Hqh75v
Sxs7V0mEqtt4sf0+Dxvw97FmOGIB827V1q4kzglk9jiP1flf+orVhFYjtbNzEQld
RTceCK9W4thPkJJnCx6id0GkYG0EnIaCrfY3pMuZDvO45M15E9zdPD+0FzwtYtFE
jcGtINCfKOUJujLu3QfwbheInHTY+MnEo6crI0q7MRElg8YDtSWiSjyBJ2A/Fcs1
iGIrrthBNoBfNBCODBuYE8WbjTpZ8SX8OQLdjcFqjmzrTlgdcIJQZVqNGn2fGaEi
t5Ga2+gU3YFcqm9XsK7tWNMbwi+IvxzkjWRdPDplNoYClcK/i5w=
=xtzo
-----END PGP SIGNATURE-----
Merge tag 'versatile-soc-v5.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into arm/soc
Versatile SoC updates for the v5.10 kernel cycle:
- Drop a static qualifier in integrator_soc_init()
- Remove Integrator and Versatile from PHYS_OFFSET
* tag 'versatile-soc-v5.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: versatile: Remove Integrator and Realview from PHYS_OFFSET
soc: integrator: Drop pointless static qualifier in integrator_soc_init()
Link: https://lore.kernel.org/r/CACRpkdYYDSg8FAjJAqew5yEu7H1Y3E1rPN9TL25K31T=QWATuA@mail.gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
Big cleanup for the Samsung S3C24xx and S3C64xx platforms, although it
also touches files shared with S5Pv210 and Exynos. This is mostly Arnd
Bergmann work which Krzysztof Kozlowski took over, rebased and polished.
The goal is to cleanup, merge and finally make the Samsung S3C24xx and
S3C64xx architectures multiplatform. The multiplatform did not happen
yet here - just cleaning up and merging into one arch/arm/mach-s3c
directory. However this is step forward for multiplatform or at least
to keep this code still maintainable.
This pulls also branch with changes for Samsung SoC sound drivers from
broonie/sound because the cleanups there were part of this series and
all further patches depend on them.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAl9NGucQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD1zzWD/0T5JdPls++8JUK04hxkunMJO3Ye2ir/a2C
YAI2M6fbOludcPeGCRnPBZ3uTbeSOXFrV6UuSVi8EVKoAb0EV3G50XGQecmy/TVx
nq/c90gtnsODL0Kxjm0767WZl9clKaIE3+VNSyQXAhqJqXK8A1L8ovsUpQEj6fr4
vaNQi6lW7o0r98OEB14M0z59lSWjanUZ33/R22L3AsRihlJTH0Sye2+zVG85LfMD
5okekSHndt2/NCUxgLTZIkp/cD/pzmhMRZTl1zWvZPPFsbzpuB9wZt46b7vkEzuN
NgPElEB9AJgyh/28D064lER6TFhz3TcATZjmEIXX+3tYIaoA2lj60QiSejM2FyBk
U5a0DYAyzwNs4R1GSQxrKnQS1AXQ+yoDniPcyNaSmuZbxaodAs9Hjxg9KfJ2bfs5
DFfSUJhf1Uam8UYolMbXqSkhd2KQjXpkF0eLK7sGk3wanO+YEqVs777fHpwIPLmd
767PD0YN+EfDUwmXAJ5Jgv2kvOJIGul7BTgpWtbRHEaDvLHRQl5OhjsWsj9kWCFX
fx0Jz1sAUqi+gNq3XUFM88/VPEkTgejmVRULnBxqVsar5b/0BeRJEgA6Ljycv0Jv
2ux5zdMuX/+Xc4zdaJOWaL8NqRuT8nSynKXbWHTzJk4cF3p12/g3q3LOHBBLcLL6
AzTEA6iZ0w==
=bjMI
-----END PGP SIGNATURE-----
Merge tag 'samsung-soc-s3c-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/soc
Samsung S3C24xx and S3C64xx machine code cleanup for v5.10
Big cleanup for the Samsung S3C24xx and S3C64xx platforms, although it
also touches files shared with S5Pv210 and Exynos. This is mostly Arnd
Bergmann work which Krzysztof Kozlowski took over, rebased and polished.
The goal is to cleanup, merge and finally make the Samsung S3C24xx and
S3C64xx architectures multiplatform. The multiplatform did not happen
yet here - just cleaning up and merging into one arch/arm/mach-s3c
directory. However this is step forward for multiplatform or at least
to keep this code still maintainable.
This pulls also branch with changes for Samsung SoC sound drivers from
broonie/sound because the cleanups there were part of this series and
all further patches depend on them.
* tag 'samsung-soc-s3c-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (62 commits)
ARM: s3c: Avoid naming clash of S3C24xx and S3C64xx timer setup
ARM: s3c: Cleanup from old plat-samsung include
ARM: s3c: make headers local if possible
ARM: s3c: move into a common directory
ARM: s3c24xx: stop including mach/hardware.h from mach/io.h
cpufreq: s3c24xx: move low-level clk reg access into platform code
cpufreq: s3c2412: use global s3c2412_cpufreq_setrefresh
ARM: s3c: remove cpufreq header dependencies
cpufreq: s3c24xx: split out registers
fbdev: s3c2410fb: remove mach header dependency
ARM: s3c24xx: bast: avoid irq_desc array usage
ARM: s3c24xx: spi: avoid hardcoding fiq number in driver
ARM: s3c24xx: include mach/irqs.h where needed
ARM: s3c24xx: move s3cmci pinctrl handling into board files
ARM: s3c24xx: move iis pinctrl config into boards
ARM: s3c24xx: move spi fiq handler into platform
ARM: s3c: adc: move header to linux/soc/samsung
ARM: s3c24xx: move irqchip driver back into platform
ARM: s3c24xx: move regs-spi.h into spi driver
ARM: s3c64xx: remove mach/hardware.h
...
Link: https://lore.kernel.org/r/20200831154751.7551-1-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
The IEPCLK_MUX is present on all SoCs whereas the CORECLK_MUX is present
only on AM65x SoCs and J721E. Add support for both these CLK muxes.
This allows the clock rates and clock parents for these to be controlled
through DT leveraging the clk infrastructure for configuring the default
parents and rates.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Current implementation of the genpd support over TI SCI uses a single
genpd across the whole SoC, and attaches multiple devices to this. This
solution has its drawbacks, like it is currently impossible to attach
more than one power domain to a device; the core genpd implementation
requires one genpd per power-domain entry in DT for a single device.
Also, some devices like USB apparently require their own genpd during
probe time, the current shared approach in use does not work at all.
Switch the implementation over to use a single genpd per power domain
entry in DT. The domains are registered with the onecell approach, but
we also add our own xlate service due to recent introduction of the
extended flag for TI SCI PM domains; genpd core xlate service requires
a single cell per powerdomain, but we are using two cells.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
The K3 J721E family of SoCs have a revised version of the PRU-ICSS (ICSSG)
processor subsystem present on K3 AM65x SoCs. These SoCs contain typically
two ICSSG instances named ICSSG0 and ICSSG1. The two ICSSGs are identical
to each other for the most part with minor SoC integration differences and
capabilities. The ICSSG1 supports slightly enhanced features like SGMII
mode Ethernet, while the ICSSG0 instance is limited to MII mode only.
There is no change in the Interrupt Controller w.r.t AM65x. All other
integration aspects are very similar to the ICSSGs on AM65x SoCs.
The existing pruss platform driver has been updated to support these new
ICSSG instances through new J721E specific compatibles.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
The K3 AM65x family of SoCs have the next generation of the PRU-ICSS
processor subsystem capable of supporting Gigabit Ethernet, and is
commonly referred to as ICSSG. These SoCs contain typically three
ICSSG instances named ICSSG0, ICSSG1 and ICSSG2. The three ICSSGs are
identical to each other for the most part with minor SoC integration
differences and capabilities. The ICSSG2 supports slightly enhanced
features like SGMII mode Ethernet, while the ICSS0 and ICSSG1 instances
are limited to MII mode only.
The ICSSGs on K3 AM65x SoCs are in general super-sets of the PRUSS on the
AM57xx/66AK2G SoCs. They include two additional auxiliary PRU cores called
RTUs and few other additional sub-modules. The interrupt integration is
also different on the K3 AM65x SoCs and are propagated through various
SoC-level Interrupt Router and Interrupt Aggregator blocks. Other IP level
differences include different constant tables, differences in system event
interrupt input sources etc. They also do not have a programmable module
reset line like those present on AM33xx/AM43xx SoCs. The modules are reset
just like any other IP with the SoC's global cold/warm resets.
The existing pruss platform driver has been updated to support these new
ICSSG instances through new AM65x specific compatibles. A build dependency
with ARCH_K3 is added to enable building all the existing PRUSS platform
drivers for this ARMv8 platform.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
The 66AK2G SoC supports two PRU-ICSS instances, named PRUSS0 and PRUSS1,
each of which has two PRU processor cores. The two PRU-ICSS instances
are identical to each other with few minor SoC integration differences,
and are very similar to the PRU-ICSS1 of AM57xx/AM43xx. The Shared Data
RAM size is larger and the number of interrupts coming into MPU INTC
is like the instances on AM437x. There are also few other differences
attributing to integration in Keystone architecture (like no SYSCFG
register or PRCM handshake protocols). Other IP level differences
include different constant table, differences in system event interrupt
input sources etc. They also do not have a programmable module reset
line like those present on AM33xx/AM43xx SoCs. The modules are reset
just like any other IP with the SoC's global cold/warm resets.
The existing PRUSS platform driver has been enhanced to support these
66AK2G PRU-ICSS instances through new 66AK2G specific compatible for
properly probing and booting all the different PRU cores in each
PRU-ICSS processor subsystem. A build dependency with ARCH_KEYSTONE
is added to enable the driver to be built in K2G-only configuration.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
The AM57xx family of SoCs supports two PRU-ICSS instances, each of
which has two PRU processor cores. The two PRU-ICSS instances are
identical to each other, and are very similar to the PRU-ICSS1 of
AM33xx/AM43xx except for a few minor differences like the RAM sizes
and the number of interrupts coming into the MPU INTC. They do
not have a programmable module reset line unlike those present on
AM33xx/AM43xx SoCs. The modules are reset just like any other IP
with the SoC's global cold/warm resets. Each PRU-ICSS's INTC is also
preceded by a Crossbar that enables multiple external events to be
routed to a specific number of input interrupt events. Any interrupt
event directed towards PRUSS needs this crossbar to be setup properly
on the firmware side.
The existing PRUSS platform driver has been enhanced to support
these AM57xx PRU-ICSS instances through new AM57xx specific
compatible for properly probing and booting all the different PRU
cores in each PRU-ICSS processor subsystem. A build dependency with
SOC_DRA7XX is also added to enable the driver to be built in
AM57xx-only configuration (there is no separate Kconfig option
for AM57xx vs DRA7xx).
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
The AM437x SoCs have two different PRU-ICSS subsystems: PRU-ICSS1
and a smaller PRU-ICSS0. Enhance the PRUSS platform driver to support
both the PRU-ICSS sub-systems on these SoCs.
The PRU-ICSS1 on AM437x is very similar to the PRU-ICSS on AM33xx
except for few minor differences - increased Instruction RAM, increased
Shared Data RAM2, and 1 less interrupt (PRUSS host interrupt 7 which is
redirected to the other PRUSS) towards the MPU INTC. The PRU-ICSS0 is
a cut-down version of the IP, with less DRAM per PRU, no Shared DRAM etc.
It also does not have direct access to L3 bus regions, there is a single
interface to L3 for both PRUSS0 and PRUSS1, and it would have to go
through the PRUSS1's interface. The PRUSS_SYSCFG register is reserved on
PRUSS0, so any external access requires the programming the corresponding
PRUSS_SYSCFG register in PRUSS1. It does have its own dedicated I/O lines
though. Note that this instance does not support any PRU Ethernet related
use cases.
The adaptation uses SoC-specific compatibles in the driver and uses
a newly introduced pruss_match_private_data structure and the
pruss_get_private_data() function to retrieve a PRUSS instance specific
data using a device-name based lookup logic. The reset and the L3 external
access are managed by the parent interconnect ti-sysc bus driver so that
PRUSS1 and PRUSS0 can be independently supported.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
The Programmable Real-Time Unit - Industrial Communication
Subsystem (PRU-ICSS) is present on various TI SoCs such as
AM335x or AM437x or the Keystone 66AK2G. Each SoC can have
one or more PRUSS instances that may or may not be identical.
For example, AM335x SoCs have a single PRUSS, while AM437x has
two PRUSS instances PRUSS1 and PRUSS0, with the PRUSS0 being
a cut-down version of the PRUSS1.
The PRUSS consists of dual 32-bit RISC cores called the
Programmable Real-Time Units (PRUs), some shared, data and
instruction memories, some internal peripheral modules, and
an interrupt controller. The programmable nature of the PRUs
provide flexibility to implement custom peripheral interfaces,
fast real-time responses, or specialized data handling.
The PRU-ICSS functionality is achieved through three different
platform drivers addressing a specific portion of the PRUSS.
Some sub-modules of the PRU-ICSS IP reuse some of the existing
drivers (like davinci mdio driver or the generic syscon driver).
This design provides flexibility in representing the different
modules of PRUSS accordingly, and at the same time allowing the
PRUSS driver to add some instance specific configuration within
an SoC.
The PRUSS platform driver deals with the overall PRUSS and is
used for managing the subsystem level resources like various
memories and the CFG module. It is responsible for the creation
and deletion of the platform devices for the child PRU devices
and other child devices (like Interrupt Controller, MDIO node
and some syscon nodes) so that they can be managed by specific
platform drivers. The PRUSS interrupt controller is managed by
an irqchip driver, while the individual PRU RISC cores are
managed by a PRU remoteproc driver.
The driver currently supports the AM335x SoC, and support for
other TI SoCs will be added in subsequent patches.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
The AM65x SR2.0 Ringacc has fixed errata i2023 "RINGACC, UDMA: RINGACC and
UDMA Ring State Interoperability Issue after Channel Teardown". This errata
also fixed for J271E SoC.
Use SOC bus data for K3 SoC identification and enable i2023 errate w/a only
for the AM65x SR1.0. This also makes obsolete "ti,dma-ring-reset-quirk" DT
property.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Eliminate the following coccicheck warning:
drivers/soc/sunxi/sunxi_sram.c:197:2-3: Unneeded semicolon
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Jason Yan <yanaijie@huawei.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200910140546.1191280-1-yanaijie@huawei.com
The busy loop in rpmh_rsc_send_data() is written with the assumption
that the udelay will be preempted by the tcs_tx_done() irq handler when
the TCS slots are all full. This doesn't hold true when the calling
thread is an irqthread and the tcs_tx_done() irq is also an irqthread.
That's because kernel irqthreads are SCHED_FIFO and thus need to
voluntarily give up priority by calling into the scheduler so that other
threads can run.
I see RCU stalls when I boot with irqthreads on the kernel commandline
because the modem remoteproc driver is trying to send an rpmh async
message from an irqthread that needs to give up the CPU for the rpmh
irqthread to run and clear out tcs slots.
rcu: INFO: rcu_preempt self-detected stall on CPU
rcu: 0-....: (1 GPs behind) idle=402/1/0x4000000000000002 softirq=2108/2109 fqs=4920
(t=21016 jiffies g=2933 q=590)
Task dump for CPU 0:
irq/11-smp2p R running task 0 148 2 0x00000028
Call trace:
dump_backtrace+0x0/0x154
show_stack+0x20/0x2c
sched_show_task+0xfc/0x108
dump_cpu_task+0x44/0x50
rcu_dump_cpu_stacks+0xa4/0xf8
rcu_sched_clock_irq+0x7dc/0xaa8
update_process_times+0x30/0x54
tick_sched_handle+0x50/0x64
tick_sched_timer+0x4c/0x8c
__hrtimer_run_queues+0x21c/0x36c
hrtimer_interrupt+0xf0/0x22c
arch_timer_handler_phys+0x40/0x50
handle_percpu_devid_irq+0x114/0x25c
__handle_domain_irq+0x84/0xc4
gic_handle_irq+0xd0/0x178
el1_irq+0xbc/0x180
save_return_addr+0x18/0x28
return_address+0x54/0x88
preempt_count_sub+0x40/0x88
_raw_spin_unlock_irqrestore+0x4c/0x6c
___ratelimit+0xd0/0x128
rpmh_rsc_send_data+0x24c/0x378
__rpmh_write+0x1b0/0x208
rpmh_write_async+0x90/0xbc
rpmhpd_send_corner+0x60/0x8c
rpmhpd_aggregate_corner+0x8c/0x124
rpmhpd_set_performance_state+0x8c/0xbc
_genpd_set_performance_state+0xdc/0x1b8
dev_pm_genpd_set_performance_state+0xb8/0xf8
q6v5_pds_disable+0x34/0x60 [qcom_q6v5_mss]
qcom_msa_handover+0x38/0x44 [qcom_q6v5_mss]
q6v5_handover_interrupt+0x24/0x3c [qcom_q6v5]
handle_nested_irq+0xd0/0x138
qcom_smp2p_intr+0x188/0x200
irq_thread_fn+0x2c/0x70
irq_thread+0xfc/0x14c
kthread+0x11c/0x12c
ret_from_fork+0x10/0x18
This busy loop naturally lends itself to using a wait queue so that each
thread that tries to send a message will sleep waiting on the waitqueue
and only be woken up when a free slot is available. This should make
things more predictable too because the scheduler will be able to sleep
tasks that are waiting on a free tcs instead of the busy loop we
currently have today.
Reviewed-by: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
Cc: Douglas Anderson <dianders@chromium.org>
Cc: Maulik Shah <mkshah@codeaurora.org>
Cc: Lina Iyer <ilina@codeaurora.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20200724211711.810009-1-sboyd@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
For easy understanding of architecture and alphabetical merging, this
patch uses ARM32/ARM64 for description.
This prepares for sorting the menu.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87bliiv54u.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Change the RACPREFDATA(x) setting to prefetch the next 256-byte line
after 4 consecutive lines have been used, instead of after 2 consecutive
lines. This does improve the synthetic memcpy benchmark by an additional
+0.5% on top of the previous change for Cortex-A72 CPUs.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Change the RAC prefetch distance from +/- 1 to +/- 2 for Cortex-A72 CPUs
since this provides an average of a 3.8% performance increase for
synthetic memcpy benchmarks.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
72165 uses a Brahma-B53 CPU and its Bus Interface Unit, tune it
according to the existing values we have.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
72164 uses a Brahma-B53 CPU and its Bus Interface Unit, tune it
according to the existing values we have.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Now, Renesas SoC drivers are under menu, but current descriptions are
not aligned.
This patch aligns them.
- Emma Mobile EV2
- RZ/A1H (R7S72100)
...
- R-Car H2 (R8A77900)
...
- Renesas R-Car H3 ES1.x SoC Platform
...
- R-Car H2 System Controller support
- R-Car M2-W/N System Controller support
- R-Car V2H System Controller support
- R-Car E2 System Controller support
- R-Car H3 System Controller support
- R-Car M3-W System Controller support
- R-Car M3-W+ System Controller support
- R-Car M3-N System Controller support
+ SoC Platform support for Emma Mobile EV2
+ SoC Platform support for RZ/A1H+
...
+ SoC Platform support for R-Car H2
...
+ SoC Platform support for R-Car H3 ES1.x
...
+ System Controller support for R-Car H2
+ System Controller support for R-Car M2-W/N
+ System Controller support for R-Car V2H
+ System Controller support for R-Car E2
+ System Controller support for R-Car H3
+ System Controller support for R-Car M3-W
+ System Controller support for R-Car M3-W+
+ System Controller support for R-Car M3-N
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87zh6kyedc.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Renesas related SoC settings are located on TOP level menu,
thus it is very verbose.
This patch groups Renesas related settings into
"Renesas SoC driver support" menu.
And it aligns config menu names.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87k0xxho7t.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
The OPP core manages various resources, e.g. clocks or interconnect paths.
These resources are looked up when the OPP table is allocated once
dev_pm_opp_get_opp_table() is called the first time (either directly
or indirectly through one of the many helper functions).
At this point, the resources may not be available yet, i.e. looking them
up will result in -EPROBE_DEFER. Unfortunately, dev_pm_opp_get_opp_table()
is currently unable to propagate this error code since it only returns
the allocated OPP table or NULL.
This means that all consumers of the OPP core are required to make sure
that all necessary resources are available. Usually this happens by
requesting them, checking the result and releasing them immediately after.
For example, we have added "dev_pm_opp_of_find_icc_paths(dev, NULL)" to
several drivers now just to make sure the interconnect providers are
ready before the OPP table is allocated. If this call is missing,
the OPP core will only warn about this and then attempt to continue
without interconnect. This will eventually fail horribly, e.g.:
cpu cpu0: _allocate_opp_table: Error finding interconnect paths: -517
... later ...
of: _read_bw: Mismatch between opp-peak-kBps and paths (1 0)
cpu cpu0: _opp_add_static_v2: opp key field not found
cpu cpu0: _of_add_opp_table_v2: Failed to add OPP, -22
This example happens when trying to use interconnects for a CPU OPP
table together with qcom-cpufreq-nvmem.c. qcom-cpufreq-nvmem calls
dev_pm_opp_set_supported_hw(), which ends up allocating the OPP table
early. To fix the problem with the current approach we would need to add
yet another call to dev_pm_opp_of_find_icc_paths(dev, NULL).
But actually qcom-cpufreq-nvmem.c has nothing to do with interconnects...
This commit attempts to make this more robust by allowing
dev_pm_opp_get_opp_table() to return an error pointer. Fixing all
the usages is trivial because the function is usually used indirectly
through another helper (e.g. dev_pm_opp_set_supported_hw() above).
These other helpers already return an error pointer.
The example above then works correctly because set_supported_hw() will
return -EPROBE_DEFER, and qcom-cpufreq-nvmem.c already propagates that
error. It should also be possible to remove the remaining usages of
"dev_pm_opp_of_find_icc_paths(dev, NULL)" from other drivers as well.
Note that this commit currently only handles -EPROBE_DEFER for the
clock/interconnects within _allocate_opp_table(). Other errors are just
ignored as before. Eventually those should be propagated as well.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
[ Viresh: skip checking return value of dev_pm_opp_get_opp_table() for
EPROBE_DEFER in domain.c, fix NULL return value and reorder
code a bit in core.c, and update exynos-asv.c ]
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
We must re-enable the RTC module clock enabled in RTC+DDR suspend, and
pm33xx has been using platform data callbacks for that. Looks like for
retention suspend the RTC module clock must not be re-enabled.
To remove the legacy platform data callbacks, and eventually be able to
drop the RTC legacy platform data, let's manage the RTC module clock
and register range directly in pm33xx.
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
dev_err_probe() can reduce code size, uniform error handling and record the
defer probe reason etc., use it to simplify the code.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Guido Günther <agx@sigxcpu.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
There is no need to have the 'struct regmap *syscon_regmap' variable
static since new value always be assigned before use it.
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Link: https://lore.kernel.org/r/20200715024701.28356-1-yuehaibing@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This is the only part of plat-samsung that is really
shared between the s3c and s5p ports. Moving it to
drivers/soc/ lets us make them completely independent.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20200806182059.2431-16-krzk@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Let's add omap4 and 5 l4_abe interconnect instance for the power
domain.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Let's configure only sgx power domain for am3 and am4 to start with.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The PRM controller has currently only support for resets while the power
domains are still handled in the platform code.
Let's add basic power domain support to enable and disable a PRM
controlled power domain if configured in the devicetree. This can be
used for various hardware accelerators, and interconnect instances.
Further support can be added later on as needed for runtime configuration
based on domain-idle-states.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
BCM6318, BCM6328, BCM6362 and BCM63268 SoCs have a power domain controller
to enable/disable certain components in order to save power.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Florian Fainelli <F.fainelli@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Brahma-B53 and Cortex-A72 CPUs integrated on Broadcom STB SoCs feature a
read-ahead cache that performs cache line size adaptation between the
bus interface unit and the memory controller.
On 32-bit ARM kernels we have to resort to a full featured read-ahead
cache driver under arch/arm/mm/cache-b15-rac.c (CONFIG_CACHE_B15_RAC)
because there are still cache maintenance operations by set/ways/index
that cannot be transparently handled by the ARM Coherency Extension that
the read-ahead cache interfaces to.
The 64-bit ARM kernel however has long deprecated all of those, so this
is simply a one time configuration.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Pull misc vfs updates from Al Viro:
"No common topic whatsoever in those, sorry"
* 'work.misc' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs:
fs: define inode flags using bit numbers
iov_iter: Move unnecessary inclusion of crypto/hash.h
dlmfs: clean up dlmfs_file_{read,write}() a bit
framework we just have some minor tweaks and a debugfs feature, so not much to
see there. The driver updates are fairly well split between AT91 and Qualcomm
clk support. Adding those two drivers together equals about 50% of the
diffstat. Otherwise, the big amount of work this time was on supporting
Broadcom's Raspberry Pi firmware clks. See below for some more highlights.
Core:
- Document clk_hw_round_rate() so it gets some more use
- Remove unused __clk_get_flags()
- Add a prepare/enable debugfs feature similar to rate setting
New Drivers:
- Add support for SAMA7G5 SoC clks
- Enable CPU clks on Qualcomm IPQ6018 SoCs
- Enable CPU clks on Qualcomm MSM8996 SoCs
- GPU clk support for Qualcomm SM8150 and SM8250 SoCs
- Audio clks on Qualcomm SC7180 SoCs
- Microchip Sparx5 DPLL clk
- Add support for the new Renesas RZ/G2H (R8A774E1) SoC
Updates:
- Make defines for bcm63xx-gate clks to use in DT
- Support BCM2711 SoC firmware clks
- Add HDMI clks for BCM2711 SoCs
- Add RTC related clks on Ingenic SoCs
- Support USB PHY clks on Ingenic SoCs
- Support gate clks on BCM6318 SoCs
- RMU and DMAC/GPIO clock support for Actions Semi S500 SoCs
- Use poll_timeout functions in Rockchip clk driver
- Support Rockchip rk3288w SoC variant
- Mark mac_lbtest critical on Rockchip rk3188
- Add CAAM clock support for i.MX vf610 driver
- Add MU root clock support for i.MX imx8mp driver
- Amlogic g12: add neural network accelerator clock sources
- Amlogic meson8: remove critical flag for main PLL divider
- Amlogic meson8: add video decoder clock gates
- Convert one more Renesas DT binding to json-schema
- Enhance critical clock handling on Renesas platforms to only consider
clocks that were enabled at boot time
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAl8tspERHHNib3lkQGtl
cm5lbC5vcmcACgkQrQKIl8bklSX0og//TXp134IBXVZ2Z5Wca4J41itv7tPGJFsX
EslQ/eMm6xhGEqqrA6BVsQ228JF9rUmg1fbvdl82UPK7Zyp9P2fo6CMC65ngDTky
B1rLZOaKitER9JdL9DmmnIR772pI//rAMdIeVC/Jn5RR7OpP4lgY6+qvK0pJjVFl
8aK3uHY+UWVFtqZxuJEAAyZBq1+bREqmVwNC1my6kmMIf0j0KwcGhrZgASWWtjQK
4TRmroehLC4FBqnJ78Y3E6UAOBlz6C7XnP38qJge2672Ef7QhXZU7AGrGiTtxc4h
5fB6MNMF+5QGel54qR1eH+JxaEoKsAjLaX1VBr7hAHrGIQ26dBFHFPsPvWDA+VVR
4bwXJKz2objAWyqlMVM/cVV3q6uDixuScdrw2aAiojmV7ZvdZXflacdmZuS5v7e4
sh86llN+lF0YrViYz33z+up0risCAi089xVo7Z99VgyLe2DR8TE+4/d6DQTFRNxl
m66m6mlB9pPPgIV028SAf/zmzyoVWEarwdEAQPjJC6KVRbnR9mFlhSiTQMmCsSvU
zHRxVcInc+8qIJY6VJ552UFu/JAan/AFl5knb+kW21a7hM8p81H9HuSnS4aHDDq4
yETPU3XSMYz8ARHX4lKo1UIB6+k9iF2CWdCP+gXHNP+QYSAsRBIJsonjul9lLUCi
8i6mUGkS0OU=
=QLRg
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"It looks like a smaller batch of clk updates this time around.
In the core framework we just have some minor tweaks and a debugfs
feature, so not much to see there. The driver updates are fairly well
split between AT91 and Qualcomm clk support. Adding those two drivers
together equals about 50% of the diffstat.
Otherwise, the big amount of work this time was on supporting
Broadcom's Raspberry Pi firmware clks.
Highlights:
Core:
- Document clk_hw_round_rate() so it gets some more use
- Remove unused __clk_get_flags()
- Add a prepare/enable debugfs feature similar to rate setting
New Drivers:
- Add support for SAMA7G5 SoC clks
- Enable CPU clks on Qualcomm IPQ6018 SoCs
- Enable CPU clks on Qualcomm MSM8996 SoCs
- GPU clk support for Qualcomm SM8150 and SM8250 SoCs
- Audio clks on Qualcomm SC7180 SoCs
- Microchip Sparx5 DPLL clk
- Add support for the new Renesas RZ/G2H (R8A774E1) SoC
Updates:
- Make defines for bcm63xx-gate clks to use in DT
- Support BCM2711 SoC firmware clks
- Add HDMI clks for BCM2711 SoCs
- Add RTC related clks on Ingenic SoCs
- Support USB PHY clks on Ingenic SoCs
- Support gate clks on BCM6318 SoCs
- RMU and DMAC/GPIO clock support for Actions Semi S500 SoCs
- Use poll_timeout functions in Rockchip clk driver
- Support Rockchip rk3288w SoC variant
- Mark mac_lbtest critical on Rockchip rk3188
- Add CAAM clock support for i.MX vf610 driver
- Add MU root clock support for i.MX imx8mp driver
- Amlogic g12: add neural network accelerator clock sources
- Amlogic meson8: remove critical flag for main PLL divider
- Amlogic meson8: add video decoder clock gates
- Convert one more Renesas DT binding to json-schema
- Enhance critical clock handling on Renesas platforms to only
consider clocks that were enabled at boot time"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (79 commits)
clk: qcom: gcc: Make disp gpll0 branch aon for sc7180/sdm845
ipq806x: gcc: add support for child probe
clk: qcom: msm8996: Make symbol 'cpu_msm8996_clks' static
clk: qcom: ipq8074: Add correct index for PCIe clocks
clk: <linux/clk-provider.h>: drop a duplicated word
clk: renesas: cpg-mssr: Add r8a774e1 support
dt-bindings: clock: renesas,cpg-mssr: Document r8a774e1
clk: Drop duplicate selection in Kconfig
clk: qcom: smd: Add support for MSM8992/4 rpm clocks
clk: qcom: ipq8074: Add missing clocks for pcie
dt-bindings: clock: qcom: ipq8074: Add missing bindings for PCIe
Replace HTTP links with HTTPS ones: Common CLK framework
clk: qcom: Add CPU clock driver for msm8996
dt-bindings: clk: qcom: Add bindings for CPU clock for msm8996
soc: qcom: Separate kryo l2 accessors from PMU driver
clk: meson: meson8b: add the vclk2_en gate clock
clk: meson: meson8b: add the vclk_en gate clock
clk: qcom: Fix return value check in apss_ipq6018_probe()
clk: bcm: dvp: Add missing module informations
clk: meson: meson8b: Drop CLK_IS_CRITICAL from fclk_div2
...
A couple of subsystems have their own subsystem maintainers but choose
to have the code merged through the soc tree as upstream, as the code
tends to be used across multiple SoCs or has SoC specific drivers itself:
- memory controllers:
Krzysztof Kozlowski takes ownership of the drivers/memory
subsystem and its drivers, starting out with a set of cleanup
patches.
A larger driver for the Tegra memory controller that was accidentally
missed for v5.8 is now added.
- reset controllers:
Only minor updates to drivers/reset this time
- firmware:
The "turris mox" firmware driver gains support for signed firmware blobs
The tegra firmware driver gets extended to export some debug information
Various updates to i.MX firmware drivers, mostly cosmetic
- ARM SCMI/SCPI:
A new mechanism for platform notifications is added, among a number
of minor changes.
- optee:
Probing of the TEE bus is rewritten to better support detection of
devices that depend on the tee-supplicant user space.
A new firmware based trusted platform module (fTPM) driver is added
based on OP-TEE
- SoC attributes:
A new driver is added to provide a generic soc_device for identifying
a machine through the SMCCC ARCH_SOC_ID firmware interface rather than
by probing SoC family specific registers.
The series also contains some cleanups to the common soc_device code.
There are also a number of updates to SoC specific drivers,
the main ones are:
- Mediatek cmdq driver gains a few in-kernel interfaces
- Minor updates to Qualcomm RPMh, socinfo, rpm drivers, mostly adding
support for additional SoC variants
- The Qualcomm GENI core code gains interconnect path voting and
performance level support, and integrating this into a number of
device drivers.
- A new driver for Samsung Exynos5800 voltage coupler for
- Renesas RZ/G2H (R8A774E1) SoC support gets added to a couple of SoC
specific device drivers
- Updates to the TI K3 Ring Accelerator driver
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl8j3y4ACgkQmmx57+YA
GNm8Iw//euEC37KaiBDhlK3mcAL7NOdITqZpq4m+ZJZBsF02NDMWktJR8bYuOgmp
kjR4LjCxa2i+UOq1Ln+zYSlS27AngZLHFM+YSG3jqDho12GYIe4OBZB/q/hkDu71
L5jCPNrZV9+GIcean2u8LOWDNlQ4SZQyZ1/gcCK7y7I8W1pVulmJRhtJ0MNkezni
gDQ+OH+6+6XY8AethWK9ubsYH7SeJX/U6I8t5KJGhPr6FlaJFZOO5RTdUkBFMHpS
i4UaT4meuqZUjwz4BhjvoYul5AT6Zc8OOTQwk1FM7dIe47aI8VkWrWci/IekxoLh
UXtKbAJxerCIdehfiygX4pKtOmRKSisS2ocWsKg46Htu11ltv0XMRgyLyGv4Vm84
g+fKfKUL0SUueDqr+jKEq2aZdyLxwV5ZUoFt3IVsXdHRkZtxpN8jmOHOjV6erLVY
m7S85U5eclNdK5Ap7RSVvQa4NP3NTUvJd1IDNIneUVyACRkxzWEKmE3ZuEO4qttS
WSDW74m5ja80pltv1umFbGAsOUTZWA+WGULeXPv4CIooaD8RL6Jzs+7tkZEEhleU
WlGBFE4eJi/ChMeyTKXPvEqsQncLSf0mGzM4/DVY6XRSTIrW+cuj1/Gsso1BJdod
aZZ76uMNHJdAt0PcxL47lDUDxhJDkTwBsfGNJseZ3sYlAQ7Wmqo=
=nezz
-----END PGP SIGNATURE-----
Merge tag 'arm-drivers-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Arnd Bergmann:
"A couple of subsystems have their own subsystem maintainers but choose
to have the code merged through the soc tree as upstream, as the code
tends to be used across multiple SoCs or has SoC specific drivers
itself:
- memory controllers:
Krzysztof Kozlowski takes ownership of the drivers/memory subsystem
and its drivers, starting out with a set of cleanup patches.
A larger driver for the Tegra memory controller that was
accidentally missed for v5.8 is now added.
- reset controllers:
Only minor updates to drivers/reset this time
- firmware:
The "turris mox" firmware driver gains support for signed firmware
blobs The tegra firmware driver gets extended to export some debug
information Various updates to i.MX firmware drivers, mostly
cosmetic
- ARM SCMI/SCPI:
A new mechanism for platform notifications is added, among a number
of minor changes.
- optee:
Probing of the TEE bus is rewritten to better support detection of
devices that depend on the tee-supplicant user space. A new
firmware based trusted platform module (fTPM) driver is added based
on OP-TEE
- SoC attributes:
A new driver is added to provide a generic soc_device for
identifying a machine through the SMCCC ARCH_SOC_ID firmware
interface rather than by probing SoC family specific registers.
The series also contains some cleanups to the common soc_device
code.
There are also a number of updates to SoC specific drivers, the main
ones are:
- Mediatek cmdq driver gains a few in-kernel interfaces
- Minor updates to Qualcomm RPMh, socinfo, rpm drivers, mostly adding
support for additional SoC variants
- The Qualcomm GENI core code gains interconnect path voting and
performance level support, and integrating this into a number of
device drivers.
- A new driver for Samsung Exynos5800 voltage coupler for
- Renesas RZ/G2H (R8A774E1) SoC support gets added to a couple of SoC
specific device drivers
- Updates to the TI K3 Ring Accelerator driver"
* tag 'arm-drivers-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (164 commits)
soc: qcom: geni: Fix unused label warning
soc: qcom: smd-rpm: Fix kerneldoc
memory: jz4780_nemc: Only request IO memory the driver will use
soc: qcom: pdr: Reorder the PD state indication ack
MAINTAINERS: Add Git repository for memory controller drivers
memory: brcmstb_dpfe: Fix language typo
memory: samsung: exynos5422-dmc: Correct white space issues
memory: samsung: exynos-srom: Correct alignment
memory: pl172: Enclose macro argument usage in parenthesis
memory: of: Correct kerneldoc
memory: omap-gpmc: Fix language typo
memory: omap-gpmc: Correct white space issues
memory: omap-gpmc: Use 'unsigned int' for consistency
memory: omap-gpmc: Enclose macro argument usage in parenthesis
memory: omap-gpmc: Correct kerneldoc
memory: mvebu-devbus: Align with open parenthesis
memory: mvebu-devbus: Add missing braces to all arms of if statement
memory: bt1-l2-ctl: Add blank lines after declarations
soc: TI knav_qmss: make symbol 'knav_acc_range_ops' static
firmware: ti_sci: Replace HTTP links with HTTPS ones
...
This fixes a potential race condition with remoteprocs by not sending
acknowledgements until after registered drivers has processed the event.
It adds IPQ6018 support to the SMD RPM driver, fixes kerneldoc in the
same and converts the related DT binding to YAML.
Finally it fixes a compilation warning in the geni serial engine driver
when compiled without CONFIG_SERIAL_EARLYCON.
-----BEGIN PGP SIGNATURE-----
iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAl8iVskbHGJqb3JuLmFu
ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FxngQAKYteK6610TV6jqcfg7B
qIMh46AVPviq9MkCpty7/rFF9ukBuA9wlPV5QLIS62b+1qKGzy2d9foNnqvZRSN2
GjDl/QTdbEhteSOHhkVtB3hFqgRV5N2X/6ep8sa/UuFxjuHUtkonHQ24Rvj4c9o2
Pjzc/e67xCTTcQeFeaDKlE66f1tF2ycyEYqXY59TjgJgv3mQqT68XPCpRcXaqG9g
kTF3LsWcqyunQXHvahgUJYgrBz/PhPKmpZI2HB/hKzFNqYAk9K0oj3VqZ/vqGFW5
a2mYoQuw189uNa+yeOjhfoipyVlMBdgw3ON54vVsdUnHP5ekisDc2pxmb03hMpA8
X8unAOFJeBEeP2t6j7ulRvRxfb/DwInvYfQpVjG2YvOhI2kbuT0zm5xHUnaqo6PR
h6lp+qnVSQHOGBbVItNLiAQljNFHzMDCQ0G7UJTtFrfvNN0BuLqibqmKwXxtPIsW
Nsic5VfJK6n4e5YpJpLbROm3vOqgA16Vk4wUAP4Cd95jphgFvZuMmo4a6FWJUc+e
tmtRKwcoq0bYBquiXtFEvdxqqFFm5RpbIOIU4d25whIaq9xth02MGycAKRHoVWfv
fGoN/7/KTmfCPZUimSKlCrNkdlLhmGOhyNG/LV4KSjXAEaRUEX+3F6vrzgq3FpAL
VrnmQsC4VpMxeOsrAb1M+xNP
=7TeI
-----END PGP SIGNATURE-----
Merge tag 'qcom-drivers-for-5.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers
Qualcomm driver additional updates for 5.9
This fixes a potential race condition with remoteprocs by not sending
acknowledgements until after registered drivers has processed the event.
It adds IPQ6018 support to the SMD RPM driver, fixes kerneldoc in the
same and converts the related DT binding to YAML.
Finally it fixes a compilation warning in the geni serial engine driver
when compiled without CONFIG_SERIAL_EARLYCON.
* tag 'qcom-drivers-for-5.9-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
soc: qcom: geni: Fix unused label warning
soc: qcom: smd-rpm: Fix kerneldoc
soc: qcom: pdr: Reorder the PD state indication ack
dt-bindings: soc: qcom: smd-rpm: Convert binding to YAML schema
soc: qcom: smd-rpm: Add IPQ6018 compatible
dt-bindings: soc: qcom: smd-rpm: Add IPQ6018 compatible
Link: https://lore.kernel.org/r/20200730051852.649761-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
If CONFIG_SERIAL_EARLYCON is not set, gcc warns this:
drivers/soc/qcom/qcom-geni-se.c: In function 'geni_se_probe'
drivers/soc/qcom/qcom-geni-se.c:914:1: warning: label 'exit' defined but not used [-Wunused-label]
exit:
^~~~
Fixes: 048eb908a1 ("soc: qcom-geni-se: Add interconnect support to fix earlycon crash")
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Link: https://lore.kernel.org/r/20200722020619.25988-1-yuehaibing@huawei.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Fix W=1 compile warnings (invalid kerneldoc):
drivers/soc/qcom/smd-rpm.c:35: warning: Function parameter or member 'dev' not described in 'qcom_smd_rpm'
drivers/soc/qcom/smd-rpm.c:99: warning: Function parameter or member 'state' not described in 'qcom_rpm_smd_write'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200729074415.28393-2-krzk@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
The Protection Domains (PD) have a mechanism to keep its resources
enabled until the PD down indication is acked. Reorder the PD state
indication ack so that clients get to release the relevant resources
before the PD goes down.
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Fixes: fbe639b44a ("soc: qcom: Introduce Protection Domain Restart helpers")
Reported-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200701195954.9007-1-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
- TI K3 Ring Accelerator updates
- Few non critical warining fixes
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJfHJ+3AAoJEHJsHOdBp5c/qgAP/RxwxIgRI2iXG+tqgotdvTfm
wgXZOW18nAyNAkGeuoWmFV1eaEx7mYtn58wCVU+lX+7Hn3JlecGCCwLJlwQzxt88
i0sCFHFYlDYecaPojEwB3/HFh/ADNIsos52laWgBA5P9wtxBDCK9/kJCn1GBIfTm
ExXU/VLZffS3u66WYkSgSM+bDRgkB0ZB1h8oNebZ7/iDPSPUGw31/4Gzs0iQbghc
Wf1ooOqyLBG+yVA1wzePmyCkmGaACJ049+AdNJHQ9rOoYVJ8RDOgY94+AWfogJfd
SsuKbuchxAieSdaL8EcU8wZZYEuyKKqRZKxgLifMfcsYizrP93nKHTktgAcyvjp+
JPBfQVvB85MrEDI8nxbuCU1Pu7L0v76ujsfIoC5RHFX+x/8W5IOKBwmpHcFPxWoe
RLGzOyzytCJ29sQLH7o/15A0jnWUIiquro+4ZavWckXXUNhsPJAPzhfFSH/kpB2K
47EMK9GX8wPk/HuDCZSjRGI7OYz0JvXL9FHwUgvERcWhpUOS3VyI1+Wj6jRdrTML
qbd+J0Bg5GzzxgQmUbvyqIv2eqOJUx/PEe3QriO2t5MDOXtwl/UsN3zuxPsRItJw
FFA2wb5l55Z717FxjdhCFUdCIPUTKauRbNaGrV5dJyAQiWCeZdtc0KbA/e6e2Lpm
gSUghw3Gu5JdO6T3ghbn
=Y8Sq
-----END PGP SIGNATURE-----
Merge tag 'drivers_soc_for_5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers
SOC: TI Keystone driver update for v5.9
- TI K3 Ring Accelerator updates
- Few non critical warining fixes
* tag 'drivers_soc_for_5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
soc: TI knav_qmss: make symbol 'knav_acc_range_ops' static
firmware: ti_sci: Replace HTTP links with HTTPS ones
soc: ti/ti_sci_protocol.h: drop a duplicated word + clarify
soc: ti: k3: fix semicolon.cocci warnings
soc: ti: k3-ringacc: fix: warn: variable dereferenced before check 'ring'
dmaengine: ti: k3-udma: Switch to k3_ringacc_request_rings_pair
soc: ti: k3-ringacc: separate soc specific initialization
soc: ti: k3-ringacc: add request pair of rings api.
soc: ti: k3-ringacc: add ring's flags to dump
soc: ti: k3-ringacc: Move state tracking variables under a struct
dt-bindings: soc: ti: k3-ringacc: convert bindings to json-schema
Link: https://lore.kernel.org/r/1595711814-7015-1-git-send-email-santosh.shilimkar@oracle.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The sparse tool complains as follows:
drivers/soc/ti/knav_qmss_acc.c:453:23: warning:
symbol 'knav_acc_range_ops' was not declared. Should it be static?
'knav_acc_range_ops' is not used outside of knav_qmss_acc.c,
so marks it static.
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Separate SoC specific initialization and and OF mach data in preparation of
adding support for more K3 SoCs
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Add new API k3_ringacc_request_rings_pair() to request pair of rings at
once, as in the most cases Rings are used with DMA channels, which need to
request pair of rings - one to feed DMA with descriptors (TX/RX FDQ) and
one to receive completions (RX/TX CQ). This will allow to simplify Ringacc
API users.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Add struct k3_ring *ring->flags to the ring dump.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Move the free, occ, windex and rindex under a struct. We can use memset to
zero them and it will allow a cleaner way to extend driver functionality in
the future,
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
For RPMh this fixes an issue where ktime was used during suspend, allows
the driver to be used on ARM targets and some minor cleanups.
It adds support for the latest format version in the socinfo driver and
adds identifiers for SM8250 and SDM630.
SMD-RPM gains compatibles for MSM8994 and MSM8936 and the Qualcomm SCM
gains compatibles MSM8994 and IPQ8074.
The GENI core code gains interconnect path voting and performance level
support, with subsequent patches integrating this with the SPI, I2C,
UART and QSPI drivers.
Following this the KGDB support for the GENI serial driver is improved,
the performance related to chip-select is improved for SPI and QSPI.
-----BEGIN PGP SIGNATURE-----
iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAl8WWfsbHGJqb3JuLmFu
ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FNB4QAJlOgboPQpxReZ8iJUr7
C5nyBQEa6jG2HNXKyHA/OKcpuU6kchSqzoU0N7RfsuISrA6RAeBdSc8duQkWFF2u
pqhbx5KCT5hqeU0rTNtSkKLaJUg+8s3hbnKzvQmBi+GbFUM9Davs1TdT+XpeNRX+
F9Oly7Wr4LiMA1QHy+hDPLFvQzGtrIkkgvOGXxCiIeC+p3WwlNPltKkaEo/HUirL
iIhibNwWwHLhBA5pXSew5fnzU7dOU1vsOR4F7Y1mfFP2C4vvDRzEeitcutr/dLYw
r8ptzvJUwsF2gaSaSE51Ki3ToyNrVhBw9YF00/wLcidBuvXell/VO37J7WWzMpEA
Iu1Qok+KBo03TmDOpj8nreljCewQv3H3zb0PD/RIRWU5XN7UFckvc+iA0n1m5rXE
fb0FSYfIZXHRlZCi0xr1cUD/IYXynCYFQ3p+rme8dvlaaxf3wt9jclNXnqXRBb1l
LUpC33ogD4a6lJypbnz9UjNU+3Ek7nJPoi0OfwOHmVuiOBlMOu7F6kdz5t8tM25m
K6RHWsMM2M3EsI/YGL3lGQU9EBu0r8tvkDs+JfLodrG6yoISXfUCz52XpvC3UX86
HBs0NsN47nPmbRk7WrOee/NQn0t1bW8mC7hk6SkoZ6jp4i8SKyuHeCiVXQWbKHaw
Os2m2MWfrrdnRE4O42BzEeX7
=Os4F
-----END PGP SIGNATURE-----
Merge tag 'qcom-drivers-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers
Qualcomm driver updates for v5.9
For RPMh this fixes an issue where ktime was used during suspend, allows
the driver to be used on ARM targets and some minor cleanups.
It adds support for the latest format version in the socinfo driver and
adds identifiers for SM8250 and SDM630.
SMD-RPM gains compatibles for MSM8994 and MSM8936 and the Qualcomm SCM
gains compatibles MSM8994 and IPQ8074.
The GENI core code gains interconnect path voting and performance level
support, with subsequent patches integrating this with the SPI, I2C,
UART and QSPI drivers.
Following this the KGDB support for the GENI serial driver is improved,
the performance related to chip-select is improved for SPI and QSPI.
* tag 'qcom-drivers-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (35 commits)
soc: qcom: geni: Fix NULL pointer dereference
tty: serial: qcom-geni-serial: Drop the icc bw votes in suspend for console
serial: qcom_geni_serial: Always use 4 bytes per TX FIFO word
serial: qcom_geni_serial: Make kgdb work even if UART isn't console
spi: spi-geni-qcom: Get rid of most overhead in prepare_message()
spi: spi-geni-qcom: Set the clock properly at runtime resume
spi: spi-geni-qcom: Avoid clock setting if not needed
spi: spi-qcom-qspi: Set an autosuspend delay of 250 ms
spi: spi-qcom-qspi: Avoid clock setting if not needed
spi: spi-qcom-qspi: Use OPP API to set clk/perf state
firmware: qcom_scm: Add msm8994 compatible
firmware: qcom_scm: Fix legacy convention SCM accessors
<linux/of.h>: add stub for of_get_next_parent() to fix qcom build error
dt-bindings: firmware: qcom: Add compatible for IPQ8074 SoC
spi: spi-geni-qcom: Use OPP API to set clk/perf state
tty: serial: qcom_geni_serial: Use OPP API to set clk/perf state
spi: spi-qcom-qspi: Add interconnect support
spi: spi-geni-qcom: Add interconnect support
spi: spi-geni-qcom: Combine the clock setting code
tty: serial: qcom_geni_serial: Add interconnect support
...
Link: https://lore.kernel.org/r/20200721044812.3429652-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Update SCU irq code to call pm_system_wakeup() in general MU IRQ
handler, so that system can be waked up when MU IRQ arrives.
- Move i.MX SCU soc driver into imx firmware folder to get it
initialized from i.MX SCU firmware driver.
- Clean up soc-imx-scu driver a bit by using devm_kasprintf().
- Correct postfix setting for cm40 power domain in scu-pd driver.
- Add resource management support for IMX_SCU firmware driver.
- Add more cm4 resources to i.MX SCU power domain driver.
- Select ARM_GIC_V3 from SOC_IMX8M for being able to use GICv3 driver
in AARCH32 mode Linux on AARCH64 hardware.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAl8VPiUUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM5L9wf/VY0Q2oZ+gaJRNhSfVSf7O7QpscHV
mtQZPHg81jv3D2NkOpycJ1vaJEo118Ho6vb5IfeheChyZ2eWEJKkaPpVuhyKjPhK
B+nUmFnsTm8MTL+GKA1W7g6Gg+lJN3wT/mOITNmGMW0NID4/rse/XeM18+28nNb/
2svVyc1+4uTM5m+4i+scBCdnxgBK2H71/DQYLfDvNtZesWzas1PNN1nJh10D/PMM
X6d7AZ92c//pf5eR3wpm/JKZ+hubefBNWkrpw50pNlAASbgOogXWL1GU9q3r/VAV
9dS0dW9mIlpqlONEO+2zv9v1/RnoUypkCe/FFTUsA1bJ7ZGqhxWmrYwyfg==
=7Pd6
-----END PGP SIGNATURE-----
Merge tag 'imx-drivers-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers
i.MX drivers change for 5.9:
- Update SCU irq code to call pm_system_wakeup() in general MU IRQ
handler, so that system can be waked up when MU IRQ arrives.
- Move i.MX SCU soc driver into imx firmware folder to get it
initialized from i.MX SCU firmware driver.
- Clean up soc-imx-scu driver a bit by using devm_kasprintf().
- Correct postfix setting for cm40 power domain in scu-pd driver.
- Add resource management support for IMX_SCU firmware driver.
- Add more cm4 resources to i.MX SCU power domain driver.
- Select ARM_GIC_V3 from SOC_IMX8M for being able to use GICv3 driver
in AARCH32 mode Linux on AARCH64 hardware.
* tag 'imx-drivers-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx: select ARM_GIC_V3 for i.MX8M
firmware: imx: Move i.MX SCU soc driver into imx firmware folder
firmware: imx: scu-pd: add more cm4 resources
firmware: imx: add resource management api
firmware: imx: scu-pd: fix cm40 power domain
soc: imx: scu: use devm_kasprintf
firmware: imx: make sure MU irq can wake up system from suspend mode
Link: https://lore.kernel.org/r/20200720085536.24138-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add a simple custom voltage regulator coupler for Exynos5800 SoCs, which
require coupling between "vdd_arm" and "vdd_int" regulators. This coupler
ensures that the voltage values don't go below the bootloader-selected
operation point during the boot process until the clients set their
constraints. It is achieved by assuming minimal voltage value equal to
the current value if no constraints are set. This also ensures proper
voltage balancing if any of the client driver is missing.
The balancing code comes from the regulator/core.c with the additional
logic for handling regulators without client constraints applied added.
Link: https://lore.kernel.org/r/20200721180900.13844-5-krzk@kernel.org
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
pdev struct doesn't exits for the devices whose status are disabled
from DT node, in such cases NULL is returned from 'of_find_device_by_node'
Later when we try to get drvdata from pdev struct NULL pointer dereference
is triggered.
Add a NULL check for return values to fix the issue.
We were hitting this issue when one of QUP is disabled.
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Fixes: 048eb908a1 ("soc: qcom-geni-se: Add interconnect support to fix earlycon crash")
Reported-by: Sai Prakash Ranjan <saipraka@codeaurora.org>
Signed-off-by: Akash Asthana <akashast@codeaurora.org>
Link: https://lore.kernel.org/r/1594996342-26964-1-git-send-email-akashast@codeaurora.org
[bjorn: s/wrapper_pdev/pdev/]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This adds missing SoC IDs for Tegra186 and Tegra194 and fixes a typo in
a warning message.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAl8RzC8THHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoUDDEACgT5pyhIPt8zMSc9F6s8ITBqvyjeE6
nYMiZUFhPl65eBpDCrTjGKFD1oomY4noMnikOmL374CKd4/jmeQK7FpB9AlshMH6
55jidZ25li1N/n9DgA17Dcyn7nBiuaKl4NLPveWf6zgmsWBdEItz1KtSTc7eC9ET
USmL+xwYwfdR70kYc/mX9Bgym+Jf9vmAEKTYzsbin0KpYezYZf+tXi6QdWiUze/s
klqoWayFYEeP7IPzi6hX3o306qbkLJsl0m7izNYwpOom/2BEw0mhQM13Ax9vg++C
mUtwtTzXN3pwQEZzy1XkNBU4l5ODWl9NbFF4NJD2wSzZRNRoCiesRLxPEMrK3XIp
wKki6DIniUyPU8fnKSwUIEgZHPydc/ZdVEXQHz2LTrSvAP3kyDs6QrhNjzQoO2Ij
oyihUF7fT/WP6Cg8ZueCxCSr2JYCNOrU7R3njwi/x0J416317MTgxP4YyVJnf0ld
rK3g0Ldb14WmsOar4gw2bdHuQs44Hgh12TZ1esK92TZx88Fm9x4tHTJrMHx7BW7k
eAMr81DvFE+cVe7cdvTELdq+2se6wel/kHxPy8zCMFZzaBnj0zrHhbdHV6aS//TP
dYEAaOe2VEvLzHdZ8fUrohPZf+/9AclOaNkXF0iE3tnlZBnzYnyuki6cb3EqPFZY
rtrKYNQC/eGc8A==
=B2af
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.9-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers
soc/tegra: Changes for v5.9-rc1
This adds missing SoC IDs for Tegra186 and Tegra194 and fixes a typo in
a warning message.
* tag 'tegra-for-5.9-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: fuse: Fix typo in APB MISC warning
soc/tegra: fuse: Add Tegra186 and Tegra194 SoC IDs
Link: https://lore.kernel.org/r/20200717161300.1661002-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add core support for the new RZ/G2H (R8A774E1) SoC, including System
Controller (SYSC) and Reset (RST) support.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCXxFlJQAKCRCKwlD9ZEnx
cBc5AQDuPW0JS4eKE+oARQ3EMxw3ZrEA1zzleiML19YnvEy5YgEA0UsdDlPGnRs1
dZruiWUH9xu4n7zWVZshKf2BBSSTWw0=
=+Zex
-----END PGP SIGNATURE-----
Merge tag 'renesas-drivers-for-v5.9-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers
Renesas driver updates for v5.9
- Add core support for the new RZ/G2H (R8A774E1) SoC, including System
Controller (SYSC) and Reset (RST) support.
* tag 'renesas-drivers-for-v5.9-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
soc: renesas: rcar-rst: Add support for RZ/G2H
soc: renesas: Identify RZ/G2H
soc: renesas: Add Renesas R8A774E1 config option
soc: renesas: rcar-sysc: Add r8a774e1 support
clk: renesas: Add r8a774e1 CPG Core Clock Definitions
dt-bindings: power: Add r8a774e1 SYSC power domain definitions
Link: https://lore.kernel.org/r/20200717112427.26032-3-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- assign value to register
- export finalize function and don't call explicitely from flush async
- set specific event
-----BEGIN PGP SIGNATURE-----
iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAl8PgMQXHG1hdHRoaWFz
LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH7p3A//WD2UHkTXkhk6n241oYNfEQ2Q
1vARipsooLwcBFvzAwwiq2HcnZbStG9Zp5+mvLQoJ7B2k1/NlGfR3O6BHvtnfkrs
yppP73vDuLgnj4KYfvidzqO5L/8HePQM5/b/wI9wfTOU0N3mCGnLBJXaF+udZ3YK
cAB1KmhSoIg2TBI5sMJDLfF0oo1xeBeCeX1DVzopJHKnMNn9QODYCAaNfNfbFmFB
I/udIMOljWmwW/FALFQkfEQ/lCDXngbXR+rMyZLpvELpeaiJDNRENUr579GP1+EJ
UreBp4BEYtyS68Vt0D5cFw0YL/rThZWGm20dUtOO3DZdxMga1pRw9qBM/1/wv0B9
39zO6C66IezjozwQnDmn6jSCrV/qgaamkD0hf88xSTN1F5UyPn/JdmYLOccK+fpk
r69LyVhtRyKWygl+EEAy/ai+/PfUf0z0FbheWzG+iOg+FXl+YvYeuh8MZqlrVwcm
2IJS9Dp8fAGZFi67oqT/PXRO8rwVrrOryjtYk029h/hjG855Bh7cVE2RohyPI4Lk
X4/3hzRFZC26cQH9YGbWFuV7ZgfHJLbQ8tCegQsQvjGPp4OPcV5DfHrxtLpxINCP
jk4W2rUik7EKUMjXYYp92JJWHMHWmVYx88TWVqKSS/saHkinRpMXbS1mL9qwSs0W
H1gotYKPbuKjhCT3x8c=
=+rna
-----END PGP SIGNATURE-----
Merge tag 'v5.8-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers
add new functions to cmdq helper functions
- assign value to register
- export finalize function and don't call explicitely from flush async
- set specific event
* tag 'v5.8-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
soc: mediatek: cmdq: add set event function
soc: mediatek: cmdq: export finalize function
soc: mediatek: cmdq: add assign function
Link: https://lore.kernel.org/r/01399fb4-b2d0-e41b-dfd9-f2deba0ef651@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- A couple of fixes on i.MX platform device registration code to stop
the use of invalid IRQ 0.
- Fix a regression seen on ls1021a platform, caused by commit
52102a3ba6 ("soc: imx: move cpu code to drivers/soc/imx").
- Fix a misconfiguration of audio SSI on imx6qdl-gw551x board.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAl8Nxv4UHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM4fIAf/SKUzFbQ/INaU98yW8zONnZVzD/jI
3oTnBP87YJRNiyrLF1lWLs55vfnhum7yXJZXdMbwP55fdJKVaV4StePGz9Sh4Gba
4COHOF3XvF73b4kpcCQEr1U+Y0KHEfMbkwONmerk9ZkRThY2uqcRsdj4br+XA9eU
19ppWdOYZHMjegPu0KuxJlevZJDO6s9I4MCKFWmGgWhanLeGXXd2xtJEgqTWtTnS
EFjOFdBQF+5yd0VY/j6WHBDHWa/fXhDFoAO8Wc5LMCP3VybZdciIi4mN8y0UZoNG
Q5UnBvpYMCqrBwVlyqgeDtJUvYd+33dHqsRbU3KN8yBpRnyHupR9UvcFLA==
=+Gmy
-----END PGP SIGNATURE-----
Merge tag 'imx-fixes-5.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 5.8, round 2:
- A couple of fixes on i.MX platform device registration code to stop
the use of invalid IRQ 0.
- Fix a regression seen on ls1021a platform, caused by commit
52102a3ba6 ("soc: imx: move cpu code to drivers/soc/imx").
- Fix a misconfiguration of audio SSI on imx6qdl-gw551x board.
* tag 'imx-fixes-5.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx: check ls1021a
ARM: imx: Remove imx_add_imx_dma() unused irq_err argument
ARM: imx: Provide correct number of resources when registering gpio devices
ARM: dts: imx6qdl-gw551x: fix audio SSI
Link: https://lore.kernel.org/r/20200714145649.GP15718@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
When using the geni-serial as console, its important to be
able to hit the lowest possible power state in suspend,
even with no_console_suspend.
The only thing that prevents it today on platforms like the sc7180
is the interconnect BW votes, which we certainly don't need when
the system is in suspend. So in the suspend handler mark them as
ACTIVE_ONLY (0x3) and on resume switch them back to the ALWAYS tag (0x7)
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Akash Asthana <akashast@codeaurora.org>
Tested-by: Matthias Kaehlcke <mka@chromium.org>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Link: https://lore.kernel.org/r/1594704709-26072-1-git-send-email-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Select ARM_GIC_V3, then it is able to use gic v3 driver in aarch32
mode linux on aarch64 hardware. For aarch64 mode, it not hurts
to select ARM_GIC_V3.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
fsl,ls1021a is a mach under arch/arm/mach-imx/, however it could
not use the soc driver which will break caam on ls1021a platform.
So directly return if it is compatible with fsl,ls1021a.
Fixes: 52102a3ba6 ("soc: imx: move cpu code to drivers/soc/imx")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The i.MX SCU soc driver depends on SCU firmware driver, so it has to
use platform driver model for proper defer probe operation, since
it has no device binding in DT file, a simple platform device is
created together inside the platform driver. To make it more clean,
we can just move the entire SCU soc driver into imx firmware folder
and initialized by i.MX SCU firmware driver.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The driver provides kernel level API for other drivers
to access the MSM8996 L2 cache registers.
Separating the L2 access code from the PMU driver and
making it public to allow other drivers use it.
The accesses must be separated with a single spinlock,
maintained in this driver.
Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Link: https://lore.kernel.org/r/1593766185-16346-2-git-send-email-loic.poulain@linaro.org
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
1. Addition of ARM SMCCC ARCH_SOC_ID support
2. Usage of the custom soc attribute groups already supported in the
infrastucture instead of device_create_file which eliminates the need
for any cleanup when soc is unregistered
3. Minor clean up switching to use standard DEVICE_ATTR_RO() instead of
direct __ATTR
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEunHlEgbzHrJD3ZPhAEG6vDF+4pgFAl8DT9UACgkQAEG6vDF+
4pjgmRAA1QoAG83PSis0r3w+mNnR23Qi4CsE1mQlJsQkhK+kfaimegAAOyaVKJc+
+rI8Q0NdaJBxuXeMh4p9S9gVSr8wjXrAWDGWV9vHKmRUlkhGzSUdpxJ+jsqBEnW5
FvgEkDyHLYkl82Gtq5sT8gvN8G/RTkNVj3by8W7Zuret6N6mGmpUTvCwwf6MQqQi
IvoeCVWpkxHx9dST+C6e0hePuhdIeF6db55nZ1kJUTl8uCv+GU6neDJxpjjBPhzj
U2FSrSbfi66LF1ZkdJ+1AkL3+yHQ6aAHmL9EO3rUyT+BucZWQ1tFV2KYZ/zLQJmw
IilkSImu6e8HqthmAyGCalYs/MQ9LMuolVsOQCRl+ljVyui/jtjn8260klv7wv/Y
R8PCkrf3rLI23WVLCm+CM1S4tjO+pNHT/DPqRT0Dbo3wnPE00L3mPBGlSK1eOs71
2HZJO3dkzL3OH6rY31ItrZYq5Qh4cugvfAG8D62jG+UNAfs1yn60zWuyskaW8UrD
c2r239Ba4rqdNUy6DZ7Zb/KzTg9nXeTciMTD9OFu/1im2gAxisGPl74+OhBlPTBP
hdCcDAtfvjkr1PTvSgdn//EWADbWq1frvSKEdiS1nwoGzq9MACoq6iSQnPyAU0d9
jQYa8rMZSse9dvEfIplVl0E2gX/3/Fut9L7/RoYkmtFAjsIVxpI=
=JTXs
-----END PGP SIGNATURE-----
Merge tag 'soc-attr-updates-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/drivers
SoC attributes update for v5.9
1. Addition of ARM SMCCC ARCH_SOC_ID support
2. Usage of the custom soc attribute groups already supported in the
infrastucture instead of device_create_file which eliminates the need
for any cleanup when soc is unregistered
3. Minor clean up switching to use standard DEVICE_ATTR_RO() instead of
direct __ATTR
* tag 'soc-attr-updates-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
firmware: smccc: Add ARCH_SOC_ID support
ARM: OMAP2: Use custom soc attribute group instead of device_create_file
ARM: OMAP2: Switch to use DEVICE_ATTR_RO()
soc: ux500: Use custom soc attribute group instead of device_create_file
soc: ux500: Switch to use DEVICE_ATTR_RO()
soc: integrator: Use custom soc attribute group instead of device_create_file
soc: integrator: Switch to use DEVICE_ATTR_RO()
soc: realview: Use custom soc attribute group instead of device_create_file
soc: realview: Switch to use DEVICE_ATTR_RO()
Link: https://lore.kernel.org/r/20200706165312.40697-1-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Commit c31e73121f ("base: soc: Handle custom soc information sysfs
entries") introduced custom soc attribute group in soc_device_attribute
structure but there are no users treewide. While trying to understand
the motivation and tried to use it, it was found lot of existing custom
attributes can moved to use it instead of device_create_file.
Though most of these never remove/cleanup the custom attribute as they
never call soc_device_unregister, using these custom attribute group
eliminate the need for any cleanup as the driver infrastructure will
take care of that.
Let us remove device_create_file and start using the custom attribute
group in soc_device_attribute.
Link: https://lore.kernel.org/r/20200523170859.50003-7-sudeep.holla@arm.com
Cc: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Move device attributes to DEVICE_ATTR_RO() as that would make things
a lot more "obvious" what is happening over the existing __ATTR usage.
Link: https://lore.kernel.org/r/20200523170859.50003-6-sudeep.holla@arm.com
Cc: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Commit c31e73121f ("base: soc: Handle custom soc information sysfs
entries") introduced custom soc attribute group in soc_device_attribute
structure but there are no users treewide. While trying to understand
the motivation and tried to use it, it was found lot of existing custom
attributes can moved to use it instead of device_create_file.
Though most of these never remove/cleanup the custom attribute as they
never call soc_device_unregister, using these custom attribute group
eliminate the need for any cleanup as the driver infrastructure will
take care of that.
Let us remove device_create_file and start using the custom attribute
group in soc_device_attribute.
Link: https://lore.kernel.org/r/20200523170859.50003-5-sudeep.holla@arm.com
Cc: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Move device attributes to DEVICE_ATTR_RO() as that would make things
a lot more "obvious" what is happening over the existing __ATTR usage.
Link: https://lore.kernel.org/r/20200523170859.50003-4-sudeep.holla@arm.com
Cc: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Commit c31e73121f ("base: soc: Handle custom soc information sysfs
entries") introduced custom soc attribute group in soc_device_attribute
structure but there are no users treewide. While trying to understand
the motivation and tried to use it, it was found lot of existing custom
attributes can moved to use it instead of device_create_file.
Though most of these never remove/cleanup the custom attribute as they
never call soc_device_unregister, using these custom attribute group
eliminate the need for any cleanup as the driver infrastructure will
take care of that.
Let us remove device_create_file and start using the custom attribute
group in soc_device_attribute.
Link: https://lore.kernel.org/r/20200523170859.50003-3-sudeep.holla@arm.com
Cc: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Move device attributes to DEVICE_ATTR_RO() as that would make things
a lot more "obvious" what is happening over the existing __ATTR usage.
Link: https://lore.kernel.org/r/20200523170859.50003-2-sudeep.holla@arm.com
Cc: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
The header file linux/uio.h includes crypto/hash.h which pulls in
most of the Crypto API. Since linux/uio.h is used throughout the
kernel this means that every tiny bit of change to the Crypto API
causes the entire kernel to get rebuilt.
This patch fixes this by moving it into lib/iov_iter.c instead
where it is actually used.
This patch also fixes the ifdef to use CRYPTO_HASH instead of just
CRYPTO which does not guarantee the existence of ahash.
Unfortunately a number of drivers were relying on linux/uio.h to
provide access to linux/slab.h. This patch adds inclusions of
linux/slab.h as detected by build failures.
Also skbuff.h was relying on this to provide a declaration for
ahash_request. This patch adds a forward declaration instead.
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
The OMAP developers are particularly active at hunting down regressions,
so this is a separate branch with OMAP specific fixes for the v5.8:
As Tony explains
"The recent display subsystem (DSS) related platform data changes
caused display related regressions for suspend and resume. Looks like
I only tested suspend and resume before dropping the legacy platform
data, and forgot to test it after dropping it. Turns out the main issue
was that we no longer have platform code calling pm_runtime_suspend
for DSS like we did for the legacy platform data case, and that fix
is still being discussed on the dri-devel list and will get merged
separately. The DSS related testing exposed a pile other other display
related issues that also need fixing though":
- Fix ti-sysc optional clock handling and reset status checks
for devices that reset automatically in idle like DSS
- Ignore ti-sysc clockactivity bit unless separately requested
to avoid unexpected performance issues
- Init ti-sysc framedonetv_irq to true and disable for am4
- Avoid duplicate DSS reset for legacy mode with dts data
- Remove LCD timings for am4 as they cause warnings now that we're
using generic panels
Other OMAP changes from Tony include:
- Fix omap_prm reset deassert as we still have drivers setting the
pm_runtime_irq_safe() flag
- Flush posted write for ti-sysc enable and disable
- Fix droid4 spi related errors with spi flags
- Fix am335x USB range and a typo for softreset
- Fix dra7 timer nodes for clocks for IPU and DSP
- Drop duplicate mailboxes after mismerge for dra7
- Prevent pocketgeagle header line signal from accidentally setting
micro-SD write protection signal by removing the default mux
- Fix NFSroot flakeyness after resume for duover by switching the
smsc911x gpio interrupt to back to level sensitive
- Fix regression for omap4 clockevent source after recent system
timer changes
- Yet another ethernet regression fix for the "rgmii" vs "rgmii-rxid"
phy-mode
- One patch to convert am3/am4 DT files to use the regular sdhci-omap
driver instead of the old hsmmc driver, this was meant for the
merge window but got lost in the process.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl74u60ACgkQmmx57+YA
GNmxdQ/+IOpnASgGXCurT9E6fqst5mLTxlZiPDc+lxyIwMVW2naTf0ByzJgjekVV
tn7qXbKn+WUpzcuxuAg14FF88WsSgzV64aLjbUfTde4vqtYpTpd3SArM6EQ26JMH
1LBSjmwMnF7OjTYYZF6ImHe9qGlPHPR+Dyg6n3bGC04r6gmV9OJsE9X30RUeqAGg
arC6bJqn/4zDak1015WpnxXjEXVD+APOkZgJpu1ll15aiSFmICTiLvBTqXf1r91P
jSDs6Z46E/gPtz1EvJ0GNXnRw+PBLyUMiAa/CzdELfqIOjQ2aHvZLY4ht4EtWY0P
zd/FHibO+KrFklySpjUbgHfGpoANSkFIjtGyBKqEH05P44H3DpCIyGF+6lcE1O44
7R1ztRcUa49Z1druc4n3KFQ2G9Ts8px4hcUQZLjPAR9wgCxBs2gi43joQdW+AnTr
xqbHo4aePook/vu1r96KQbw6PSrMmd4Poy7gmrQeBZlAI2cLeRvvgJMukpDEsGXA
1Vw7RhM0lzGHegZ58zvBwCwcYQO6c/q722SFGBD6fJ4SG+9yRim/hsu+QFy629a/
pphGUsTDTkgasxY/aQ/k7NLpxMHITliRBGUx5KC8fnVPkRGVCxsOYt4HFBrk2GtO
WoO5d9qRbnWzXQAUzk8bdjlE6NXJACGyJ5Swgzzm7tCZ1tbufjI=
=FFTv
-----END PGP SIGNATURE-----
Merge tag 'arm-omap-fixes-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM OMAP fixes from Arnd Bergmann:
"The OMAP developers are particularly active at hunting down
regressions, so this is a separate branch with OMAP specific
fixes for v5.8:
As Tony explains
"The recent display subsystem (DSS) related platform data changes
caused display related regressions for suspend and resume. Looks
like I only tested suspend and resume before dropping the legacy
platform data, and forgot to test it after dropping it. Turns out
the main issue was that we no longer have platform code calling
pm_runtime_suspend for DSS like we did for the legacy platform data
case, and that fix is still being discussed on the dri-devel list
and will get merged separately. The DSS related testing exposed a
pile other other display related issues that also need fixing
though":
- Fix ti-sysc optional clock handling and reset status checks for
devices that reset automatically in idle like DSS
- Ignore ti-sysc clockactivity bit unless separately requested to
avoid unexpected performance issues
- Init ti-sysc framedonetv_irq to true and disable for am4
- Avoid duplicate DSS reset for legacy mode with dts data
- Remove LCD timings for am4 as they cause warnings now that we're
using generic panels
Other OMAP changes from Tony include:
- Fix omap_prm reset deassert as we still have drivers setting the
pm_runtime_irq_safe() flag
- Flush posted write for ti-sysc enable and disable
- Fix droid4 spi related errors with spi flags
- Fix am335x USB range and a typo for softreset
- Fix dra7 timer nodes for clocks for IPU and DSP
- Drop duplicate mailboxes after mismerge for dra7
- Prevent pocketgeagle header line signal from accidentally setting
micro-SD write protection signal by removing the default mux
- Fix NFSroot flakeyness after resume for duover by switching the
smsc911x gpio interrupt to back to level sensitive
- Fix regression for omap4 clockevent source after recent system
timer changes
- Yet another ethernet regression fix for the "rgmii" vs "rgmii-rxid"
phy-mode
- One patch to convert am3/am4 DT files to use the regular sdhci-omap
driver instead of the old hsmmc driver, this was meant for the
merge window but got lost in the process"
* tag 'arm-omap-fixes-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (21 commits)
ARM: dts: am5729: beaglebone-ai: fix rgmii phy-mode
ARM: dts: Fix omap4 system timer source clocks
ARM: dts: Fix duovero smsc interrupt for suspend
ARM: dts: am335x-pocketbeagle: Fix mmc0 Write Protect
Revert "bus: ti-sysc: Increase max softreset wait"
ARM: dts: am437x-epos-evm: remove lcd timings
ARM: dts: am437x-gp-evm: remove lcd timings
ARM: dts: am437x-sk-evm: remove lcd timings
ARM: dts: dra7-evm-common: Fix duplicate mailbox nodes
ARM: dts: dra7: Fix timer nodes properly for timer_sys_ck clocks
ARM: dts: Fix am33xx.dtsi ti,sysc-mask wrong softreset flag
ARM: dts: Fix am33xx.dtsi USB ranges length
bus: ti-sysc: Increase max softreset wait
ARM: OMAP2+: Fix legacy mode dss_reset
bus: ti-sysc: Fix uninitialized framedonetv_irq
bus: ti-sysc: Ignore clockactivity unless specified as a quirk
bus: ti-sysc: Use optional clocks on for enable and wait for softreset bit
ARM: dts: omap4-droid4: Fix spi configuration and increase rate
bus: ti-sysc: Flush posted write on enable and disable
soc: ti: omap-prm: use atomic iopoll instead of sleeping one
...
- Fix LDO1 and LDO2 voltage range for a couple of i.MX8M board device
trees.
- Fix i.MX8MP UID fuse offset in i.MX8M SoC driver.
- Fix watchdog configuration in imx6ul-kontron device tree.
- Fix one build warning seen on building soc-imx8m driver with
x86_64-randconfig.
- Add missing put_device() call for a couple of mach-imx PM functions.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAl7zM08UHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM5HNAf+Kw6EPNxYom/MJ4P92gxLAtPA6AO4
+WuLYmSphhgmGAQLFU4UiTH/2sYXmT7fSDwLhfZI5XJp6j8J89Hxe2kyMomvIT92
Xbbzp7fr+2FPGgyI6ImiKTFeSZiT0LPq5fs1uF2lTP6+/SklF9yy5ynUvNULrD4b
iSAXOZkMz6Ft8dn1zYrTKPIYfsTe1zXsDgw8a9sc+0LfgiR5cBTq359jHrN5Q0Tq
NYoOHT+8V5C8BVmzp5I1zoghZEayPT2Ui1JIwBiyVij8KqZvYY3wckjPqgdfQ1vK
IzGksPWRojKAw2RKA59kpUR/pgoZH3GYnfjmCAIOkMnMSgAqz1inZZq2oA==
=iERQ
-----END PGP SIGNATURE-----
Merge tag 'imx-fixes-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 5.8:
- Fix LDO1 and LDO2 voltage range for a couple of i.MX8M board device
trees.
- Fix i.MX8MP UID fuse offset in i.MX8M SoC driver.
- Fix watchdog configuration in imx6ul-kontron device tree.
- Fix one build warning seen on building soc-imx8m driver with
x86_64-randconfig.
- Add missing put_device() call for a couple of mach-imx PM functions.
* tag 'imx-fixes-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx8m: fix build warning
ARM: imx6: add missing put_device() call in imx6q_suspend_init()
ARM: imx5: add missing put_device() call in imx_suspend_alloc_ocram()
soc: imx8m: Correct i.MX8MP UID fuse offset
ARM: dts: imx6ul-kontron: Change WDOG_ANY signal from push-pull to open-drain
ARM: dts: imx6ul-kontron: Move watchdog from Kontron i.MX6UL/ULL board to SoM
arm64: dts: imx8mm-beacon: Fix voltages on LDO1 and LDO2
arm64: dts: imx8mn-ddr4-evk: correct ldo1/ldo2 voltage range
arm64: dts: imx8mm-evk: correct ldo1/ldo2 voltage range
Link: https://lore.kernel.org/r/20200624111725.GA24312@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The recent display subsystem (DSS) related platform data changes caused
display related regressions for suspend and resume. Looks like I only
tested suspend and resume before dropping the legacy platform data, and
forgot to test it after dropping it. Turns out the main issue was that
we no longer have platform code calling pm_runtime_suspend for DSS like
we did for the legacy platform data case, and that fix is still being
discussed on the dri-devel list and will get merged separately. The DSS
related testing exposed a pile other other display related issues that
also need fixing though:
- Fix ti-sysc optional clock handling and reset status checks
for devices that reset automatically in idle like DSS
- Ignore ti-sysc clockactivity bit unless separately requested
to avoid unexpected performance issues
- Init ti-sysc framedonetv_irq to true and disable for am4
- Avoid duplicate DSS reset for legacy mode with dts data
- Remove LCD timings for am4 as they cause warnings now that we're
using generic panels
Then there is a pile of other fixes not related to the DSS:
- Fix omap_prm reset deassert as we still have drivers setting the
pm_runtime_irq_safe() flag
- Flush posted write for ti-sysc enable and disable
- Fix droid4 spi related errors with spi flags
- Fix am335x USB range and a typo for softreset
- Fix dra7 timer nodes for clocks for IPU and DSP
- Drop duplicate mailboxes after mismerge for dra7
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAl7iS6oRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXPLLBAAzcABBnwfnk+vjSHJ9QnQ/9LfJTLUIrkH
ZpB/CR6VC86STjpePaNpVN/fm5sODN4zvtpsuAvJgyF+9Hp3GRPxglC4g9cAmU8x
VFQepzgOLOQ/ubPesVWa14RgAoK29GNvfzihCKGmhOq7kz7I/PDIQr8txjw8KHqV
M8oVefWL6l95z1MwVEKvsebyloBwYx9q/+Q5bipoV/GvrQnMjaCFzEaO6n8nH0Xc
T6XsKA+4hCr94tHM3jgfSdIQYFrq38H84t986ExMVfIhh3LfNkNu7CrSIWcjTgEY
jAs/hnPQ/JzMuBivweCrfkpQYy4D/GOjueQJy2Mf3deMJUWEsgZzMOML743W307j
HvGB5c3i1HgXir6PtjQFP4RqQQpQN1b4xjYEgvd8SB6xnrbdP43YsNrm9gnqbWd8
yNqiY2+uEh7OFyOJe0Ikrr1DNh3K0dSmtqrdhtWor165W0sAqlgjFjrjH1/xcQrN
XWhjBCl/NAODNZqbxU4l6rjiSU8J0cGr8wJrZNLe4itZy9R2jPInTv8FSpfcNI32
cVdDfPc4SVl8zsfZq4vhDrS/JVG7Sp/DXXQIG04wMlA6vyK4YAHh0U40121aAE8E
AwzOh++cCeZPQB+i3qCkRMLDohC7IJVvZZ/KN1mp43dDEW+epx5tct0ZmfElr4uX
Vg84CHL/I28=
=fT9A
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.8/fixes-merge-window-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes
Fixes for omaps for v5.8
The recent display subsystem (DSS) related platform data changes caused
display related regressions for suspend and resume. Looks like I only
tested suspend and resume before dropping the legacy platform data, and
forgot to test it after dropping it. Turns out the main issue was that
we no longer have platform code calling pm_runtime_suspend for DSS like
we did for the legacy platform data case, and that fix is still being
discussed on the dri-devel list and will get merged separately. The DSS
related testing exposed a pile other other display related issues that
also need fixing though:
- Fix ti-sysc optional clock handling and reset status checks
for devices that reset automatically in idle like DSS
- Ignore ti-sysc clockactivity bit unless separately requested
to avoid unexpected performance issues
- Init ti-sysc framedonetv_irq to true and disable for am4
- Avoid duplicate DSS reset for legacy mode with dts data
- Remove LCD timings for am4 as they cause warnings now that we're
using generic panels
Then there is a pile of other fixes not related to the DSS:
- Fix omap_prm reset deassert as we still have drivers setting the
pm_runtime_irq_safe() flag
- Flush posted write for ti-sysc enable and disable
- Fix droid4 spi related errors with spi flags
- Fix am335x USB range and a typo for softreset
- Fix dra7 timer nodes for clocks for IPU and DSP
- Drop duplicate mailboxes after mismerge for dra7
* tag 'omap-for-v5.8/fixes-merge-window-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
Revert "bus: ti-sysc: Increase max softreset wait"
ARM: dts: am437x-epos-evm: remove lcd timings
ARM: dts: am437x-gp-evm: remove lcd timings
ARM: dts: am437x-sk-evm: remove lcd timings
ARM: dts: dra7-evm-common: Fix duplicate mailbox nodes
ARM: dts: dra7: Fix timer nodes properly for timer_sys_ck clocks
ARM: dts: Fix am33xx.dtsi ti,sysc-mask wrong softreset flag
ARM: dts: Fix am33xx.dtsi USB ranges length
bus: ti-sysc: Increase max softreset wait
ARM: OMAP2+: Fix legacy mode dss_reset
bus: ti-sysc: Fix uninitialized framedonetv_irq
bus: ti-sysc: Ignore clockactivity unless specified as a quirk
bus: ti-sysc: Use optional clocks on for enable and wait for softreset bit
ARM: dts: omap4-droid4: Fix spi configuration and increase rate
bus: ti-sysc: Flush posted write on enable and disable
soc: ti: omap-prm: use atomic iopoll instead of sleeping one
Link: https://lore.kernel.org/r/pull-1591889257-410830@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
QUP core clock is shared among all the SE drivers present on particular
QUP wrapper, the system will reset(unclocked access) if earlycon used after
QUP core clock is put to 0 from other SE drivers before real console comes
up.
As earlycon can't vote for it's QUP core need, to fix this add ICC
support to common/QUP wrapper driver and put vote for QUP core from
probe on behalf of earlycon and remove vote during earlycon exit call.
Signed-off-by: Akash Asthana <akashast@codeaurora.org>
Reported-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Link: https://lore.kernel.org/r/1592908737-7068-3-git-send-email-akashast@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
The write_tcs_reg_sync() may be called after timekeeping is suspended
so it's not OK to use ktime. The readl_poll_timeout_atomic() macro
implicitly uses ktime. This was causing a warning at suspend time.
Change to just loop 1000000 times with a delay of 1 us between loops.
This may give a timeout of more than 1 second but never less and is
safe even if timekeeping is suspended.
NOTE: I don't have any actual evidence that we need to loop here.
It's possibly that all we really need to do is just read the value
back to ensure that the pipes are cleaned and the looping/comparing is
totally not needed. I never saw the loop being needed in my tests.
However, the loop shouldn't hurt.
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Maulik Shah <mkshah@codeaurora.org>
Fixes: 91160150ab ("soc: qcom: rpmh-rsc: Timeout after 1 second in write_tcs_reg_sync()")
Reported-by: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20200528074530.1.Ib86e5b406fe7d16575ae1bb276d650faa144b63c@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Print sensible string instead of just "(null)" for unknown PMIC models.
Also as we are at it, do not let debugfs handler access past pmic_models
array.
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20200525164817.2938638-2-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Currently rpmh_invalidate() always returns success. Update its
return type to void.
Reviewed-by: Lina Iyer <ilina@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Suggested-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Link: https://lore.kernel.org/r/1592485553-29163-1-git-send-email-mkshah@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
rpmh-rsc driver is fairly core to system and should not be removable
once its probed. However it allows to unbind driver from sysfs using
below command which results into a crash on sc7180.
echo 18200000.rsc > /sys/bus/platform/drivers/rpmh/unbind
Lets prevent unbind at runtime by setting suppress_bind_attrs flag.
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Link: https://lore.kernel.org/r/1592808805-2437-1-git-send-email-mkshah@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Export finalize function to client which helps append eoc and jump
command to pkt. Let client decide call finalize or not.
Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Acked-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://lore.kernel.org/r/1592749115-24158-9-git-send-email-dennis-yc.hsieh@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This should be returning PTR_ERR() but it returns IS_ERR() instead.
Fixes: ffdbae28d9 ("drivers: soc: xilinx: Use mailbox IPI callback")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20200605110020.GA978434@mwanda
There is a regular need in the kernel to provide a way to declare having a
dynamically sized set of trailing elements in a structure. Kernel code should
always use “flexible array members”[1] for these cases. The older style of
one-element or zero-length arrays should no longer be used[2].
[1] https://en.wikipedia.org/wiki/Flexible_array_member
[2] https://github.com/KSPP/linux/issues/21
Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Since commit 84af7a6194 ("checkpatch: kconfig: prefer 'help' over
'---help---'"), the number of '---help---' has been gradually
decreasing, but there are still more than 2400 instances.
This commit finishes the conversion. While I touched the lines,
I also fixed the indentation.
There are a variety of indentation styles found.
a) 4 spaces + '---help---'
b) 7 spaces + '---help---'
c) 8 spaces + '---help---'
d) 1 space + 1 tab + '---help---'
e) 1 tab + '---help---' (correct indentation)
f) 1 tab + 1 space + '---help---'
g) 1 tab + 2 spaces + '---help---'
In order to convert all of them to 1 tab + 'help', I ran the
following commend:
$ find . -name 'Kconfig*' | xargs sed -i 's/^[[:space:]]*---help---/\thelp/'
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
This introduces device managed versions of functions used to register
remoteproc devices, add support for remoteproc driver specific resource
control, enables remoteproc drivers to specify ELF class and machine for
coredumps. It integrates pm_runtime in the core for keeping resources
active while the remote is booted and holds a wake source while
recoverying a remote processor after a firmware crash.
It refactors the remoteproc device's allocation path to simplify the
logic, fix a few cleanup bugs and to not clone const strings onto the
heap. Debugfs code is simplifies using the DEFINE_SHOW_ATTRIBUTE and a
zero-length array is replaced with flexible-array.
A new remoteproc driver for the JZ47xx VPU is introduced, the Qualcomm
SM8250 gains support for audio, compute and sensor remoteprocs and the
Qualcomm SC7180 modem support is cleaned up and improved.
The Qualcomm glink subsystem-restart driver is merged into the main
glink driver, the Qualcomm sysmon driver is extended to properly notify
remote processors about all other remote processors' state transitions.
-----BEGIN PGP SIGNATURE-----
iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAl7egk0bHGJqb3JuLmFu
ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FQnwQAM781m7BqSKdtbH0OzGB
K4jGX/IkWCEluXx/RuDbPFV0mx/yLOfsrSzBBYnnTl+CXTgSLFtImRvwx5BFbnAl
bRNbSlw1GLiV/w+HceIx1iKTELnkHKp4TT3zUmR+dZ+7pT1dhWXzHIjyjJPC1c7R
L8qg3qlOrM620y3OJNUo57/20Tg9WN6kBKdaeyJKjmBsENrw6wggY30ijqhMgCYr
9LgStPjtuSGgf4j55+BeTskVSnOvuun5NlVpRUVTo+ZDKTZAyO/8TKM+yWffAHc5
7WkK0z9E3lhwdNPLif+dSIvhLjiyKR2yJf5KP7n9mFhA1tRVqNXnJqMCnAnwVvzT
IpL1INYbirRwPfayhCsUSwKDTKkckKP9I/vZ7WKWJD9SWcc4eGWIifNDNGkMQ6qV
7S0+6AyCANBltRPKTl6zwXSrrHuBUNkH3r9gddT5tPJu7Klh+fjKEywpsXkUd+IY
Xo1nuT+mYrUgif0KTh656EK6YM5dFuVnZqOszzgiVUrdKeHKYBsUjWD7vS7DBeLe
pLiDfo0qMb/J0sPptMt+0Rg/b/Nt1YiddW3ZlnVmWRCRjIQRJt9LQZcQoVhVv1Sa
OQkhlvFTqIEFJfLtvp83zvL5WngxVM5Dq6mDiesAjZUhyode9ZtOGxr9zyhA4ApU
njqp4n16OxcXaqjwp+k6eK8L
=4k54
-----END PGP SIGNATURE-----
Merge tag 'rproc-v5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/andersson/remoteproc
Pull remoteproc updates from Bjorn Andersson:
"This introduces device managed versions of functions used to register
remoteproc devices, add support for remoteproc driver specific
resource control, enables remoteproc drivers to specify ELF class and
machine for coredumps. It integrates pm_runtime in the core for
keeping resources active while the remote is booted and holds a wake
source while recoverying a remote processor after a firmware crash.
It refactors the remoteproc device's allocation path to simplify the
logic, fix a few cleanup bugs and to not clone const strings onto the
heap. Debugfs code is simplifies using the DEFINE_SHOW_ATTRIBUTE and a
zero-length array is replaced with flexible-array.
A new remoteproc driver for the JZ47xx VPU is introduced, the Qualcomm
SM8250 gains support for audio, compute and sensor remoteprocs and the
Qualcomm SC7180 modem support is cleaned up and improved.
The Qualcomm glink subsystem-restart driver is merged into the main
glink driver, the Qualcomm sysmon driver is extended to properly
notify remote processors about all other remote processors' state
transitions"
* tag 'rproc-v5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/andersson/remoteproc: (43 commits)
remoteproc: Fix an error code in devm_rproc_alloc()
MAINTAINERS: Add myself as reviewer for Ingenic rproc driver
remoteproc: ingenic: Added remoteproc driver
remoteproc: Add support for runtime PM
dt-bindings: Document JZ47xx VPU auxiliary processor
remoteproc: wcss: Fix arguments passed to qcom_add_glink_subdev()
remoteproc: Fix and restore the parenting hierarchy for vdev
remoteproc: Fall back to using parent memory pool if no dedicated available
remoteproc: Replace zero-length array with flexible-array
remoteproc: wcss: add support for rpmsg communication
remoteproc: core: Prevent system suspend during remoteproc recovery
remoteproc: qcom_q6v5_mss: Remove unused q6v5_da_to_va function
remoteproc: qcom_q6v5_mss: map/unmap mpss segments before/after use
remoteproc: qcom_q6v5_mss: Drop accesses to MPSS PERPH register space
dt-bindings: remoteproc: qcom: Replace halt-nav with spare-regs
remoteproc: qcom: pas: Add SM8250 PAS remoteprocs
dt-bindings: remoteproc: qcom: pas: Add SM8250 remoteprocs
remoteproc: qcom_q6v5_mss: Extract mba/mpss from memory-region
dt-bindings: remoteproc: qcom: Use memory-region to reference memory
remoteproc: qcom: pas: Add SC7180 Modem support
...
Here is the large set of char/misc driver patches for 5.8-rc1
Included in here are:
- habanalabs driver updates, loads
- mhi bus driver updates
- extcon driver updates
- clk driver updates (approved by the clock maintainer)
- firmware driver updates
- fpga driver updates
- gnss driver updates
- coresight driver updates
- interconnect driver updates
- parport driver updates (it's still alive!)
- nvmem driver updates
- soundwire driver updates
- visorbus driver updates
- w1 driver updates
- various misc driver updates
In short, loads of different driver subsystem updates along with the
drivers as well.
All have been in linux-next for a while with no reported issues.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-----BEGIN PGP SIGNATURE-----
iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCXtzkHw8cZ3JlZ0Brcm9h
aC5jb20ACgkQMUfUDdst+yldOwCgus/DgpnI1UL4z+NdBxJrAXtkPmgAn2sgTUea
i5RblCmcVMqvHaGtYkY+
=tScN
-----END PGP SIGNATURE-----
Merge tag 'char-misc-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char/misc driver updates from Greg KH:
"Here is the large set of char/misc driver patches for 5.8-rc1
Included in here are:
- habanalabs driver updates, loads
- mhi bus driver updates
- extcon driver updates
- clk driver updates (approved by the clock maintainer)
- firmware driver updates
- fpga driver updates
- gnss driver updates
- coresight driver updates
- interconnect driver updates
- parport driver updates (it's still alive!)
- nvmem driver updates
- soundwire driver updates
- visorbus driver updates
- w1 driver updates
- various misc driver updates
In short, loads of different driver subsystem updates along with the
drivers as well.
All have been in linux-next for a while with no reported issues"
* tag 'char-misc-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (233 commits)
habanalabs: correctly cast u64 to void*
habanalabs: initialize variable to default value
extcon: arizona: Fix runtime PM imbalance on error
extcon: max14577: Add proper dt-compatible strings
extcon: adc-jack: Fix an error handling path in 'adc_jack_probe()'
extcon: remove redundant assignment to variable idx
w1: omap-hdq: print dev_err if irq flags are not cleared
w1: omap-hdq: fix interrupt handling which did show spurious timeouts
w1: omap-hdq: fix return value to be -1 if there is a timeout
w1: omap-hdq: cleanup to add missing newline for some dev_dbg
/dev/mem: Revoke mappings when a driver claims the region
misc: xilinx-sdfec: convert get_user_pages() --> pin_user_pages()
misc: xilinx-sdfec: cleanup return value in xsdfec_table_write()
misc: xilinx-sdfec: improve get_user_pages_fast() error handling
nvmem: qfprom: remove incorrect write support
habanalabs: handle MMU cache invalidation timeout
habanalabs: don't allow hard reset with open processes
habanalabs: GAUDI does not support soft-reset
habanalabs: add print for soft reset due to event
habanalabs: improve MMU cache invalidation code
...
* The remainder of the code necessary to support the Kendryte K210.
* Support for building device trees into the kernel, as the K210 doesn't
have a bootloader that provides one.
* A K210 device tree and the associated defconfig update.
* Support for skipping PMP initialization on systems that trap on PMP
accesses rather than treating them as WARL.
* Support for KGDB.
* Improvements to text patching.
* Some cleanups to the SiFive L2 cache driver.
I may have a second part, but I wanted to get this out earlier rather than
later as they've been ready to go for a while now.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCgAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAl7YRtMTHHBhbG1lckBk
YWJiZWx0LmNvbQAKCRAuExnzX7sYif+oD/4kaoQqmiw0VvyFjBlPT/TC7OPbaoXO
5WBegSEAl+oOq+fUtjHomzn6HaTW2cPNexsqC/KuGP1/QL0OQ23T5O18LaCmrGMd
CvELeAcvu6G4kbRuHwF0U16hBI2A1xIYVUJ8qmbuHPpEwVel3AsP2RIjQ+bOvm7g
fVTIrlzl1s1eTsOXdOJb3sFZtISHb7o3lHZmcplDva3N13x8E0FrjuoJhHv0f2mj
kcmZcy3sr8luAkwAJmbqmdPuwYTlteMnucXdCUv/kG2SaPkBwU5TS+MN7No2ylXH
v4vxjkuSyJ1db72pla6uUB/cYD+mh2YI4tjjvH93s3k4I/GZMCrqivXZW2QtxBdt
na++GxK8e4FrBG+VCCCQvx2mqugpMFMDnZDt36N2BqwjOtEzO3W8GqjrKCovXtQf
farlgAiuFNVcoo7VFdpNZE+N5elQa0GWf57csCqqMNN4J8JLaOgyS7ByozJ9b9/A
1x4g7kQANnMvYiYAeV+C2YfBcK6x8gHEPlWio1QZqirW5la34VUEWa18+rQeSRMz
DArKPauCR1GuYZZVUkkDI8cXj0Gs5fTXsYmn+WsIpjFHnDYeYVe6Ocmczxyb3o3O
lQwm7+drHlSmMvgrOlWJMrIUbdiomgelDU/iD4PiZzKozC52yKDS6A5gzoG6uZSM
UleeAIeVG/TDCw==
=keTq
-----END PGP SIGNATURE-----
Merge tag 'riscv-for-linus-5.8-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V updates from Palmer Dabbelt:
- The remainder of the code necessary to support the Kendryte K210:
* Support for building device trees into the kernel, as the K210
doesn't have a bootloader that provides one
* A K210 device tree and the associated defconfig update
* Support for skipping PMP initialization on systems that trap on
PMP accesses rather than treating them as WARL
- Support for KGDB
- Improvements to text patching
- Some cleanups to the SiFive L2 cache driver
* tag 'riscv-for-linus-5.8-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
soc: sifive: l2 cache: Mark l2_get_priv_group as static
soc: sifive: l2 cache: Eliminate an unsigned zero compare warning
riscv: Add support to determine no. of L2 cache way enabled
riscv: cacheinfo: Implement cache_get_priv_group with a generic ops structure
riscv: Use text_mutex instead of patch_lock
riscv: Use NOKPROBE_SYMBOL() instead of __krpobes annotation
riscv: Remove the 'riscv_' prefix of function name
riscv: Add SW single-step support for KDB
riscv: Use the XML target descriptions to report 3 system registers
riscv: Add KGDB support
kgdb: Add kgdb_has_hit_break function
RISC-V: Skip setting up PMPs on traps
riscv: K210: Update defconfig
riscv: K210: Add a built-in device tree
riscv: Allow device trees to be built into the kernel
These are updates to SoC specific drivers that did not have
another subsystem maintainer tree to go through for some
reason:
- Some bus and memory drivers for the MIPS P5600 based
Baikal-T1 SoC that is getting added through the MIPS tree.
- There are new soc_device identification drivers for TI K3,
Qualcomm MSM8939
- New reset controller drivers for NXP i.MX8MP, Renesas
RZ/G1H, and Hisilicon hi6220
- The SCMI firmware interface can now work across ARM SMC/HVC
as a transport.
- Mediatek platforms now use a new driver for their "MMSYS"
hardware block that controls clocks and some other aspects
in behalf of the media and gpu drivers.
- Some Tegra processors have improved power management
support, including getting woken up by the PMIC and cluster
power down during idle.
- A new v4l staging driver for Tegra is added.
- Cleanups and minor bugfixes for TI, NXP, Hisilicon,
Mediatek, and Tegra.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl7XvgAACgkQmmx57+YA
GNmj/hAAnAJ/hYehLfgCe711HUntgeRkaoTVpCt8BJNMdxsa23sn3V6k5+WYn1uG
PtlgpefZEMHLUEEVDegR4nZXLG0Pzu1SR12KW34YPcQKkNo/+vlQ9zYUajnJ/KX6
10zdLSIzHfk1VtXKvvQQ8xFyE+S/trGmjC57E6gfoCUT3rl1maD+ccVXUBaz9oob
wuMxGXQAl57mio5yT1OfSk6Fev39xRE2dN1hzP7KUYhsemZajBwBBW5wVJZCsCB8
LCGmxVkavM7BV4r2NokbBDs5rlfedBl/P/IPd9Is5a5tuGUkSsVRG9zqShxYLGM3
S06az6POQFwXKFJoUKW0dK/Koy0D7BK+vhUBPzFv4HZ8iDCVf6Jju2MJ02GMqHPj
OOrXaCbLYrvN/edVUWeeFywqwMbYTRwC4DxyTq5m7HxEB004xTOhs0rX5aR0u4n1
bbsR97LguolwH9iEMzd3F3jCiKBcMecH3lAh5WcrtwlFIRrNhbWoGDoA/4TuORFS
b11rgsTRIJ5Vc++D1HnSnx0ZZvUzyluMvygdALnSgVah6xYe6KVw9Kg/wioAJ04G
uSTidqP3qRhsyET2HQo7CxdVfZbKfP25iKCKrdhQziztKvhF8qrUmZKloXOodRw+
ewYSRmv8c324OYYit1X43oAdW8dntq1XbSIauaqxEb4JC7x/xRY=
=44Jc
-----END PGP SIGNATURE-----
Merge tag 'arm-drivers-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM/SoC driver updates from Arnd Bergmann:
"These are updates to SoC specific drivers that did not have another
subsystem maintainer tree to go through for some reason:
- Some bus and memory drivers for the MIPS P5600 based Baikal-T1 SoC
that is getting added through the MIPS tree.
- There are new soc_device identification drivers for TI K3, Qualcomm
MSM8939
- New reset controller drivers for NXP i.MX8MP, Renesas RZ/G1H, and
Hisilicon hi6220
- The SCMI firmware interface can now work across ARM SMC/HVC as a
transport.
- Mediatek platforms now use a new driver for their "MMSYS" hardware
block that controls clocks and some other aspects in behalf of the
media and gpu drivers.
- Some Tegra processors have improved power management support,
including getting woken up by the PMIC and cluster power down
during idle.
- A new v4l staging driver for Tegra is added.
- Cleanups and minor bugfixes for TI, NXP, Hisilicon, Mediatek, and
Tegra"
* tag 'arm-drivers-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (155 commits)
clk: sprd: fix compile-testing
bus: bt1-axi: Build the driver into the kernel
bus: bt1-apb: Build the driver into the kernel
bus: bt1-axi: Use sysfs_streq instead of strncmp
bus: bt1-axi: Optimize the return points in the driver
bus: bt1-apb: Use sysfs_streq instead of strncmp
bus: bt1-apb: Use PTR_ERR_OR_ZERO to return from request-regs method
bus: bt1-apb: Fix show/store callback identations
bus: bt1-apb: Include linux/io.h
dt-bindings: memory: Add Baikal-T1 L2-cache Control Block binding
memory: Add Baikal-T1 L2-cache Control Block driver
bus: Add Baikal-T1 APB-bus driver
bus: Add Baikal-T1 AXI-bus driver
dt-bindings: bus: Add Baikal-T1 APB-bus binding
dt-bindings: bus: Add Baikal-T1 AXI-bus binding
staging: tegra-video: fix V4L2 dependency
tee: fix crypto select
drivers: soc: ti: knav_qmss_queue: Make knav_gp_range_ops static
soc: ti: add k3 platforms chipid module driver
dt-bindings: soc: ti: add binding for k3 platforms chipid module
...
One new platform gets added, the Realtek RTD1195, which is an older
Cortex-a7 based relative of the RTD12xx chips that are already supported
in arch/arm64. The platform may also be extended to support running
32-bit kernels on those 64-bit chips for memory-constrained machines.
In the Renesas shmobile platform, we gain support for "RZ/G1H" or R8A7742,
an eight-core chip based on Cortex-A15 and Cortex-A7 cores, originally
released in 2016 as one of the last high-end 32-bit designs.
There is ongoing cleanup for the integrator, tegra, imx, and omap2
platforms, with integrator getting very close to the goal of having
zero code in arch/arm/, and omap2 moving more of the chip specifics
from old board code into device tree files.
The Versatile Express platform is made more modular, with built-in
drivers now becoming loadable modules. This is part of a greater effort
for the Android OS to have a common kernel binary for all platforms and
any platform specific code in loadable modules.
The PXA platform drops support for Compulab's pxa2xx boards that had
rather unusual flash and PCI drivers but no known users remaining.
All device drivers specific to those boards can now get removed as
well.
Across platforms, there is ongoing cleanup, with Geert and Rob
revisiting some a lot of Kconfig options.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl7XvmAACgkQmmx57+YA
GNk4vRAAs3TxlwLAUk5dknAi+UstlviNPG/ys6mViFuLqktPyhkA/v6nFOBI5Ldf
8xAsaSk3+oAX3Dd7aTaudl5WMFWFtzT5xA4gEI7CBZrBaAL0BVns1JfnVxpPRIcF
B09Sb3wv7++E/+AxYcoVLWd5wkc9tlMesrIV5FPHHasOp3rRjVI0cExXnXzqJU8M
TbwrWEOczZNVAm2q4Eh1ttbuSIvPd3s4NMnI755MRSQ7u/rYFSPf6Ay8/eFTqx1e
0SMWHRmrGeP6yhLy7+Li0x0jsK3ReZ9SkLXp3iEZ9huKbBTHIPBUeBB1RMnCYGe+
M2OL+9ySSe9UI9sjvsLGPDAnJaZI/UDUOVhatZCTvYB7CZY5nYNrYp+heYFONWm6
Up3e1t2iGPbgs8/1y78a9YPxAdsW0iavRtjVUYb+nwX+savYZgSBATA1pZqLc317
5FAGmTh//OLKYBSjfAxu9H8aInJPZA595lUiPHEQujzZH5Xz0QNtv4dapeNL2I4g
LO20PMvuEgmwlwj/Npnwdl0UQK3ztoeR2upCrk91VwtNWGiOWTzCMT/OkYAAjKuo
QYMGu3UvbbTCHPsIdrUz8gZ2T3VnJoeE3ldny2QbNAtVdpH/F8htJcilrBbyv1vI
IKB1oogf5zfUwXVwZRxCfI9s5hELUlAKMGTtNcybzdsKpN5xtTo=
=gzCp
-----END PGP SIGNATURE-----
Merge tag 'arm-soc-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC updates from Arnd Bergmann:
"One new platform gets added, the Realtek RTD1195, which is an older
Cortex-a7 based relative of the RTD12xx chips that are already
supported in arch/arm64. The platform may also be extended to support
running 32-bit kernels on those 64-bit chips for memory-constrained
machines.
In the Renesas shmobile platform, we gain support for "RZ/G1H" or
R8A7742, an eight-core chip based on Cortex-A15 and Cortex-A7 cores,
originally released in 2016 as one of the last high-end 32-bit
designs.
There is ongoing cleanup for the integrator, tegra, imx, and omap2
platforms, with integrator getting very close to the goal of having
zero code in arch/arm/, and omap2 moving more of the chip specifics
from old board code into device tree files.
The Versatile Express platform is made more modular, with built-in
drivers now becoming loadable modules. This is part of a greater
effort for the Android OS to have a common kernel binary for all
platforms and any platform specific code in loadable modules.
The PXA platform drops support for Compulab's pxa2xx boards that had
rather unusual flash and PCI drivers but no known users remaining. All
device drivers specific to those boards can now get removed as well.
Across platforms, there is ongoing cleanup, with Geert and Rob
revisiting some a lot of Kconfig options"
* tag 'arm-soc-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (94 commits)
ARM: omap2: fix omap5_realtime_timer_init definition
ARM: zynq: Don't select CONFIG_ICST
ARM: OMAP2+: Fix regression for using local timer on non-SMP SoCs
clk: versatile: Fix kconfig dependency on COMMON_CLK_VERSATILE
ARM: davinci: fix build failure without I2C
power: reset: vexpress: fix build issue
power: vexpress: cleanup: use builtin_platform_driver
power: vexpress: add suppress_bind_attrs to true
Revert "ARM: vexpress: Don't select VEXPRESS_CONFIG"
MAINTAINERS: pxa: remove Compulab arm/pxa support
ARM: pxa: remove Compulab pxa2xx boards
bus: arm-integrator-lm: Fix return value check in integrator_ap_lm_probe()
soc: imx: move cpu code to drivers/soc/imx
ARM: imx: move cpu definitions into a header
ARM: imx: use device_initcall for imx_soc_device_init
ARM: imx: pcm037: make pcm970_sja1000_platform_data static
bus: ti-sysc: Timers no longer need legacy quirk handling
ARM: OMAP2+: Drop old timer code for dmtimer and 32k counter
ARM: dts: Configure system timers for omap2
ARM: dts: Configure system timers for ti81xx
...
Pull networking updates from David Miller:
1) Allow setting bluetooth L2CAP modes via socket option, from Luiz
Augusto von Dentz.
2) Add GSO partial support to igc, from Sasha Neftin.
3) Several cleanups and improvements to r8169 from Heiner Kallweit.
4) Add IF_OPER_TESTING link state and use it when ethtool triggers a
device self-test. From Andrew Lunn.
5) Start moving away from custom driver versions, use the globally
defined kernel version instead, from Leon Romanovsky.
6) Support GRO vis gro_cells in DSA layer, from Alexander Lobakin.
7) Allow hard IRQ deferral during NAPI, from Eric Dumazet.
8) Add sriov and vf support to hinic, from Luo bin.
9) Support Media Redundancy Protocol (MRP) in the bridging code, from
Horatiu Vultur.
10) Support netmap in the nft_nat code, from Pablo Neira Ayuso.
11) Allow UDPv6 encapsulation of ESP in the ipsec code, from Sabrina
Dubroca. Also add ipv6 support for espintcp.
12) Lots of ReST conversions of the networking documentation, from Mauro
Carvalho Chehab.
13) Support configuration of ethtool rxnfc flows in bcmgenet driver,
from Doug Berger.
14) Allow to dump cgroup id and filter by it in inet_diag code, from
Dmitry Yakunin.
15) Add infrastructure to export netlink attribute policies to
userspace, from Johannes Berg.
16) Several optimizations to sch_fq scheduler, from Eric Dumazet.
17) Fallback to the default qdisc if qdisc init fails because otherwise
a packet scheduler init failure will make a device inoperative. From
Jesper Dangaard Brouer.
18) Several RISCV bpf jit optimizations, from Luke Nelson.
19) Correct the return type of the ->ndo_start_xmit() method in several
drivers, it's netdev_tx_t but many drivers were using
'int'. From Yunjian Wang.
20) Add an ethtool interface for PHY master/slave config, from Oleksij
Rempel.
21) Add BPF iterators, from Yonghang Song.
22) Add cable test infrastructure, including ethool interfaces, from
Andrew Lunn. Marvell PHY driver is the first to support this
facility.
23) Remove zero-length arrays all over, from Gustavo A. R. Silva.
24) Calculate and maintain an explicit frame size in XDP, from Jesper
Dangaard Brouer.
25) Add CAP_BPF, from Alexei Starovoitov.
26) Support terse dumps in the packet scheduler, from Vlad Buslov.
27) Support XDP_TX bulking in dpaa2 driver, from Ioana Ciornei.
28) Add devm_register_netdev(), from Bartosz Golaszewski.
29) Minimize qdisc resets, from Cong Wang.
30) Get rid of kernel_getsockopt and kernel_setsockopt in order to
eliminate set_fs/get_fs calls. From Christoph Hellwig.
* git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (2517 commits)
selftests: net: ip_defrag: ignore EPERM
net_failover: fixed rollback in net_failover_open()
Revert "tipc: Fix potential tipc_aead refcnt leak in tipc_crypto_rcv"
Revert "tipc: Fix potential tipc_node refcnt leak in tipc_rcv"
vmxnet3: allow rx flow hash ops only when rss is enabled
hinic: add set_channels ethtool_ops support
selftests/bpf: Add a default $(CXX) value
tools/bpf: Don't use $(COMPILE.c)
bpf, selftests: Use bpf_probe_read_kernel
s390/bpf: Use bcr 0,%0 as tail call nop filler
s390/bpf: Maintain 8-byte stack alignment
selftests/bpf: Fix verifier test
selftests/bpf: Fix sample_cnt shared between two threads
bpf, selftests: Adapt cls_redirect to call csum_level helper
bpf: Add csum_level helper for fixing up csum levels
bpf: Fix up bpf_skb_adjust_room helper's skb csum setting
sfc: add missing annotation for efx_ef10_try_update_nic_stats_vf()
crypto/chtls: IPv6 support for inline TLS
Crypto/chcr: Fixes a coccinile check error
Crypto/chcr: Fixes compilations warnings
...
- Rework the system-wide PM driver flags to make them easier to
understand and use and update their documentation (Rafael Wysocki,
Alan Stern).
- Allow cpuidle governors to be switched at run time regardless of
the kernel configuration and update the related documentation
accordingly (Hanjun Guo).
- Improve the resume device handling in the user space hibernarion
interface code (Domenico Andreoli).
- Document the intel-speed-select sysfs interface (Srinivas
Pandruvada).
- Make the ACPI code handing suspend to idle print more debug
messages to help diagnose issues with it (Rafael Wysocki).
- Fix a helper routine in the cpufreq core and correct a typo in
the struct cpufreq_driver kerneldoc comment (Rafael Wysocki, Wang
Wenhu).
- Update cpufreq drivers:
* Make the intel_pstate driver start in the passive mode by
default on systems without HWP (Rafael Wysocki).
* Add i.MX7ULP support to the imx-cpufreq-dt driver and add
i.MX7ULP to the cpufreq-dt-platdev blacklist (Peng Fan).
* Convert the qoriq cpufreq driver to a platform one, make the
platform code create a suitable device object for it and add
platform dependencies to it (Mian Yousaf Kaukab, Geert
Uytterhoeven).
* Fix wrong compatible binding in the qcom driver (Ansuel Smith).
* Build the omap driver by default for ARCH_OMAP2PLUS (Anders
Roxell).
* Add r8a7742 SoC support to the dt cpufreq driver (Lad Prabhakar).
- Update cpuidle core and drivers:
* Fix three reference count leaks in error code paths in the
cpuidle core (Qiushi Wu).
* Convert Qualcomm SPM to a generic cpuidle driver (Stephan
Gerhold).
* Fix up the execution order when entering a domain idle state in
the PSCI driver (Ulf Hansson).
- Fix a reference counting issue related to clock management and
clean up two oddities in the PM-runtime framework (Rafael Wysocki,
Andy Shevchenko).
- Add ElkhartLake support to the Intel RAPL power capping driver
and remove an unused local MSR definition from it (Jacob Pan,
Sumeet Pawnikar).
- Update devfreq core and drivers:
* Replace strncpy() with strscpy() in the devfreq core and use
lockdep asserts instead of manual checks for a locked mutex in
it (Dmitry Osipenko, Krzysztof Kozlowski).
* Add a generic imx bus scaling driver and make it register an
interconnect device (Leonard Crestez, Gustavo A. R. Silva).
* Make the cpufreq notifier in the tegra30 driver take boosting
into account and delete an unuseful error message from that
driver (Dmitry Osipenko, Markus Elfring).
- Remove unneeded semicolon from the cpupower code (Zou Wei).
-----BEGIN PGP SIGNATURE-----
iQJGBAABCAAwFiEE4fcc61cGeeHD/fCwgsRv/nhiVHEFAl7VGjwSHHJqd0Byand5
c29ja2kubmV0AAoJEILEb/54YlRx46gP/jGAXlddFEQswi6qUT3Cff0A9mb8CdcX
dyKrjX4xxo/wtBIAwSN4achxrgse//ayo2dYTzWRDd31W9Azbv+5F+46XsDRz4hL
pH29u/E66NMtFWnHCmt78NEJn0FzSa0YBC43ZzwFwKktCK9skYIpGN2z6iuXUBSX
Q5GHqop3zvDsdKQFBGL62xvUw/AmOTPG7ohIZvqWBN2mbOqEqMcoFHT+aUF/NbLj
+i14dvTH767eDZGRVASmXWQyljjaRWm+SIw4+m8zT1D1Y3d5IFObuMN+9RQl1Tif
BYjkgJ2oDDMhCJLW7TBuJB+g7exiyaSQds3nMr2ZR+eZbJipICjU4eehNEKIUopU
DM17tHQfnwZfS/7YbCx3vYQwLkNq37AJyXS9uqCAIFM+0n4xN4/mIVmgWYISLDTs
1v9olFxtwMRNpjGGQWPJAO7ebB8Zz9qhQv7pIkSQEfwp93/SzvlVf4vvruTeFN9J
qqG60cDumXWAm+s43eQHJNn5nOd5ocWv0FBpo/cxqKbzxFVWwdB42Cm0SY+rK2ID
uHdnc2DJcK2c78UVbz3Cmk4272foJt2zxchqjFXXAZPLrOsFfzmti4B28VxGxjmP
LG3MhH5sdbF4yl/1aSC1Bnrt+PV9Lus6ut/VKhjwIpw8cqiXgpwSbMoDoaBd9UMQ
ubGz2rplGAtB
=APdj
-----END PGP SIGNATURE-----
Merge tag 'pm-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull power management updates from Rafael Wysocki:
"These rework the system-wide PM driver flags, make runtime switching
of cpuidle governors easier, improve the user space hibernation
interface code, add intel-speed-select interface documentation, add
more debug messages to the ACPI code handling suspend to idle, update
the cpufreq core and drivers, fix a minor issue in the cpuidle core
and update two cpuidle drivers, improve the PM-runtime framework,
update the Intel RAPL power capping driver, update devfreq core and
drivers, and clean up the cpupower utility.
Specifics:
- Rework the system-wide PM driver flags to make them easier to
understand and use and update their documentation (Rafael Wysocki,
Alan Stern).
- Allow cpuidle governors to be switched at run time regardless of
the kernel configuration and update the related documentation
accordingly (Hanjun Guo).
- Improve the resume device handling in the user space hibernarion
interface code (Domenico Andreoli).
- Document the intel-speed-select sysfs interface (Srinivas
Pandruvada).
- Make the ACPI code handing suspend to idle print more debug
messages to help diagnose issues with it (Rafael Wysocki).
- Fix a helper routine in the cpufreq core and correct a typo in the
struct cpufreq_driver kerneldoc comment (Rafael Wysocki, Wang
Wenhu).
- Update cpufreq drivers:
- Make the intel_pstate driver start in the passive mode by
default on systems without HWP (Rafael Wysocki).
- Add i.MX7ULP support to the imx-cpufreq-dt driver and add
i.MX7ULP to the cpufreq-dt-platdev blacklist (Peng Fan).
- Convert the qoriq cpufreq driver to a platform one, make the
platform code create a suitable device object for it and add
platform dependencies to it (Mian Yousaf Kaukab, Geert
Uytterhoeven).
- Fix wrong compatible binding in the qcom driver (Ansuel Smith).
- Build the omap driver by default for ARCH_OMAP2PLUS (Anders
Roxell).
- Add r8a7742 SoC support to the dt cpufreq driver (Lad
Prabhakar).
- Update cpuidle core and drivers:
- Fix three reference count leaks in error code paths in the
cpuidle core (Qiushi Wu).
- Convert Qualcomm SPM to a generic cpuidle driver (Stephan
Gerhold).
- Fix up the execution order when entering a domain idle state in
the PSCI driver (Ulf Hansson).
- Fix a reference counting issue related to clock management and
clean up two oddities in the PM-runtime framework (Rafael Wysocki,
Andy Shevchenko).
- Add ElkhartLake support to the Intel RAPL power capping driver and
remove an unused local MSR definition from it (Jacob Pan, Sumeet
Pawnikar).
- Update devfreq core and drivers:
- Replace strncpy() with strscpy() in the devfreq core and use
lockdep asserts instead of manual checks for a locked mutex in
it (Dmitry Osipenko, Krzysztof Kozlowski).
- Add a generic imx bus scaling driver and make it register an
interconnect device (Leonard Crestez, Gustavo A. R. Silva).
- Make the cpufreq notifier in the tegra30 driver take boosting
into account and delete an unuseful error message from that
driver (Dmitry Osipenko, Markus Elfring).
- Remove unneeded semicolon from the cpupower code (Zou Wei)"
* tag 'pm-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (51 commits)
cpuidle: Fix three reference count leaks
PM: runtime: Replace pm_runtime_callbacks_present()
PM / devfreq: Use lockdep asserts instead of manual checks for locked mutex
PM / devfreq: imx-bus: Fix inconsistent IS_ERR and PTR_ERR
PM / devfreq: Replace strncpy with strscpy
PM / devfreq: imx: Register interconnect device
PM / devfreq: Add generic imx bus scaling driver
PM / devfreq: tegra30: Delete an error message in tegra_devfreq_probe()
PM / devfreq: tegra30: Make CPUFreq notifier to take into account boosting
PM: hibernate: Restrict writes to the resume device
PM: runtime: clk: Fix clk_pm_runtime_get() error path
cpuidle: Convert Qualcomm SPM driver to a generic CPUidle driver
ACPI: EC: PM: s2idle: Extend GPE dispatching debug message
ACPI: PM: s2idle: Print type of wakeup debug messages
powercap: RAPL: remove unused local MSR define
PM: runtime: Make clear what we do when conditions are wrong in rpm_suspend()
Documentation: admin-guide: pm: Document intel-speed-select
PM: hibernate: Split off snapshot dev option
PM: hibernate: Incorporate concurrency handling
Documentation: ABI: make current_governer_ro as a candidate for removal
...
xdp_umem.c had overlapping changes between the 64-bit math fix
for the calculation of npgs and the removal of the zerocopy
memory type which got rid of the chunk_size_nohdr member.
The mlx5 Kconfig conflict is a case where we just take the
net-next copy of the Kconfig entry dependency as it takes on
the ESWITCH dependency by one level of indirection which is
what the 'net' conflicting change is trying to ensure.
Signed-off-by: David S. Miller <davem@davemloft.net>
The kbuild test robot is firing a warning over a missing prototype. The
function can just be static.
Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Fix the following sparse warning:
drivers/soc/ti/knav_qmss_queue.c:412:23: warning: symbol 'knav_gp_range_ops' was not declared.
The knav_acc_firmwares has only call site within knav_qmss_queue.c
It should be static
Fixes: 41f93af900 ("soc: ti: add Keystone Navigator QMSS driver")
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Samuel Zou <zou_wei@huawei.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
The Texas Instruments K3 Multicore SoC platforms have chipid module which
is represented by CTRLMMR_xxx_JTAGID register and contains information
about SoC id and revision.
Bits:
31-28 VARIANT Device variant
27-12 PARTNO Part number
11-1 MFG Indicates TI as manufacturer (0x17)
1 Always 1
This patch adds corresponding driver to identify the TI K3 SoC family and
revision, and registers this information with the SoC bus. It is available
under /sys/devices/soc0/ for user space, and can be checked, where needed,
in Kernel using soc_device_match().
Identification is done by:
- checking MFG to be TI ID
- retrieving Device variant (revision)
- retrieving Part number and convert it to the family
- retrieving machine from DT "/model"
Example J721E:
# cat /sys/devices/soc0/{machine,family,revision}
Texas Instruments K3 J721E SoC
J721E
SR1.0
Example AM65x:
# cat /sys/devices/soc0/{machine,family,revision}
Texas Instruments AM654 Base Board
AM65X
SR1.0
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
The Qualcomm SPM cpuidle driver seems to be the last driver still
using the generic ARM CPUidle infrastructure.
Converting it actually allows us to simplify the driver,
and we end up being able to remove more lines than adding new ones:
- We can parse the CPUidle states in the device tree directly
with dt_idle_states (and don't need to duplicate that
functionality into the spm driver).
- Each "saw" device managed by the SPM driver now directly
registers its own cpuidle driver, removing the need for
any global (per cpu) state.
The device tree binding is the same, so the driver stays
compatible with all old device trees.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Lina Iyer <ilina@codeaurora.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
- Add soc device support for Vybrid/VF platform.
- Move the i.MX soc device registration code from mach-imx to
drivers/soc/imx for possible future consolidation with i.MX8 code.
- A small fixup to make pcm970_sja1000_platform_data static.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAl7IflgUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM5Tswf+Id6DM109IHuZxhPWNB5SKEkVa1cr
v7u7GeT/REqnsVCoFgC0kYIVlOj6nm7F8wwrHziiocvryUV8KPiENG3zMCVzJfLz
+xkZxIYEuMeLoJjWOz3HeR5bp8G5GeL8sGt2D5OrMh1EUHYTZdnf4/nESvCMJb41
rOaBRHuhhR1/Dv8qwCkXU9zep/jwlVXf+r6pC5pQNGmUpUGC2VFc7rDYkODS8Jo4
MfNx5S+HHk2Jabei+6fKEsVG1x7E3lv3ky/ZdVWhjtgy19I32E+o4Cr+UQqegIen
N4V/Uya6KejSvhaHDf6Pz2TjqTkXxlWSQ0Lu2I7pDMWdU5Upf0iLqbV1rQ==
=MC2F
-----END PGP SIGNATURE-----
Merge tag 'imx-soc-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/soc
i.MX SoC changes for 5.8:
- Add soc device support for Vybrid/VF platform.
- Move the i.MX soc device registration code from mach-imx to
drivers/soc/imx for possible future consolidation with i.MX8 code.
- A small fixup to make pcm970_sja1000_platform_data static.
* tag 'imx-soc-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx: move cpu code to drivers/soc/imx
ARM: imx: move cpu definitions into a header
ARM: imx: use device_initcall for imx_soc_device_init
ARM: imx: pcm037: make pcm970_sja1000_platform_data static
ARM: vf610: report soc info via soc device
Link: https://lore.kernel.org/r/20200523032516.11016-2-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Optimize imx-scu driver to use one TX and one RX instead of four for
talking to SCU.
- Fix one possible message header corruption where the response is
longer than the request.
- Move System Control defines into dt-bindings header, so that DT can
use them as well.
- A couple of small fixups.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAl7IeuUUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM5CpAf/VV2krqXlgTXA1Ppl+ivdGkx9ntwo
dVtZYNr65Z1iqp6yujW7cH/qulXfkaFanwDptq9ulBkG6uiyV06GCtBxpp3VhNOB
60uaS8RsieYmCz3e8j4kZkMCBthpD72wt0DxF1TlJu2d/cWfsM4/bMbrx0qYiT0V
J5FqcGH0xbe+E5YITdoPQbNxEig49q2P6BhkNLQelVQtVgM0lwSpDX3WRpCizch4
bbKSVYudV/rGGPM7ZYM53N+ngwKZurRbIf7br1QgA4ZlQxdCtADB6IRd2RsfrC8P
4BizRONfh46ogrnb9/P951RZu9H7VFRkTurnXdU+NcFK8HPYDGQmm7P2SQ==
=cJwM
-----END PGP SIGNATURE-----
Merge tag 'imx-drivers-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers
i.MX drivers update for 5.8:
- Optimize imx-scu driver to use one TX and one RX instead of four for
talking to SCU.
- Fix one possible message header corruption where the response is
longer than the request.
- Move System Control defines into dt-bindings header, so that DT can
use them as well.
- A couple of small fixups.
* tag 'imx-drivers-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
firmware: imx: scu: Fix possible memory leak in imx_scu_probe()
dt-bindings: firmware: imx: Add more system controls and PM clock types
dt-bindings: firmware: imx: Move system control into dt-binding headfile
firmware: imx: scu: Fix corruption of header
firmware: imx-scu: Support one TX and one RX
soc: imx8m: No need to put node when of_find_compatible_node() failed
Link: https://lore.kernel.org/r/20200523032516.11016-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Enables Tegra210, Tegra186 and Tegra194 to be woken from suspend by the
PMIC and exports a bit more information about SoCs via sysfs.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAl7HzTsTHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoXlpD/42/AZYEXVi97CW5oxgsZjtf6xIsDuW
v64DtfKFNcgDVqAPpqZRv+Q4OmxJsq7PaUPFxR8KA2TCVmqh8RHKDvjpenrA/A/9
QcJ1XlAsBvWLwNkskMSb4jvohEjZ1fh13KJeqHifF7FtRAGEnf8s4MDitPBcRGXz
2NgnhoxSElwfjptmd1Z/7ZsK1Zmjgr8CEKAtr7bhrB4rOZRtRsYgF1Diw/qZKCh/
u+KBijvS7XUXS34ZTzHYw95YsKKy/mfk5F3yea9cgK6/9SuxAFUV+cKlAFMlt1bE
yadgJxcXxoapgMaOvtdKaiR6HZWU4mq0xyDKBQ/3AQL0ZWmbv1OUD9i7I6VtQBOi
tmQb+2GAafROYymshLZDInjIQhdVUAKLaeNiOerYPI++n5INh2bx+ppxjvcO1zjo
xkI7FxHAvQm2RBUEEIonlJObwyPya7fgp9mSEOFzqcWCryH6ggGiI4+q3wo67u9z
7QuTrxSx0Ao1SCsdP01o+XdJraI1BKTKbxELiis8eTupd/BcikkMUhCXMBVvU5uY
zDx+5hZk3cyhDEPaaJB+kexEqv0A5CDwo1Z0fvf5pYy+aQzawy57tDi5QMm3QvUn
V6W1Sf90LQmwLFAB+MS1Yu7gw3U6Y86c5q7H5+3wAmz8iu334JDbDl4wJ7VGPMb3
wCMu/50QlOy0sg==
=EmGZ
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.8-soc-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers
soc/tegra: Changes for v5.8-rc1
Enables Tegra210, Tegra186 and Tegra194 to be woken from suspend by the
PMIC and exports a bit more information about SoCs via sysfs.
* tag 'tegra-for-5.8-soc-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: pmc: Enable PMIC wake event on Tegra210
soc: tegra: Fix tegra_pmc_get_suspend_mode definition
soc/tegra: pmc: Enable PMIC wake event on Tegra194
soc/tegra: pmc: Select GENERIC_PINCONF
soc/tegra: fuse: Update the SoC revision attribute to display a name
soc/tegra: fuse: Trivial clean-up of tegra_init_revision()
soc/tegra: fuse: Add custom SoC attributes
soc/tegra: pmc: Enable PMIC wake event on Tegra186
Link: https://lore.kernel.org/r/20200522142846.2376224-2-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This contains a large set of cleanups, bug fixes, general improvements
and documentation fixes for the RPMH driver. It adds a debugfs mechanism
for inspecting Command DB. Socinfo got the "soc_id" attribute defines
and definitions for a various variants of MSM8939.
RPMH, RPMPD and RPMHPD where made possible to build as modules, but RPMH
had to be reverted due to a compilation issue when tracing is enabled.
RPMHPD gained power-domains for the SM8250 voltage corners.
The SCM driver gained fixes for two build warnings and the SMP2P had an
unnecessary error print removed.
-----BEGIN PGP SIGNATURE-----
iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAl7DZcEbHGJqb3JuLmFu
ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FEwIQAK1TrENzsRjB23fY4pEW
+hN/SkfMjNPsinmyNOHCo03MQzdFIKUl40aNvaHh3foQXaSG4TW12iot9Ul5nsxn
/u6dCSzl15FK7pHYj/VQPWTz2WvpANVqsm6G5tf43hBg2TnStbK1AsxgJ6aq47fp
QHehMbfeKpF/gltEowv1b+H7xwNFY7eqlQ9O9umYm3hUQh3Bl5mI6PdbkazDdO1j
l/vHuQKkZXRdHtD1BxGBfvhPtM4NWDbOPeWWrw8HRFM5muDPgK9mXMRGDcv+fpHq
4I3670xiTWK1Mfz9+FRBMoxLkIWT6zXILg9aNzuZMTOLoNRt3s6VNdne6uf3naND
2Nrcu7t0b+4xWGbdwwpiAFZm8C6l+R1WTCiY4iOJXDychhVvyVwOLzPdZ4i8Pzx9
a4UJDElu8xj2g++oCcjK816IdNwkA46bM7qVz4mkHRUBMkmK9AU7okBA9HQfbP64
MrKPaUljyZuy7zonpJJBBDKLDEFa9a1pI8sehU8p+MUldxYB/4f/iGC3KzyDvv4Q
Uzj6AqdP5pjgIxz98YgpOPPl8pwg1c5OgblNLWoHj4yTaqUzT0ZHIRyQO/O/+3Lg
HwCrSy+f3+tgzts3DhyVRmOkOXFHfflSdf4rfKtbiq435yB2dz60dt77dJ0jQuBV
M9MiF+SE9oASUupPhs47kNte
=tkhb
-----END PGP SIGNATURE-----
Merge tag 'qcom-drivers-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers
Qualcomm driver updates for v5.8
This contains a large set of cleanups, bug fixes, general improvements
and documentation fixes for the RPMH driver. It adds a debugfs mechanism
for inspecting Command DB. Socinfo got the "soc_id" attribute defines
and definitions for a various variants of MSM8939.
RPMH, RPMPD and RPMHPD where made possible to build as modules, but RPMH
had to be reverted due to a compilation issue when tracing is enabled.
RPMHPD gained power-domains for the SM8250 voltage corners.
The SCM driver gained fixes for two build warnings and the SMP2P had an
unnecessary error print removed.
* tag 'qcom-drivers-for-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (42 commits)
Revert "soc: qcom: rpmh: Allow RPMH driver to be loaded as a module"
soc: qcom: rpmh-rsc: Remove the pm_lock
soc: qcom: rpmh-rsc: Simplify locking by eliminating the per-TCS lock
kernel/cpu_pm: Fix uninitted local in cpu_pm
soc: qcom: rpmh-rsc: We aren't notified of our own failure w/ NOTIFY_BAD
soc: qcom: rpmh-rsc: Correctly ignore CPU_CLUSTER_PM notifications
firmware: qcom_scm-legacy: Replace zero-length array with flexible-array
soc: qcom: rpmh-rsc: Timeout after 1 second in write_tcs_reg_sync()
soc: qcom: rpmh-rsc: Factor "tcs_reg_addr" and "tcs_cmd_addr" calculation
soc: qcom: socinfo: add msm8936/39 and apq8036/39 soc ids
soc: qcom: aoss: Add SM8250 compatible
soc: qcom: pdr: Remove impossible error condition
soc: qcom: rpmh: Dirt can only make you dirtier, not cleaner
soc: qcom: rpmhpd: Add SM8250 power domains
firmware: qcom_scm: fix bogous abuse of dma-direct internals
dt-bindings: soc: qcom: apr: Use generic node names for APR services
firmware: qcom_scm: Remove unneeded conversion to bool
soc: qcom: cmd-db: Properly endian swap the slv_id for debugfs
soc: qcom: cmd-db: Use 5 digits for printing address
soc: qcom: cmd-db: Cast sizeof() to int to silence field width warning
...
Link: https://lore.kernel.org/r/20200519052533.1250024-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- move clock driver to bind against the new mmsys driver
(mt2712, mt2701, mt8183, mt6797 and mt6779)
-----BEGIN PGP SIGNATURE-----
iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAl7JhkYXHG1hdHRoaWFz
LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH5t8w//Y8nyvZYcj0r7yDAlRSRIuObm
9SQxejwYZpHK4ag+TTil6QK0RvjBTQzMSzCiovopju8Goqd97mR3rVPd1gkj1gpa
rzeJiLxUiD17arunORghcYkLAYiv6c9m9XBxqut0d7DTsgKSXWnUzYmvaIxdw7Xw
zAIKCSWSxgajh+VcQjv8gFYFQFHSmdquNC8DLoDxutOpOFFdDSaeJy59+gVf2gj/
S2Z22ljB8+GW++7Vw1yGVBQzvu4EBM8mYssxwaDNZfLnN/Mi+cWspK7+xcE16u6J
+epoEQHTmNyYql8DJbWIkbuERiDEW5sLOgKOL/qFqY7TsbuAVasrWS6MLfT1f7/B
q24920tQah2YbkBSb0TdNoRCBOcOGFThpDaole6FXDkD4HcjFz3kdvMmNI3DQDQb
uMEAsvFN6Fl4py6CTs0ZwL1mX5AKwNhsrLlFFcucVkfXqW0+xHNynI6Y+/s4DgHG
gFFeS/gFOc+DvfjlnycMmdFlBdbLgqe0HGSOvCEQvHKuzWAbn8lStR5E9w5ScpYv
XkEoEkvW2G2ISvGkm7iu1A3Vw1UL5gS49mR4MMuyeI+3iEoutsYbpnSdGMO9nu+k
UwhmEas4iYk6L57vuqx0XP9LrL4TwybMJ02tkIKZzZdvZPAYFcMyi0nmGwBvyLY1
j5XumIxbfSEe23BFEMs=
=NHav
-----END PGP SIGNATURE-----
Merge tag 'v5.7-next-soc.2' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers
- make mmsys kconfig entry to depend on ARCH_MEDIATEK instead of a specific SoC
- move clock driver to bind against the new mmsys driver
(mt2712, mt2701, mt8183, mt6797 and mt6779)
* tag 'v5.7-next-soc.2' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
clk/soc: mediatek: mt6779: Bind clock driver from platform device
clk/soc: mediatek: mt6797: Bind clock driver from platform device
clk/soc: mediatek: mt8183: Bind clock driver from platform device
clk / soc: mediatek: Bind clock and gpu driver for mt2701
clk / soc: mediatek: Bind clock and gpu driver for mt2712
soc: mediatek: Enable mmsys driver by default if Mediatek arch is selected
Link: https://lore.kernel.org/r/d2eb19f4-589a-89c1-02ad-9f19a6cfb09a@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- support GX SoCs in the EE power-controller driver
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAl7Gz9cACgkQWTcYmtP7
xmXc/A/+KjFrbfbLxzD3ECvsEEfWB9H9XrFUn1NDVU9MJipV9+sFKnnV3Px3C3VA
++J7nJ3uU6p5LzU09AaeqwciZgwP00/14SyijF9IifvzBntvzQAZ3ouexj1xSMVu
eSU3Q12UeWwlUUT6kzdEwAjgQFdSZgX01fZGM6TiTY3SiHEw7R6wrKQPxzCaeSrw
ElnKu9ukzqsI0oydpnaEWzXaSx/Rl27UUIV8iqWvIYk6dogCvF6svifmqaFEnDlO
dn+Z4Y2m/I/yW94JMuajA3Iqt+vBcAge70GhcRZOUJqN0Pkg+gp4+vqieGHwcuGu
Nqi3A95gthIJV0WY+1p8NkQ7EvougzD/zr6u5UQultL1y+hQNTmNh/kV0TJLnIo+
kVIBfuCG1b5nvPIZ1dqGcS1u4OIWtU8vz5mYII+vAcGFucThdd5S3eVf3yDD5M+f
vKlJ/M9dugkTfMi7iZSbmP6oTwFuRRqJ1OXpaxvdwtYBNd7pNDMel5elLRUxu0zZ
jf83C8jgEHJyNspgTrBuWc7sRYnaSyMu79QNNTorSNI7WOPLer+YluBrZdxahp54
OwjkiWDA/mX/Ty5wyRpRxWfdpCbcKAHx17uHuXxKOnuvJkwVdDqGdnNzX2IcYuxa
0MGSdAZdwcapK1L11xAzK4PBHB15xJRI3Sf7MTRA9HGWHv6t12k=
=nn2j
-----END PGP SIGNATURE-----
Merge tag 'amlogic-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/drivers
soc: amlogic: driver updates for v5.8
- support GX SoCs in the EE power-controller driver
* tag 'amlogic-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
soc: amlogic: meson-ee-pwrc: add support for the Meson GX SoCs
soc: amlogic: meson-ee-pwrc: add support for Meson8/Meson8b/Meson8m2
dt-bindings: power: meson-ee-pwrc: add support for the Meson GX SoCs
dt-bindings: power: meson-ee-pwrc: add support for Meson8/8b/8m2
Link: https://lore.kernel.org/r/5ec6f570.1c69fb81.a3753.711b@mx.google.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
the entry point for the DRM subsystem.
Replace clk-provider.h include with of_clk.h for mach-mediatek
-----BEGIN PGP SIGNATURE-----
iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAl7AQAcXHG1hdHRoaWFz
LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH6WvxAAiwYtX0o4PMYD1B04YnlSQHGs
rj/3NkoYQwuiw4P03XbJB9Oj0nSq63KW+P7eb6jsL0Tqr+17ZyeJHTo+qeLtJHj3
tgdS29M63HHB6dXKIX+F+hpC2sKbmWdsI/cyuFPBSuhS2MRp0PlWHT10lpduzBAk
SUjpdB+xuBPa+KbJSFgg4ArdOEzMEjQnwzEOALEGhlpeHgFjWZ+bgSfVlytjH7Wy
7yEl2BA/QuAIkje9iwZpggdRBwwHGjr5/BDpqPDY1nv5CuzBnNZLD6A0jhKWZyaI
je69WCJ8HQ+yPLg+GxULk70GFyl/zSpQmYp3XQovZ5BJ53qDUCchFUgvJAs8moaw
ly2OguL3BONyMiCZqLfF+K+nYeg6VUrhsiDAMom7pr+R222mkjNawdKL1Re7WtsA
L7jkCPxmVNhvzX7p6KnvplnoNHfZj5P1wZbK0aty1RJO+BP/WsHAqG8tOZ75+hXZ
HtooLwrcmqpyBrsnZhASr24JoOpfCuNJTId16Xt+AZjwyAS7BOMc9/SxwcdVW+bc
J+QGgvoS+pbY7o7NVRRygFNRuabGkSCUq8escmMQl4r5XcZirHcg60UlgZUfUNVJ
7Bwa/v3MzYEEFZVtToK0RhNgrAdhtUDYMpK1083rvC7E86+HQddYD6T/c6LVL/4j
sFfxy3TTYdEIDjNcBSw=
=v4ft
-----END PGP SIGNATURE-----
Merge tag 'v5.7-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers
Refactor the mmsys to reflect that it's a clock driver and
the entry point for the DRM subsystem.
Replace clk-provider.h include with of_clk.h for mach-mediatek
* tag 'v5.7-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
ARM: mediatek: Replace <linux/clk-provider.h> by <linux/of_clk.h>
soc: mediatek: Missing platform_device_unregister() on error in mtk_mmsys_probe()
soc: mediatek: mmsys: Drop <linux/clk-provider.h>
soc / drm: mediatek: Fix mediatek-drm device probing
soc / drm: mediatek: Move routing control to mmsys device
clk / soc: mediatek: Move mt8173 MMSYS to platform driver
dt-bindings: mediatek: Update mmsys binding to reflect it is a system controller
drm/mediatek: Omit warning on probe defers
Link: https://lore.kernel.org/r/2cf27d33-59c6-023b-9993-57a2639824ea@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add the main config option for the RZ/G1H SoC.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCXr5iKwAKCRCKwlD9ZEnx
cOcgAP9ObpixgX8691owiacKYWJ8q4ctWxknOv3DUrrVrRzywAEAl10PigLtM6Ey
Ac7B16wsmoodqROoywXmubylSZ0QWwI=
=dZjq
-----END PGP SIGNATURE-----
Merge tag 'renesas-drivers-for-v5.8-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers
Renesas driver updates for v5.8 (take two)
- Add the main config option for the RZ/G1H SoC.
* tag 'renesas-drivers-for-v5.8-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
soc: renesas: Add Renesas R8A7742 config option
Link: https://lore.kernel.org/r/20200515100547.14671-5-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add System Controller (SYSC) and Reset (RST) support for the new
RZ/G1H (R8A7742) SoC.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCXqqGEwAKCRCKwlD9ZEnx
cDAZAP4/OLTCsBaYbGFWDMCFFBv3RpxcErDEsSJSp1kwbaQR0gEA9BOK28AvxgwE
hWQ4Zg0hIh18VuhVFyXlL6IrcqonSgk=
=SU1w
-----END PGP SIGNATURE-----
Merge tag 'renesas-drivers-for-v5.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers
Renesas driver updates for v5.8
- Add System Controller (SYSC) and Reset (RST) support for the new
RZ/G1H (R8A7742) SoC.
* tag 'renesas-drivers-for-v5.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
soc: renesas: rcar-rst: Add support for RZ/G1H
soc: renesas: rcar-sysc: Add R8A7742 support
clk: renesas: Add r8a7742 CPG Core Clock Definitions
dt-bindings: power: rcar-sysc: Add r8a7742 power domain index macros
Link: https://lore.kernel.org/r/20200430084849.1457-5-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
There's no callers in-tree anymore since commit
3b2abda7d2 ("soc: fsl: dpio: Replace QMAN array mode with ring mode enqueue")
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
There is a statement that not indented correctly, remove the
extraneous space.
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Use the cpu affine DPIO unless there isn't one which can happen
if less DPIOs than cores are assign to the kernel.
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
The current codebase makes use of one-element arrays in the following
form:
struct something {
int length;
u8 data[1];
};
struct something *instance;
instance = kmalloc(sizeof(*instance) + size, GFP_KERNEL);
instance->length = size;
memcpy(instance->data, source, size);
but the preferred mechanism to declare variable-length types such as
these ones is a flexible array member[1][2], introduced in C99:
struct foo {
int stuff;
struct boo array[];
};
By making use of the mechanism above, we will get a compiler warning
in case the flexible array does not occur last in the structure, which
will help us prevent some kind of undefined behavior bugs from being
inadvertently introduced[3] to the codebase from now on. So, replace
the one-element array with a flexible-array member.
Also, make use of the new struct_size() helper to properly calculate the
size of struct qe_firmware.
This issue was found with the help of Coccinelle and, audited and fixed
_manually_.
[1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html
[2] https://github.com/KSPP/linux/issues/21
[3] commit 7649773293 ("cxgb3/l2t: Fix undefined behaviour")
Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
Reviewed-by: Qiang Zhao <qiang.zhao@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
The PMIC wake event can be used to bring the system out of suspend based
on certain events happening on the PMIC (such as an RTC alarm).
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
In order to determine the number of L2 cache ways enabled at runtime,
implement a private attribute ("number_of_ways_enabled"). Reading this
attribute returns the number of enabled L2 cache ways at runtime.
Using riscv_set_cacheinfo_ops() hook a custom function, that returns
this private attribute, to the generic ops structure which is used by
cache_get_priv_group() in cacheinfo framework.
Signed-off-by: Yash Shah <yash.shah@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Move the soc device register code to drivers/soc/imx to align with
i.MX8.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The mmsys driver is now the top level entry point for the multimedia
system (mmsys), we bind the clock driver by creating a platform device.
We also bind the MediaTek DRM driver which is not yet implement and
therefor will errror out for now.
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20200518113156.25009-3-matthias.bgg@kernel.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The mmsys driver is now the top level entry point for the multimedia
system (mmsys), we bind the clock driver by creating a platform device.
We also bind the MediaTek DRM driver which is not yet implement and
therefor will errror out for now.
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20200518113156.25009-2-matthias.bgg@kernel.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The mmsys driver is now the top level entry point for the multimedia
system (mmsys), we bind the clock driver by creating a platform device.
We also bind the MediaTek DRM driver which is not yet implement and
therefor will errror out for now.
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20200518113156.25009-1-matthias.bgg@kernel.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Now that the mmsys driver is the top-level entry point for the
multimedia subsystem, we could bind the clock and the gpu driver on
those devices that is expected to work, so the drm driver is
intantiated by the mmsys driver and display, hopefully, working again.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20200401201736.2980433-3-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Now that the mmsys driver is the top-level entry point for the
multimedia subsystem, we could bind the clock and the gpu driver on
those devices that is expected to work, so the drm driver is
intantiated by the mmsys driver and display, hopefully, working again on
those devices.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20200401201736.2980433-2-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The mmsys driver supports only MT8173 device for now, but like other system
controllers is an important piece for other Mediatek devices. Actually
it depends on the mt8173 clock specific driver but that dependency is
not real as it can build without the clock driver. Instead of depends on
a specific model, make the driver depends on the generic ARCH_MEDIATEK and
enable by default so other Mediatek devices can start using it without
flood the Kconfig.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Tested-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20200401201736.2980433-1-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add support for the Meson GX SoCs to the meson-ee-pwrc driver.
The power domains on the GX SoCs are very similar to G12A. The only
known differences so far are:
- The GX SoCs do not have the HHI_VPU_MEM_PD_REG2 register (for the
VPU power-domain)
- The GX SoCs have an additional reset line called "dvin"
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200515204709.1505498-5-martin.blumenstingl@googlemail.com
This adds support for the power domains on Meson8/Meson8b/Meson8m2.
Meson8 doesn't use any reset lines while Meson8b and Meson8m2 use the
same set of reset lines (which is different from the newer SoCs).
Add dedicated compatible strings for Meson8, Meson8b and Meson8m2 to
support these differences.
Notable differences between Meson8 and G12A are:
- there is no HHI_VPU_MEM_PD_REG2 on the 32-bit SoCs
- the Meson8b datasheet describes an "audio DSP memory" power domain
which is used for the hardware audio decoder
- the "amlogic,ao-sysctrl" only includes the power management related
registers on the 32-bit SoCs, meaning the for example the
AO_RTI_GEN_PWR_SLEEP0 register is at offset (0x2 << 2) rather than
(0x3a << 2). As result of this (0x38 << 2) is subtracted from the
register offsets, which is the start of the power management related
registers.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200515204709.1505498-4-martin.blumenstingl@googlemail.com
The reset handling APIs for omap-prm can be invoked PM runtime which
runs in atomic context. For this to work properly, switch to atomic
iopoll version instead of the current which can sleep. Otherwise,
this throws a "BUG: scheduling while atomic" warning. Issue is seen
rather easily when CONFIG_PREEMPT is enabled.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The K210's bootloader does not provide a device tree. Give the ability
to providea builtin one with the SOC_KENDRYTE_K210_BUILTIN_DTB option.
If selected, this option result in the definition of a builtin DTB
entry in the k210 sysctl driver.
If defined, the builtin DTB entry points to the default k210.dts device
tree file and is keyed with the vendor ID 0x4B5, the arch ID
0xE59889E6A5A04149 ("Canaan AI" in UTF-8 coded Chinese) and the impl ID
0x4D41495832303030 ("MAIX200"). These values are reported by the SiPEED
MAIXDUINO board, the SiPEED MAIX Go board and the SiPEED Dan Dock board.
[Thanks to Damien for the K210 IDs]
Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Attempting to compile rpmh-rsc.c as a module with TRACING enabled causes
a build error as no _rcuidle function is generated for tracepoints when
CONFIG_MODULE is set.
Attempts has been made, but no resolution has been agreed upon, so lets
revert this commit for now.
This reverts commit 1d3c6f86fd.
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Return error code to client if send message fail,
so that client has chance to error handling.
Fixes: 576f1b4bc8 ("soc: mediatek: Add Mediatek CMDQ helper")
Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Link: https://lore.kernel.org/r/1583664775-19382-6-git-send-email-dennis-yc.hsieh@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
It has been postulated that the pm_lock is bad for performance because
a CPU currently running rpmh_flush() could block other CPUs from
coming out of idle. Similarly CPUs coming out of / going into idle
all need to contend with each other for the spinlock just to update
the variable tracking who's in PM.
Let's optimize this a bit. Specifically:
- Use a count rather than a bitmask. This is faster to access and
also means we can use the atomic_inc_return() function to really
detect who the last one to enter PM was.
- Accept that it's OK if we race and are doing the flush (because we
think we're last) while another CPU is coming out of idle. As long
as we block that CPU if/when it tries to do an active-only transfer
we're OK.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20200504104917.v6.5.I295cb72bc5334a2af80313cbe97cb5c9dcb1442c@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
The rpmh-rsc code had both a driver-level lock (sometimes referred to
in comments as drv->lock) and a lock per-TCS. The idea was supposed
to be that there would be times where you could get by with just
locking a TCS lock and therefor other RPMH users wouldn't be blocked.
The above didn't work out so well.
Looking at tcs_write() the bigger drv->lock was held for most of the
function anyway. Only the __tcs_buffer_write() and
__tcs_set_trigger() calls were called without holding the drv->lock.
It actually turns out that in tcs_write() we don't need to hold the
drv->lock for those function calls anyway even if the per-TCS lock
isn't there anymore. From the newly added comments in the code, this
is because:
- We marked "tcs_in_use" under lock.
- Once "tcs_in_use" has been marked nobody else could be writing
to these registers until the interrupt goes off.
- The interrupt can't go off until we trigger w/ the last line
of __tcs_set_trigger().
Thus, from a tcs_write() point of view, the per-TCS lock was useless.
Looking at rpmh_rsc_write_ctrl_data(), only the per-TCS lock was held.
It turns out, though, that this function already needs to be called
with the equivalent of the drv->lock held anyway (we either need to
hold drv->lock as we will in a future patch or we need to know no
other CPUs could be running as happens today). Specifically
rpmh_rsc_write_ctrl_data() might be writing to a TCS that has been
borrowed for writing an active transation but it never checks this.
Let's eliminate this extra overhead and avoid possible AB BA locking
headaches.
Suggested-by: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20200504104917.v6.4.Ib8dccfdb10bf6b1fb1d600ca1c21d9c0db1ef746@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
When a PM Notifier returns NOTIFY_BAD it doesn't get called with
CPU_PM_ENTER_FAILED. It only get called for CPU_PM_ENTER_FAILED if
someone else (further down the notifier chain) returns NOTIFY_BAD.
Handle this case by taking our CPU out of the list of ones that have
entered PM. Without this it's possible we could detect that the last
CPU went down (and we would flush) even if some CPU was alive. That's
not good since our flushing routines currently assume they're running
on the last CPU for mutual exclusion.
Fixes: 985427f997 ("soc: qcom: rpmh: Invoke rpmh_flush() for dirty caches")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20200504104917.v6.2.I1927d1bca2569a27b2d04986baf285027f0818a2@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Our switch statement doesn't have entries for CPU_CLUSTER_PM_ENTER,
CPU_CLUSTER_PM_ENTER_FAILED, and CPU_CLUSTER_PM_EXIT and doesn't have
a default. This means that we'll try to do a flush in those cases but
we won't necessarily be the last CPU down. That's not so ideal since
our (lack of) locking assumes we're on the last CPU.
Luckily this isn't as big a problem as you'd think since (at least on
the SoC I tested) we don't get these notifications except on full
system suspend. ...and on full system suspend we get them on the last
CPU down. That means that the worst problem we hit is flushing twice.
Still, it's good to make it correct.
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: 985427f997 ("soc: qcom: rpmh: Invoke rpmh_flush() for dirty caches")
Reported-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20200504104917.v6.1.Ic7096b3b9b7828cdd41cd5469a6dee5eb6abf549@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
After the split, the mt8173 MMSYS driver is no longer a clock provider,
and thus does not need to include <linux/clk-provider.h>.
Fixes: 13032709e2 ("clk / soc: mediatek: Move mt8173 MMSYS to platform driver")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20200506120204.31422-1-geert+renesas@glider.be
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
We can make some of the register access functions more readable by
factoring out the calculations a little bit.
Suggested-by: Joe Perches <joe@perches.com>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20200415095953.v3.1.Ic70288f256ff0be65cac6a600367212dfe39f6c9@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This patch adds missing SoC IDs for MSM8936/39 and
their APQ variants.
Signed-off-by: Vincent Knecht <vincent.knecht@mailoo.org>
Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Link: https://lore.kernel.org/r/20200511212733.214464-1-konradybcio@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Mask the consumer index before using it. Without this, we would be
writing frame descriptors beyond the ring size supported by the QBMAN
block.
Fixes: 3b2abda7d2 ("soc: fsl: dpio: Replace QMAN array mode with ring mode enqueue")
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The PMIC wake event can be used to bring the system out of suspend based
on certain events happening on the PMIC (such as an RTC alarm).
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
I have hit the following build error:
armv7a-hardfloat-linux-gnueabi-ld: drivers/soc/tegra/pmc.o: in function `pinconf_generic_dt_node_to_map_pin':
pmc.c:(.text+0x500): undefined reference to `pinconf_generic_dt_node_to_map'
armv7a-hardfloat-linux-gnueabi-ld: drivers/soc/tegra/pmc.o:(.rodata+0x1f88): undefined reference to `pinconf_generic_dt_free_map'
So SOC_TEGRA_PMC should select GENERIC_PINCONF.
Fixes: 4a37f11c8f ("soc/tegra: pmc: Implement pad configuration via pinctrl")
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
In all but the very special case of a system with _only_ glink_rpm,
GLINK is dependent on glink_ssr, so move it to rpmsg and combine it with
qcom_glink_native in the new qcom_glink kernel module.
Acked-by: Chris Lew <clew@codeaurora.org>
Acked-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Link: https://lore.kernel.org/r/20200423003736.2027371-4-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Rather than carrying a special purpose blocking notifier for glink_ssr
in remoteproc's qcom_common.c, move it into glink_ssr so allow wider
reuse of the common one.
The rpmsg glink header file is used in preparation for the next patch.
Acked-by: Chris Lew <clew@codeaurora.org>
Acked-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Link: https://lore.kernel.org/r/20200423003736.2027371-3-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Use direct function calls instead of using eemi ops. So remove
eemi ops for get_api_version and use direct function call.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Link: https://lore.kernel.org/r/1587761887-4279-2-git-send-email-jolly.shah@xilinx.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Currently the SoC revision attribute for Tegra devices displays the
value of the enum associated with a particular revision. This is not
very useful because to obtain the actual revision you need to
use the tegra_revision enumeration to translate the value.
It is more meaningful to display a name for the revision, such as
'A01', than the enumarated value and therefore, update the revision
attribute to display a name. This change does alter the ABI, which
is unfortunate, but this is more meaningful and maintable.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Clean-up the tegra_init_revision() function by removing the 'rev'
variable which is not needed and use the newly added helper function
tegra_get_minor_rev() to get the minor revision.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add a custom SoC attribute for Tegra to expose the HIDREV register
fields to userspace via the sysfs. This register provides additional
details about the type of device (eg, silicon, FPGA, etc) as well as
revision. Exposing this information is useful for identifying the
exact device revision and device type.
For Tegra devices up until Tegra186, the majorrev and minorrev fields of
the HIDREV register are used to determine the device revision and device
type. For Tegra194, the majorrev and minorrev fields only determine the
revision. Starting with Tegra194, there is an additional field,
pre_si_platform (which occupies bits 20-23), that now determines device
type. Therefore, for all Tegra devices, add a custom SoC attribute for
the majorrev and minorrev fields and for Tegra194 add an additional
attribute for the pre_si_platform field.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The PMIC wake event can be used to bring the system out of suspend based
on certain events happening on the PMIC (such as an RTC alarm).
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
The patch fbe639b44a: "soc: qcom: Introduce Protection Domain
Restart helpers" leads to the following static checker warning:
drivers/soc/qcom/pdr_interface.c:158 pdr_register_listener()
'(resp.curr_state < (-((~0 >> 1)) - 1)) => (s32min-s32max < s32min)'
These are casted to int so they can't be outside of int range.
Fixes: fbe639b44a ("soc: qcom: Introduce Protection Domain Restart helpers")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200415062955.21439-1-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Adding an item into the cache should never be able to make the cache
cleaner. Use "|=" rather than "=" to update the dirty flag.
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Maulik Shah <mkshah@codeaurora.org> Thanks, Maulik
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Fixes: bb7000677a ("soc: qcom: rpmh: Update dirty flag only when data changes")
Reported-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20200417141531.1.Ia4b74158497213eabad7c3d474c50bfccb3f342e@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Read the slv_id properly by making sure the 16-bit number is endian
swapped from little endian to CPU native before we read it to figure out
what to print for the human readable name. Otherwise we may just show
that all the elements in the cmd-db are "Unknown" which isn't right.
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Reported-by: kbuild test robot <lkp@intel.com>
Cc: Lina Iyer <ilina@codeaurora.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20200417000645.234693-1-swboyd@chromium.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
The top few bits aren't relevant to pad out because they're always zero.
Let's just print 5 digits instead of 8 so that it's a little shorter and
more readable.
Reviewed-by: Lina Iyer <ilina@codeaurora.org>
Suggested-by: Lina Iyer <ilina@codeaurora.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20200415192916.78339-1-swboyd@chromium.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
We pass the result of sizeof() here to tell the printk format specifier
how many bytes to print. That expects an int though and sizeof() isn't
that type. Cast to int to silence this warning:
drivers/soc/qcom/cmd-db.c: In function 'cmd_db_debugfs_dump':
drivers/soc/qcom/cmd-db.c:281:30: warning: field width specifier '*' expects argument of type 'int', but argument 4 has type 'long unsigned int' [-Wformat=]
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Fixes: d6815c5c43 ("soc: qcom: cmd-db: Add debugfs dumping file")
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20200415062033.66406-1-swboyd@chromium.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Compile-testing the driver can result in a link failure
when CONFIG_SOC_BUS is disabled:
x86_64-linux-ld: drivers/soc/imx/soc-imx8m.o: in function `imx8_soc_init':
soc-imx8m.c:(.init.text+0x28d): undefined reference to `soc_device_register'
Select it from Kconfig, as we do from the other SoC drivers.
Link: https://lore.kernel.org/r/20200409075208.2824062-1-arnd@arndb.de
Fixes: fc40200ebf ("soc: imx: increase build coverage for imx8m soc driver")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
A 1024 byte variable on the stack will warn on any 32-bit architecture
during compile-testing, and is generally a bad idea anyway:
fsl/dpio/dpio-service.c: In function 'dpaa2_io_service_enqueue_multiple_desc_fq':
fsl/dpio/dpio-service.c:495:1: error: the frame size of 1032 bytes is larger than 1024 bytes [-Werror=frame-larger-than=]
There are currently no callers of this function, so I cannot tell whether
dynamic memory allocation is allowed once callers are added. Change
it to kcalloc for now, if anyone gets a warning about calling this in
atomic context after they start using it, they can fix it later.
Link: https://lore.kernel.org/r/20200408185834.434784-1-arnd@arndb.de
Fixes: 9d98809711 ("soc: fsl: dpio: Adding QMAN multiple enqueue interface")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Building dpio for 32 bit shows a new compiler warning from converting
a pointer to a u64:
drivers/soc/fsl/dpio/qbman-portal.c: In function 'qbman_swp_enqueue_multiple_desc_direct':
drivers/soc/fsl/dpio/qbman-portal.c:870:14: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
870 | addr_cena = (uint64_t)s->addr_cena;
The variable is not used anywhere, so removing the assignment seems
to be the correct workaround. After spotting what seemed to be
some confusion about address spaces, I ran the file through sparse,
which showed more warnings:
drivers/soc/fsl/dpio/qbman-portal.c:756:42: warning: incorrect type in argument 1 (different address spaces)
drivers/soc/fsl/dpio/qbman-portal.c:756:42: expected void const volatile [noderef] <asn:2> *addr
drivers/soc/fsl/dpio/qbman-portal.c:756:42: got unsigned int [usertype] *[assigned] p
drivers/soc/fsl/dpio/qbman-portal.c:902:42: warning: incorrect type in argument 1 (different address spaces)
drivers/soc/fsl/dpio/qbman-portal.c:902:42: expected void const volatile [noderef] <asn:2> *addr
drivers/soc/fsl/dpio/qbman-portal.c:902:42: got unsigned int [usertype] *[assigned] p
Here, the problem is passing a token from memremap() into __raw_readl(),
which is only defined to work on MMIO addresses but not RAM. Turning
this into a simple pointer dereference avoids this warning as well.
Link: https://lore.kernel.org/r/20200408185904.460563-1-arnd@arndb.de
Fixes: 3b2abda7d2 ("soc: fsl: dpio: Replace QMAN array mode with ring mode enqueue")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The firmware driver is optional, but the power driver depends on it,
which needs to be reflected in Kconfig to avoid link errors:
aarch64-linux-ld: drivers/soc/xilinx/zynqmp_power.o: in function `zynqmp_pm_isr':
zynqmp_power.c:(.text+0x284): undefined reference to `zynqmp_pm_invoke_fn'
The firmware driver can probably be allowed for compile-testing as
well, so it's best to drop the dependency on the ZYNQ platform
here and allow building as long as the firmware code is built-in.
Fixes: ab272643d7 ("drivers: soc: xilinx: Add ZynqMP PM driver")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20200408155224.2070880-1-arnd@arndb.de
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch allow the rpmpd driver to be loaded as a permenent
module. Meaning it can be loaded from a module, but then cannot
be unloaded.
Ideally, it would include a remove hook and related logic, but
apparently the genpd code isn't able to track usage and cleaning
things up? (See: https://lkml.org/lkml/2019/1/24/38)
So making it a permenent module at least improves things slightly
over requiring it to be a built in driver.
Cc: Todd Kjos <tkjos@google.com>
Cc: Saravana Kannan <saravanak@google.com>
Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rajendra Nayak <rnayak@codeaurora.org>
Cc: linux-arm-msm@vger.kernel.org
Acked-by: Saravana Kannan <saravanak@google.com>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Link: https://lore.kernel.org/r/20200326224459.105170-2-john.stultz@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This patch allow the rpmhpd driver to be loaded as a permenent
module. Meaning it can be loaded from a module, but then cannot
be unloaded.
Ideally, it would include a remove hook and related logic, but
apparently the genpd code isn't able to track usage and cleaning
things up?
So making it a permenent module at least improves things slightly
over requiring it to be a built in driver.
Cc: Todd Kjos <tkjos@google.com>
Cc: Saravana Kannan <saravanak@google.com>
Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rajendra Nayak <rnayak@codeaurora.org>
Cc: linux-arm-msm@vger.kernel.org
Acked-by: Saravana Kannan <saravanak@google.com>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Link: https://lore.kernel.org/r/20200326224459.105170-4-john.stultz@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This patch allow the rpmh driver to be loaded as a permenent
module. Meaning it can be loaded from a module, but then cannot
be unloaded.
Ideally, it would include a remove hook and related logic, but
the rpmh driver is fairly core to the system, so once its loaded
with almost anythign else to get the system to go, the dependencies
are not likely to ever also be removed.
So making it a permenent module at least improves things slightly
over requiring it to be a built in driver.
Acked-by: Saravana Kannan <saravanak@google.com>
Cc: Todd Kjos <tkjos@google.com>
Cc: Saravana Kannan <saravanak@google.com>
Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rajendra Nayak <rnayak@codeaurora.org>
Cc: linux-arm-msm@vger.kernel.org
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Link: https://lore.kernel.org/r/20200326224459.105170-3-john.stultz@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
No need to put node when of_find_compatible_node() failed, return
immediately to simplify the code.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The RSC_DRV_IRQ_ENABLE, RSC_DRV_IRQ_STATUS, and RSC_DRV_IRQ_CLEAR
registers are not part of TCS 0. Let's not pretend that they are by
using read_tcs_reg() and write_tcs_reg() and passing a bogus tcs_id of
0. We could introduce a new wrapper for these registers but it
wouldn't buy us much. Let's just read/write directly.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Tested-by: Maulik Shah <mkshah@codeaurora.org>
Link: https://lore.kernel.org/r/20200413100321.v4.10.I2adf93809c692d0b673e1a86ea97c45644aa8d97@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Auditing tcs_invalidate() made me worried. Specifically I saw that it
used spin_lock(), not spin_lock_irqsave(). That always worries me
unless I can trace for sure that I'm in the interrupt handler or that
someone else already disabled interrupts.
Looking more at it, there is actually no reason for these locks
anyway. Specifically the only reason you'd ever call
rpmh_rsc_invalidate() is if you cared that the sleep/wake TCSes were
empty. That means that they need to continue to be empty even after
rpmh_rsc_invalidate() returns. The only way that can happen is if the
caller already has done something to keep all other RPMH users out.
It should be noted that even though the caller is only worried about
making sleep/wake TCSes empty, they also need to worry about stopping
active-only transfers if they need to handle the case where
active-only transfers might borrow the wake TCS.
At the moment rpmh_rsc_invalidate() is only called in PM code from the
last CPU. If that later changes the caller will still need to solve
the above problems themselves, so these locks will never be useful.
Continuing to audit tcs_invalidate(), I found a bug. The function
didn't properly check for a borrowed TCS if we hadn't recently written
anything into the TCS. Specifically, if we've never written to the
WAKE_TCS (or we've flushed it recently) then tcs->slots is empty.
We'll early-out and we'll never call tcs_is_free().
I thought about fixing this bug by either deleting the early check for
bitmap_empty() or possibly only doing it if we knew we weren't on a
TCS that could be borrowed. However, I think it's better to just
delete the checks.
As argued above it's up to the caller to make sure that all other
users of RPMH are quiet before tcs_invalidate() is called. Since
callers need to handle the zero-active-TCS case anyway that means they
need to make sure that the active-only transfers are quiet before
calling too. The one way tcs_invalidate() gets called today is
through rpmh_rsc_cpu_pm_callback() which calls
rpmh_rsc_ctrlr_is_busy() to handle this. When we have another path to
get to tcs_invalidate() it will also need to come up with something
similar and it won't need this extra check either. If we later find
some code path that actually needs this check back in (and somehow
manages to be race free) we can always add it back in.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Tested-by: Maulik Shah <mkshah@codeaurora.org>
Link: https://lore.kernel.org/r/20200413100321.v4.9.I07c1f70e0e8f2dc0004bd38970b4e258acdc773e@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
The calls rpmh_rsc_write_ctrl_data() and rpmh_rsc_send_data() are only
ever called from rpmh.c. We know that rpmh.c already error checked
the message. There's no reason to do it again in rpmh-rsc.
Suggested-by: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Tested-by: Maulik Shah <mkshah@codeaurora.org>
Link: https://lore.kernel.org/r/20200413100321.v4.8.I8e187cdfb7a31f5bb7724f1f937f2862ee464a35@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
tcs_is_free() had two checks in it: does the software think that the
TCS is free and does the hardware think that the TCS is free. I
couldn't figure out in which case the hardware could think that a TCS
was in-use but software thought it was free. Apparently there is no
case and the extra check can be removed. This apparently has already
been done in a downstream patch.
Suggested-by: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Tested-by: Maulik Shah <mkshah@codeaurora.org>
Link: https://lore.kernel.org/r/20200413100321.v4.7.Icf2213131ea652087f100129359052c83601f8b0@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
I've been pouring through the rpmh-rsc code and trying to understand
it. Document everything to the best of my ability. All documentation
here is strictly from code analysis--no actual knowledge of the
hardware was used. If something is wrong in here I either
misunderstood the code, had a typo, or the code has a bug in it
leading to my incorrect understanding.
In a few places here I have documented things that don't make tons of
sense. A future patch will try to address this. While this means I'm
adding comments / todos and then later fixing them in the series, it
seemed more urgent to get things documented first so that people could
understand the later patches.
Any comments I adjusted I also tried to make match kernel-doc better.
Specifically:
- kernel-doc says do not leave a blank line between the function
description and the arguments
- kernel-doc examples always have things starting w/ a capital and
ending with a period.
This should be a no-op. It's just comment changes.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20200413100321.v4.6.I52653eb85d7dc8981ee0dafcd0b6cc0f273e9425@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
The "cmd_cache" in RPMH wasn't terribly sensible. Specifically:
- The current code doesn't really detect "conflicts" properly any case
where the sequence being checked has more than one entry. One
simple way to see this in the current code is that if cmd[0].addr
isn't found then cmd[1].addr is never checked.
- The code attempted to use the "cmd_cache" to update an existing
message in a sleep/wake TCS with new data. The goal appeared to be
to update part of a TCS while leaving the rest of the TCS alone. We
never actually do this. We always fully invalidate and re-write
everything.
- If/when we try to optimize things to not fully invalidate / re-write
every time we update the TCSes we'll need to think it through very
carefully. Specifically requirement of find_match() that the new
sequence of addrs must match exactly the old sequence of addrs seems
inflexible. It's also not documented in rpmh_write() and
rpmh_write_batch(). In any case, if we do decide to require updates
to keep the exact same sequence and length then presumably the API
and data structures should be updated to understand groups more
properly. The current algorithm doesn't really keep track of the
length of the old sequence and there are several boundary-condition
bugs because of that. Said another way: if we decide to do
something like this in the future we should start from scratch and
thus find_match() isn't useful to keep around.
This patch isn't quite a no-op. Specifically:
- It should be a slight performance boost of not searching through so
many arrays.
- The old code would have done something useful in one case: it would
allow someone calling rpmh_write() to override the data that came
from rpmh_write_batch(). I don't believe that actually happens in
reality.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Tested-by: Maulik Shah <mkshah@codeaurora.org>
Link: https://lore.kernel.org/r/20200413100321.v4.5.I6d3d0a3ec810dc72ff1df3cbf97deefdcdeb8eef@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
The get_tcs_of_type() function doesn't provide any value. It's not
conceptually difficult to access a value in an array, even if that
value is in a structure and we want a pointer to the value. Having
the function in there makes me feel like it's doing something fancier
like looping or searching. Remove it.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Tested-by: Maulik Shah <mkshah@codeaurora.org>
Link: https://lore.kernel.org/r/20200413100321.v4.4.Ia348ade7c6ed1d0d952ff2245bc854e5834c8d9a@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
I was trying to write documentation for the functions in rpmh-rsc and
I got to tcs_ctrl_write(). The documentation for the function would
have been: "This is the core of rpmh_rsc_write_ctrl_data(); all the
caller does is error-check and then call this".
Having the error checks in a separate function doesn't help for
anything since:
- There are no other callers that need to bypass the error checks.
- It's less documenting. When I read tcs_ctrl_write() I kept
wondering if I need to handle cases other than ACTIVE_ONLY or cases
with more commands than could fit in a TCS. This is obvious when
the error checks and code are together.
- The function just isn't that long, so there's no problem
understanding the combined function.
Things were even more confusing because the two functions names didn't
make obvious (at least to me) their relationship.
Simplify by folding one function into the other.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Tested-by: Maulik Shah <mkshah@codeaurora.org>
Link: https://lore.kernel.org/r/20200413100321.v4.3.Ie88ce5ccfc0c6055903ccca5286ae28ed3b85ed3@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Perhaps it's just me, it took a really long time to understand what
the register layout of rpmh-rsc was just from the #defines. Let's add
a bunch of comments describing which blocks are part of other blocks.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20200413100321.v4.2.Iaddc29b72772e6ea381238a0ee85b82d3903e5f2@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This patch makes two changes, both of which should be no-ops:
1. Make read_tcs_reg() / read_tcs_cmd() symmetric to write_tcs_reg() /
write_tcs_cmd().
2. Change the order of operations in the above functions to make it
more obvious to me what the math is doing. Specifically first you
want to find the right TCS, then the right register, and then
multiply by the command ID if necessary.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Tested-by: Maulik Shah <mkshah@codeaurora.org>
Link: https://lore.kernel.org/r/20200413100321.v4.1.I1b754137e8089e46cf33fc2ea270734ec3847ec4@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
When there are more than one WAKE TCS available and there is no dedicated
ACTIVE TCS available, invalidating all WAKE TCSes and waiting for current
transfer to complete in first WAKE TCS blocks using another free WAKE TCS
to complete current request.
Remove rpmh_rsc_invalidate() to happen from tcs_write() when WAKE TCSes
is re-purposed to be used for Active mode. Clear only currently used
WAKE TCS's register configuration.
Fixes: 2de4b8d33e (drivers: qcom: rpmh-rsc: allow active requests from wake TCS)
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1586703004-13674-7-git-send-email-mkshah@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
For RSCs that have sleep & wake TCS but no dedicated active TCS, wake
TCS can be re-purposed to send active requests. Once the active requests
are sent and response is received, the active mode configuration needs
to be cleared so that controller can use wake TCS for sending wake
requests.
Introduce enable_tcs_irq() to enable completion IRQ for repurposed TCSes.
Fixes: 2de4b8d33e (drivers: qcom: rpmh-rsc: allow active requests from wake TCS)
Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org>
[mkshah: call enable_tcs_irq() within drv->lock, update commit message]
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1586703004-13674-6-git-send-email-mkshah@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Add changes to invoke rpmh flush() from CPU PM notification.
This is done when the last the cpu is entering deep CPU idle
states and controller is not busy.
Controllers that have 'HW solver' mode like display RSC do not need
to register for CPU PM notification. They may be in autonomous mode
executing low power mode and do not require rpmh_flush() to happen
from CPU PM notification.
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1586703004-13674-5-git-send-email-mkshah@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
TCSes have previously programmed data when rpmh_flush() is called.
This can cause old data to trigger along with newly flushed.
Fix this by cleaning SLEEP and WAKE TCSes before new data is flushed.
With this there is no need to invoke rpmh_rsc_invalidate() call from
rpmh_invalidate().
Simplify rpmh_invalidate() by moving invalidate_batch() inside.
Fixes: 600513dfee ("drivers: qcom: rpmh: cache sleep/wake state requests")
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1586703004-13674-4-git-send-email-mkshah@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Currently rpmh ctrlr dirty flag is set for all cases regardless of data
is really changed or not. Add changes to update dirty flag when data is
changed to newer values. Update dirty flag everytime when data in batch
cache is updated since rpmh_flush() may get invoked from any CPU instead
of only last CPU going to low power mode.
Also move dirty flag updates to happen from within cache_lock and remove
unnecessary INIT_LIST_HEAD() call and a default case from switch.
Fixes: 600513dfee ("drivers: qcom: rpmh: cache sleep/wake state requests")
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
Reviewed-by: Srinivas Rao L <lsrao@codeaurora.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1586703004-13674-3-git-send-email-mkshah@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
The function platform_get_irq() can log an error already. Thus omit a
redundant message for the exception handling in the calling function.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Link: https://lore.kernel.org/r/eb92fcfb-6181-1f9d-2601-61e5231bd892@web.de
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Looks like SoC ID is not exported to sysfs for some reason.
This patch adds it!
This is mostly used by userspace libraries like Snapdragon
Neural Processing Engine (SNPE) SDK for checking supported SoC info.
Fixes: efb448d0a3 ("soc: qcom: Add socinfo driver")
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20200319121418.5180-1-srinivas.kandagatla@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
In the actual implementation the same compatible string
"mediatek,<chip>-mmsys" is used to bind the clock drivers
(drivers/soc/mediatek) as well as to the gpu driver
(drivers/gpu/drm/mediatek/mtk_drm_drv.c). This ends with the problem
that the only probed driver is the clock driver and there is no display
at all.
In any case having the same compatible string for two drivers is not
correct and should be fixed. To fix this, and maintain backward
compatibility, we can consider that the mmsys driver is the top-level
entry point for the multimedia subsystem, so is not a pure clock
controller but a system controller, and the drm driver is instantiated
by that MMSYS driver.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Acked-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Provide a mtk_mmsys_ddp_connect() and mtk_mmsys_disconnect() functions to
replace mtk_ddp_add_comp_to_path() and mtk_ddp_remove_comp_from_path().
Those functions will allow DRM driver and others to control the data
path routing.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Acked-by: CK Hu <ck.hu@mediatek.com>
Tested-by: Anders Roxell <anders.roxell@linaro.org>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
There is no strong reason for this to use CLK_OF_DECLARE instead of
being a platform driver. Plus, MMSYS provides clocks but also a shared
register space for the mediatek-drm and the mediatek-mdp
driver. So move the MMSYS clocks to a new platform driver and also
create a new MMSYS platform driver in drivers/soc/mediatek that
instantiates the clock driver.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This tag contains the patches I'd like to target for 5.7. It has a handful of
new features:
* Partial support for the Kendryte K210. There are still a few outstanding
issues that I have patches for, but I don't actually have a board to test
them so they're not included yet.
* SBI v0.2 support.
* Fixes to support for building with LLVM-based toolchains. The resulting
images are known not to boot yet.
This builds and boots for me. There is one merge conflict, it's just a Kconfig
merge issue. I can publish a resolved branch if you'd like.
I don't anticipate a part two, but I'll probably have something early in the
RCs to finish up the K210 support.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCgAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAl6OAAoTHHBhbG1lckBk
YWJiZWx0LmNvbQAKCRAuExnzX7sYiUqKEACidkNwwFf10hN6ojnIsBeh0mvZ0QuD
qw5Uj0L5rmKdf84IRUGH8A3tyal39BoNz41Eo0mvZoInj542fVMArrqpAIKHN6e+
GMOoHgeZO329zQYMqBX1RN/W9MV80KPKZcROeWkL+AbAmbQBaVRq08Ur1QIg2bHI
84H0LzlCd1xz9k827ypOyz7ix4OYkli7DcUgdiPTK95CjaseALQXvSYA237lcXpB
3g2L+/TDrjtGHn+vy3XWLJISY/BY4ZKfWN0UL4CJHvGuL61tJ+VRXaA3DQcBNd56
7du41GTz9BU6J5wZTVnB5HstebwiXyP8pY34Pp8S4/wWyVdoi5hZ0Jn7sC9oDdnA
r/CjawrGCZv6IEt69YA1edo3AoR13gXCbylRovdxVMRYa0OLmcTfFr843svTZzbQ
ECSt6te2J2YwtYeLO6AlZeu2gBLW0Mxh5JBmiB8sy9C8tVlD/EFTYrnhEQnjUEVx
wV76wfbeYL1be5IS4Tu/d0F5My6miIL+JafUND0bJQ7igp08po/YY4NIg/xyYlM2
Aqie3MuTYlA3/I20N1K2mQkQnjKS4Y5AqNDj5povew2mPUvTGuLhZDZ/asKxdBIf
BSq3V74V/Vc+qsh1d5IhUCDVthGYqBoJoBSUjcbItrpgmhLyvhbbSCLeF8ehDPeI
Y9074bg5YH79pg==
=P1DO
-----END PGP SIGNATURE-----
Merge tag 'riscv-for-linus-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V updates from Palmer Dabbelt:
"This contains a handful of new features:
- Partial support for the Kendryte K210.
There are still a few outstanding issues that I have patches for,
but I don't actually have a board to test them so they're not
included yet.
- SBI v0.2 support.
- Fixes to support for building with LLVM-based toolchains. The
resulting images are known not to boot yet.
I don't anticipate a part two, but I'll probably have something early
in the RCs to finish up the K210 support"
* tag 'riscv-for-linus-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (38 commits)
riscv: create a loader.bin boot image for Kendryte SoC
riscv: Kendryte K210 default config
riscv: Add Kendryte K210 device tree
riscv: Select required drivers for Kendryte SOC
riscv: Add Kendryte K210 SoC support
riscv: Add SOC early init support
riscv: Unaligned load/store handling for M_MODE
RISC-V: Support cpu hotplug
RISC-V: Add supported for ordered booting method using HSM
RISC-V: Add SBI HSM extension definitions
RISC-V: Export SBI error to linux error mapping function
RISC-V: Add cpu_ops and modify default booting method
RISC-V: Move relocate and few other functions out of __init
RISC-V: Implement new SBI v0.2 extensions
RISC-V: Introduce a new config for SBI v0.1
RISC-V: Add SBI v0.2 extension definitions
RISC-V: Add basic support for SBI v0.2
RISC-V: Mark existing SBI as 0.1 SBI.
riscv: Use macro definition instead of magic number
riscv: Add support to dump the kernel page tables
...
These are the usual updates for SoC specific device drivers and related
subsystems that don't have their own top-level maintainers:
- ARM SCMI/SCPI updates to allow pluggable transport layers
- TEE subsystem cleanups
- A new driver for the Amlogic secure power domain controller
- Various driver updates for the NXP Layerscape DPAA2, NXP i.MX SCU and
TI OMAP2+ sysc drivers.
- Qualcomm SoC driver updates, including a new library module for
"protection domain" notifications
- Lots of smaller bugfixes and cleanups in other drivers
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl6EaKsACgkQmmx57+YA
GNng5RAAnSi3jLBG3PsX4XCydurlhbYDnakzp2x7kNi0aeN0mR7YT6nbmm8Iax0A
tYpUNt6mhsSnE7thAX6kIm1CIPw7oKzg5tz9TaNRJT6q1i0+MA0bWAX0KOVzruj5
xllUIoV0WsYHRjqjxWOJht7zYKTX5PoKr3weRVqHYR60hjkNFT4Myx3HpXn5nQ46
sEgic+S8WCsbffPqs5HUqkNx9R6D7RIJ72BFSF7o1wy2Brj+g0BxfxAjty+kaWwT
LtsJm0naGGRag17iij7wBnZ+odWNi80qhtthUncx/c5s517J8Z7Nq2QZJa7XhhjV
9+/1av7wKyE+V54wnCP4ACZjyE+xE3ghzVxOuzjZfbhkmNCELAx2jmQJbt9gr/t4
Uek8iANq3bo0epy4iJglfeEJuZ8rZal3oC1gU5rCun/VsqPe5OWhFCzvhu7zVgnD
Npk/IhCrp7117v5DG2Pvhd9YxigZ4ju3NW2gWukh0TemejRIzyoZyNWux+JD/jCn
V3ANtT4aCqTJ3ZOL7IaDcX5Kze4KmZZvNKvSSCndcen7u95Z8eW9sIKkSrlp3P5f
cZAdyULX22im6jXzNz4DJYFRrYgRdXfRLyrS555rGoYZGB1FB1Jhl7SUr385XpBZ
XD18oPIPm0C3Dn/nhbKC8K44tpKazET8aMCg5lO4bzI5EwqingI=
=qbsP
-----END PGP SIGNATURE-----
Merge tag 'arm-drivers-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM driver updates from Arnd Bergmann:
"These are the usual updates for SoC specific device drivers and
related subsystems that don't have their own top-level maintainers:
- ARM SCMI/SCPI updates to allow pluggable transport layers
- TEE subsystem cleanups
- A new driver for the Amlogic secure power domain controller
- Various driver updates for the NXP Layerscape DPAA2, NXP i.MX SCU
and TI OMAP2+ sysc drivers.
- Qualcomm SoC driver updates, including a new library module for
"protection domain" notifications
- Lots of smaller bugfixes and cleanups in other drivers"
* tag 'arm-drivers-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (70 commits)
soc: fsl: qe: fix sparse warnings for ucc_slow.c
soc: fsl: qe: ucc_slow: remove 0 assignment for kzalloc'ed structure
soc: fsl: qe: fix sparse warnings for ucc_fast.c
soc: fsl: qe: fix sparse warnings for qe_ic.c
soc: fsl: qe: fix sparse warnings for ucc.c
soc: fsl: qe: fix sparse warning for qe_common.c
soc: fsl: qe: fix sparse warnings for qe.c
soc: qcom: Fix QCOM_APR dependencies
soc: qcom: pdr: Avoid uninitialized use of found in pdr_indication_cb
soc: imx: drop COMPILE_TEST for IMX_SCU_SOC
firmware: imx: add COMPILE_TEST for IMX_SCU driver
soc: imx: gpc: fix power up sequencing
soc: imx: increase build coverage for imx8m soc driver
soc: qcom: apr: Add avs/audio tracking functionality
dt-bindings: soc: qcom: apr: Add protection domain bindings
soc: qcom: Introduce Protection Domain Restart helpers
devicetree: bindings: firmware: add ipq806x to qcom_scm
memory: tegra: Correct debugfs clk rate-range on Tegra124
memory: tegra: Correct debugfs clk rate-range on Tegra30
memory: tegra: Correct debugfs clk rate-range on Tegra20
...
The code changes are mostly for 32-bit platforms and include:
- Lots of updates for the Nvidia Tegra platform, including
cpuidle, pmc, and dt-binding changes
- Microchip at91 power management updates for the recently added
sam9x60 SoC
- Treewide setup_irq deprecation by afzal mohammed
- STMicroelectronics stm32 gains earlycon support
- Renesas platforms with Cortex-A9 can now use the global timer
- Some TI OMAP2+ platforms gain cpuidle support
- Various cleanups for the i.MX6 and Orion platforms, as well as
Kconfig files across all platforms
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl6EaLsACgkQmmx57+YA
GNkg/Q/9EmLGT/bznqi6P/8V75qPY6j4swife5HlI43EdCEyN+iME1w1rFfrNilf
A/QyXzxhYgUZoyIt7K4qjWc8fPNlJZ8X10UqeEftQFxi82cmX2+OaT2fy6OdHVRJ
SAGb1pw7463TQ6LKA7LC7rztFjahsjnE/9szlgXQT4v5OzayGyxd3OKy2Q1zASEi
rwN+85Lh+xJvWhhenPKVvs2Dei+up8Y9uyPfJkj2QudCB+zx5k5stkk4EiQLBd1W
SHzhijbSU3MrAUz2Cnp9Qa+86DdGPvFPfpzQy3pSYU9nNrC0aKpS8YmHT99SIWVN
6R1YJF7Htmui5I9+O0baejJMEqvzGUysqe+rQdCofD7ooVKWU7WKYj5HxZxyBCEN
dvlN3KRmS6l5KLsZARSxuBUw2MPTgjsxczZ84NKMLj8czw6yXyrePZ1RWiEZ4HIu
4GiFNLYSMmAynD/dLuC9USDsjlPsQKnQ3e8hDf3a6oK5OHUIkr3uvguhqWa5WJsi
cy2DUeWJkXgJDhlxcfr8MiPpPJRo3N/8O8PYci8dkdDFRs32j/5Qf22vywDdUHaZ
I9Pl+VOGOSGiqRc9gmay6DNXpJusfuv72omrz4rL4kGMahpk0LeV5w+a9TdrkreY
sLM67wtshOjOVMc/ebQ5Q8RR17Go+MFK+Co9Yc1ybbQ6lkSzeuY=
=UTk1
-----END PGP SIGNATURE-----
Merge tag 'arm-soc-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC updates from Arnd Bergmann:
"The code changes are mostly for 32-bit platforms and include:
- Lots of updates for the Nvidia Tegra platform, including cpuidle,
pmc, and dt-binding changes
- Microchip at91 power management updates for the recently added
sam9x60 SoC
- Treewide setup_irq deprecation by afzal mohammed
- STMicroelectronics stm32 gains earlycon support
- Renesas platforms with Cortex-A9 can now use the global timer
- Some TI OMAP2+ platforms gain cpuidle support
- Various cleanups for the i.MX6 and Orion platforms, as well as
Kconfig files across all platforms"
* tag 'arm-soc-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (75 commits)
ARM: qcom: Add support for IPQ40xx
ARM: mmp: replace setup_irq() by request_irq()
ARM: cns3xxx: replace setup_irq() by request_irq()
ARM: spear: replace setup_irq() by request_irq()
ARM: ep93xx: Replace setup_irq() by request_irq()
ARM: iop32x: replace setup_irq() by request_irq()
arm: mach-dove: Mark dove_io_desc as __maybe_unused
ARM: orion: replace setup_irq() by request_irq()
ARM: debug: stm32: add UART early console support for STM32MP1
ARM: debug: stm32: add UART early console support for STM32H7
ARM: debug: stm32: add UART early console configuration for STM32F7
ARM: debug: stm32: add UART early console configuration for STM32F4
cpuidle: tegra: Disable CC6 state if LP2 unavailable
cpuidle: tegra: Squash Tegra114 driver into the common driver
cpuidle: tegra: Squash Tegra30 driver into the common driver
cpuidle: Refactor and move out NVIDIA Tegra20 driver into drivers/cpuidle
ARM: tegra: cpuidle: Remove unnecessary memory barrier
ARM: tegra: cpuidle: Make abort_flag atomic
ARM: tegra: cpuidle: Handle case where secondary CPU hangs on entering LP2
ARM: tegra: Make outer_disable() open-coded
...
Add support for the Kendryte K210 RISC-V SoC. For now, this support
only provides a simple sysctl driver allowing to setup the CPU and
uart clock. This support is enabled through the new Kconfig option
SOC_KENDRYTE and defines the config option CONFIG_K210_SYSCTL
to enable the K210 SoC sysctl driver compilation.
The sysctl driver also registers an early SoC initialization function
allowing enabling the general purpose use of the 2MB of SRAM normally
reserved for the SoC AI engine. This initialization function is
automatically called before the dt early initialization using the flat
dt root node compatible property matching the value "kendryte,k210".
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
[Palmer: Add missing endmenu in Kconfig.socs]
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
- add support for MT6779 SoC
cmdq-helper:
- set knows_txdone in mailbox client
-----BEGIN PGP SIGNATURE-----
iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAl50pW8XHG1hdHRoaWFz
LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH67Aw/+IZlwFvspiqJTCujacHquxvIb
6BfgGs0v1Byv2cySLVianZbtc1mvWk8gS9ODdtcRvDTE3aQsyDm4Qmn8cWxa/VsA
+uUf1m7aS9ec5MQUN7TOyX44WyePw/gndtcnvlX0gsB9fl1DnYoEcSokXxxpARvg
RYuxG0Isyw3cr8ybWf4BgO2zsrfFKZ+z2YWp8aY74/V5JZdTUbHBQ2XxfInyXka8
VUaGwIH7QfYJUNa6m6DmEsFro47Gy1Jq4DZAz6pIae5lIAfd53G9KWlfwz4VI06v
l41/HYKWEd/qRVnBPY7K6wOTl7aSAWWQCdaWaFVqu9m7C3PxLgNv0txgubAb7cI5
uUvBGh+mgdfJYS9rlfzWvRFFpGXpsaO8JXxo5+sqin9xy8tP3GiYvDlsXaYXLFVk
KpLbGdTmd2wQOQEW4pubck4gzSBwgCP51R5L9iU1SiVT3Tod7RriEUtU+noTQUGA
CeEwUhnnsSDzKv/5iEhDXAFW2Va6Q7YaEvRzw4PuneF56XF2SClGWmpe4PLtJuw7
Szwo3fiq+NqbKJoa5KYQvbheiXZN8fADc1o7JkUTp/hvHBcixjUV3kCqGeJ2xR/z
+MU4kX1FCgugBlMZzOA7l6rHVJaK0jjItqFNy8Q4IqQGZ2FyJPl46XPFV1W1h23L
F0RNdxarsXGbXN63V3c=
=+JxZ
-----END PGP SIGNATURE-----
Merge tag 'v5.6-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/soc
pmic wrapper:
- add support for MT6779 SoC
cmdq-helper:
- set knows_txdone in mailbox client
* tag 'v5.6-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
soc: mediatek: pwrap: add support for MT6359 PMIC
soc: mediatek: pwrap: add pwrap driver for MT6779 SoCs
dt-bindings: pwrap: mediatek: add pwrap support for MT6779
soc: mediatek: knows_txdone needs to be set in Mediatek CMDQ helper
Link: https://lore.kernel.org/r/61165e91-f211-ad37-a81c-cbf3ff69fa1b@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
These changes implement various clocks that are controlled by the PMC
and add support for configuring the voltage level of some pins (needed
for example to support high-speed modes on the SD/MMC interfaces).
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAl5rtocTHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoSCxEACJ6z347KCFmlo2j2dy6IPzhwLUNfIu
MN+DxXzvgUPVslfYGp0AG0JCH6OKgFFnOiimJwgJaW573H3YC0+WybZjHZ4BgsJs
xy8x+aoLYikCJAA8A1fc+2F4g98Nw7sYpiRJc8Ry/fZmCsho4XGKEhNS2GqvuWGn
KQwah9M7ZgkJmb1eo4+Sxe7LfLpIBP+mG7nEI8CCr4DD1EF8c00dQ1xTUwQ4SOsU
Trc3Usonkhp7J4Oe82i8f1VqvS6+83+48FVP9PUsaf9LUEKMOhh/Z6XnEAH4ZVlq
q8oSpxY7AE0NrbjsgsN+hNeP9plQCv2XjmjD9xBk6C8y4drP8bMN2BVaRBBjoTHr
5R1br3HIKYNsgLJ7bYM3QvEN5Nk4gdT0wkpKVto12TKxYlxe+JRO5IeyJ17Jv0zH
yxMfyoHtqHgw3+Os3CtfVWgRs8egnN6W59C/vZxT02b7gqb89Ks80N4Y54bQEc1h
xqnT1NlPPvm4XctDzNKUz9EDoEb0KdblK/e9TnqFH9fbqE7QrwoPROSfv2wvXP6p
ej0GN1uIb9LPhTFSHX6Iu1EuAEuSwOFtEK2ZPHK4Ce2al03RQzsPQ/GCGIwxr1cM
+aGuURcAevR7Q8Tn8NB8xkI2l9p2dn3kMAgvqL1gcWi18eTJfRMgjejwcCZQds0C
mWEidGa+jrrNMQ==
=bszz
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.7-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/soc
soc/tegra: Changes for v5.7-rc1
These changes implement various clocks that are controlled by the PMC
and add support for configuring the voltage level of some pins (needed
for example to support high-speed modes on the SD/MMC interfaces).
* tag 'tegra-for-5.7-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: pmc: Cleanup whitespace usage
soc/tegra: pmc: Add pins for Tegra194
soc/tegra: Add support for 32 kHz blink clock
soc/tegra: Add Tegra PMC clocks registration into PMC driver
dt-bindings: usb: Add NVIDIA Tegra XUSB device mode controller binding
dt-bindings: phy: tegra-xusb: Add usb-role-switch
dt-bindings: phy: tegra: Add Tegra194 support
dt-bindings: soc: tegra-pmc: Add ID for Tegra PMC 32 kHz blink clock
dt-bindings: soc: tegra-pmc: Add Tegra PMC clock bindings
dt-bindings: tegra: Convert Tegra PMC bindings to YAML
dt-bindings: clock: tegra: Add IDs for OSC clocks
Link: https://lore.kernel.org/r/20200313165848.2915133-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
A series of changes from Dave Gerlach to enable basic cpuidle support
for am335x and am437x based on generic cpuidle-arm driver.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAl5ic/ERHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXM3ZQ/9Gc7VbcShorVrHH1jMCtE21vSDxNmYq0f
tO8FfP8NP31g5Vsx7LiyhKmk80IKADpaDdih+UAkAxZ58ar8uJOaIYjdwKkho4Ra
d+upw8z6GX6C3nknmrwFTT0+31/BHC7w6kPR15f1IVz9BmXimtxGww7LX+2U1T1l
iqBMAaftqNiyci/Enj5RNAQa7ahyreIaJeBLJAP/9cYexkYvBtmPJkzV073ayqoz
43YP39ozTvSRzg+FTvxZMy6u8LUUoJWRETpXWSVAMIbnxAOiZnVvHOXYRtQzmAMj
WNgwpV7oZ34thFpg6ks61Eu56p1qH0qvYhEYev8JRqGSJHZ6j+6dvb3Mu1yNySDm
36K8Ko+U39P4OB/v4xtC/eSQux/C7aBbP3zbgzf/68f0GmE0Y33JvKE0uc0/vGPE
Wd3s0wpeeBlzNJOrdtfgwPCE64HpsbFyR+Ys9PCYQMBRjnKEuZJm0nagQKfgPdIZ
icS2aZhlAMeUMEB2LulagExHlUxh9YIobyL0fmw1WJEmcl33KXU4ECEI1Br0iLw+
oVb3+W1tXuDjnVrL4+IocjfGNP21qcIAULCrEK3GWFm71IA6fKsilRfwSus+jW6n
zpn7H3/VspNWyyKEGfKg84JCcYsBTLDrU3l6eG9flrUBnHM9YmQinMEuva4ovcwf
h1W7qwaau2s=
=nQLE
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v5.7/pm33xx-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/soc
PM changes for am335x and am437x for v5.7 merge window
A series of changes from Dave Gerlach to enable basic cpuidle support
for am335x and am437x based on generic cpuidle-arm driver.
* tag 'omap-for-v5.7/pm33xx-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: omap2plus_defconfig: Add CONFIG_ARM_CPUIDLE
soc: ti: pm33xx: Add base cpuidle support
ARM: OMAP2+: pm33xx-core: Extend platform_data ops for cpuidle
ARM: OMAP2+: pm33xx-core: Add cpuidle_ops for am335x/am437x
dt-bindings: arm: cpu: Add TI AM335x and AM437x enable method
Link: https://lore.kernel.org/r/pull-1583511417-919838@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Enable ARM global timer on Cortex-A9 MPCore SoCs,
- A minor cleanup.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCXlY/5AAKCRCKwlD9ZEnx
cIjhAP4z5G8Yweqd+XxkqjYgRHiKlLkONVeCvK4ZADcH5O0J+wEAzL/fLAtPYDwX
YEEtUM4170RmK+g15F3JqJ372MOaWAg=
=N/dh
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm-soc-for-v5.7-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/soc
Renesas ARM SoC updates for v5.7
- Enable ARM global timer on Cortex-A9 MPCore SoCs,
- A minor cleanup.
* tag 'renesas-arm-soc-for-v5.7-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
ARM: shmobile: Replace <linux/clk-provider.h> by <linux/of_clk.h>
ARM: shmobile: Enable ARM_GLOBAL_TIMER on Cortex-A9 MPCore SoCs
Link: https://lore.kernel.org/r/20200226110221.19288-3-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Correct the probe return value to -ENODEV on non-Exynos platforms.
Link: https://lore.kernel.org/r/20200316175652.5604-4-krzk@kernel.org
Fixes: 02fb29882d ("soc: samsung: chipid: Drop "syscon" compatible requirement")
Cc: <stable@vger.kernel.org>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Update SCU power domain driver to include PD ranges for audio, CM40
I2C and INTMUX, also enlarge PD range for mu_b.
- Remove IMX_SC_RPC_SVC_ABORT from SCU API, as it was added by mistake.
- Increase build test coverage for i.MX8M SoC and IMX_SCU driver.
- Improve i.MX GPC power up sequencing to ensure that the reset is
properly propagated through the peripheral devices in the power
domain.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAl5xhKcUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM4/6gf/e9lFuDNG9HiVsDad6YODwzZZxNF6
AxBqD924W4chqLZboAgahFVrWEyINourkzx9PMYK5gE6D6lxEnHhevbfVOYaw3NT
Wjv4TSOCMzzlfzJIeFf+m0vzTR3gOtmE6Cto/HMd95IlF+afCzIWrKW+gAGWoRVH
c1sCstForQ8SMoFixCJ+YfV8DXje1wGqgLEquMtn5jih2ZEIijo2XZ4nPs6ip4mV
Pf+a3WXuN2NB13U2CKbkonk+JY2d8OFqLNQer7WsNp29wCSJqZB2ewnZP/vGSqvO
e/i4BxMTtKg/2DPZFmCZNVbM3aEf0tv2E2c28bcb5qDuJfFu2jE4+olwCg==
=LVyO
-----END PGP SIGNATURE-----
Merge tag 'imx-drivers-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers
i.MX drivers update for 5.7:
- Update SCU power domain driver to include PD ranges for audio, CM40
I2C and INTMUX, also enlarge PD range for mu_b.
- Remove IMX_SC_RPC_SVC_ABORT from SCU API, as it was added by mistake.
- Increase build test coverage for i.MX8M SoC and IMX_SCU driver.
- Improve i.MX GPC power up sequencing to ensure that the reset is
properly propagated through the peripheral devices in the power
domain.
* tag 'imx-drivers-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx: drop COMPILE_TEST for IMX_SCU_SOC
firmware: imx: add COMPILE_TEST for IMX_SCU driver
soc: imx: gpc: fix power up sequencing
soc: imx: increase build coverage for imx8m soc driver
firmware: imx: scu-pd: add power domain for I2C and INTMUX in CM40 SS
firmware: imx: Remove IMX_SC_RPC_SVC_ABORT
firmware: imx: scu-pd: enlarge PD range for mu_b
firmware: imx: scu-pd: Add missing audio PD ranges
soc: imx: gpcv2: include linux/sizes.h
Link: https://lore.kernel.org/r/20200318051918.32579-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This adds a new library for subscribing to notifications about
protection domains being stated and stopped and the integration of this
with the APR driver. It also contains fixes and cleanups for AOSS
driver, socinfo and rpmh.
-----BEGIN PGP SIGNATURE-----
iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAl5xplIbHGJqb3JuLmFu
ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FgPQQAOF2RxwpvpVwRvIN0emM
fMB9FOFhaLWx0ETkY1LXaRdNLOVTB6TgD7Ji9jeXOtiXR3H0NjG0Q6Q8nwaxkKP2
hMaJki5ojbTI2eTqHlkctVs9OsLAd4ldpjqMxOhlWWH0Q7Cn56mNpBpZiHBuFnAL
tV+hbtnZDNmPdyh4FZq7DoxJmAf3yrp7nNK/jRmFx0LIT1WJu9lpfwWOUNe2ljuK
BMHBcROi1Ar226zXl0wNQZMtMAbDc+4z7Mn0aVx1TES2RR8iP4GwBDvrBvvZGmdD
Hb3QGnk0qYnwFlqPfw0gsRGv9kivw2O18GK5QPYrj9PJji562T6Tk2xFFF+Tdhg8
QeMlLHzz+xyFcQHZzYpXHQTDI8TjVw84p9MmGMlLUerC+V9GfWRB+fx6giD3zwWC
tyHR7gzs0tCx56zz1ndRDR0CaWMdwbfct0hwhKjap72KUTSGBCATCdvesuZVlClc
emh+kNcoPgO9iTau/mDijVLDmnZwHrOd/9fuXxJO+Pl0qi3eqfwDZcHH3CBrSRym
XITmZe430o+uv+rHj+hINyCLlVXL5mSv/u7uc6flsS9L02vh0rrKwzasH6/klRje
SBSeh8I+Qh5f91Y2lxnPUrV7yMdqHaGDapbzMzDqId/aFEQenkObMEJ/trzoHb3N
5U4dOSAANFJMz5jFgDPMxmxK
=qXj9
-----END PGP SIGNATURE-----
Merge tag 'qcom-drivers-for-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers
Qualcomm driver updates for v5.7
This adds a new library for subscribing to notifications about
protection domains being stated and stopped and the integration of this
with the APR driver. It also contains fixes and cleanups for AOSS
driver, socinfo and rpmh.
* tag 'qcom-drivers-for-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
soc: qcom: Fix QCOM_APR dependencies
soc: qcom: pdr: Avoid uninitialized use of found in pdr_indication_cb
soc: qcom: apr: Add avs/audio tracking functionality
dt-bindings: soc: qcom: apr: Add protection domain bindings
soc: qcom: Introduce Protection Domain Restart helpers
devicetree: bindings: firmware: add ipq806x to qcom_scm
soc: qcom: socinfo: Use seq_putc() if possible
drivers: qcom: rpmh-rsc: Use rcuidle tracepoints for rpmh
soc: qcom: Do not depend on ARCH_QCOM for QMI helpers
soc: qcom: aoss: Read back before triggering the IRQ
soc: qcom: aoss: Use wake_up_all() instead of wake_up_interruptible_all()
drivers: qcom: rpmh: remove rpmh_flush export
drivers: qcom: rpmh: fix macro to accept NULL argument
Link: https://lore.kernel.org/r/20200318044236.GD470201@yoga
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes the following sparse warning:
drivers/soc/fsl/qe/qe_common.c:75:48: warning: incorrect type in argument 2 (different base types)
drivers/soc/fsl/qe/qe_common.c:75:48: expected restricted __be32 const [usertype] *addr
drivers/soc/fsl/qe/qe_common.c:75:48: got unsigned int *
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Reviewed-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Fixes the following sparse warnings:
drivers/soc/fsl/qe/qe.c:426:9: warning: cast to restricted __be32
drivers/soc/fsl/qe/qe.c:528:41: warning: incorrect type in assignment (different base types)
drivers/soc/fsl/qe/qe.c:528:41: expected unsigned long long static [addressable] [toplevel] [usertype] extended_modes
drivers/soc/fsl/qe/qe.c:528:41: got restricted __be64 const [usertype] extended_modes
Signed-off-by: Li Yang <leoyang.li@nxp.com>
QCOM_APR selects QCOM_PDR_HELPERS, which in turn selects
QCOM_QMI_HELPERS, which depends on NET. So ensure that APR's
dependencies are met by making it depend on NET as well.
Fixes: 8347356626 ("soc: qcom: apr: Add avs/audio tracking functionality")
Reported-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
With COMPILE_TEST, there will be build error, because IMX_SCU
might be set to n, so drop COMPILE_TEST.
Suggested-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Currently we wait only until the PGC inverts the isolation setting
before disabling the peripheral clocks. This doesn't ensure that the
reset is properly propagated through the peripheral devices in the
power domain.
Wait until the PGC signals that the power up request is done and
wait a bit for resets to propagate before disabling the clocks.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The soc-imx8.c driver is actually for i.MX8M family, so rename it
to soc-imx8m.c.
Use CONFIG_SOC_IMX8M as build gate, not CONFIG_ARCH_MXC, to control
whether build this driver, also make it possible for compile test.
Default set it to y for ARCH_MXC && ARM64
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Use PDR helper functions to track the protection domains that the apr
services are dependent upon on SDM845 SoC, specifically the "avs/audio"
service running on ADSP Q6.
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200312120842.21991-4-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Qualcomm SoCs (starting with MSM8998) allow for multiple protection domains
to run on the same Q6 sub-system. This allows for services like ATH10K WLAN
FW to have their own separate address space and crash/recover without
disrupting the modem and other PDs running on the same sub-system. The PDR
helpers introduces an abstraction that allows for tracking/controlling the
life cycle of protection domains running on various Q6 sub-systems.
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200312120842.21991-2-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Avoid using a mixture of tabs and spaces within tables to make them
easier to read and more consistently formatted.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Extend the Tegra194 IO pad table with additional information such as pin
names and 1.8/3.3 V settings to allow a table of voltage control pins to
generated from it. This is similar to what's done for older chips and is
needed to support high-speed modes for SDHCI where switching the pins to
1.8V or 3.3V is necessary.
Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra PMC has blink control to output 32 kHz clock out to Tegra blink
pin. Blink pad DPD state and enable controls are part of Tegra PMC
register space.
Currently Tegra clock driver registers blink control by passing PMC
address and register offset to clk_register_gate which performs direct
PMC access during clk_ops and with this when PMC is in secure mode, any
access from non-secure world does not go through.
This patch adds blink control registration to the Tegra PMC driver using
PMC specific clock gate operations that use tegra_pmc_readl() and
tegra_pmc_writel() to support both secure mode and non-secure
mode PMC register access.
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
