Commit Graph

45789 Commits

Author SHA1 Message Date
Ben Skeggs
1ce466894b drm/nouveau/core: define FAULT subdev
This will be responsible for the handling of MMU fault buffers on GPUs
that support them.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:20 +10:00
Gustavo A. R. Silva
7bf5b70bef drm/nouveau/secboot: remove VLA usage
In preparation to enabling -Wvla, remove VLA. In this particular
case directly use macro NVKM_MSGQUEUE_CMDLINE_SIZE instead of local
variable cmdline_size. Also, remove cmdline_size as it is not
actually useful anymore.

The use of stack Variable Length Arrays needs to be avoided, as they
can be a vector for stack exhaustion, which can be both a runtime bug
or a security flaw. Also, in general, as code evolves it is easy to
lose track of how big a VLA can get. Thus, we can end up having runtime
failures that are hard to debug.

Also, fixed as part of the directive to remove all VLAs from
the kernel: https://lkml.org/lkml/2018/3/7/621

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:20 +10:00
Arnd Bergmann
9dfbd73199 drm/nouveau: nouveau: use larger buffer in nvif_vmm_map
gcc points out a buffer that is clearly too small to be used
in a meaningful way, as the 'sizeof(*args) + argc > sizeof(stack)'
will always fail:

In function 'memcpy',
    inlined from 'nvif_vmm_map' at drivers/gpu/drm/nouveau/nvif/vmm.c:55:2:
include/linux/string.h:353:9: error: '__builtin_memcpy' offset 40 is out of the bounds [0, 16] of object 'stack' with type 'u8[16]' {aka 'unsigned char[16]'} [-Werror=array-bounds]
  return __builtin_memcpy(p, q, size);
         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/nouveau/nvif/vmm.c: In function 'nvif_vmm_map':
drivers/gpu/drm/nouveau/nvif/vmm.c:40:5: note: 'stack' declared here

This makes the buffer large enough so it should serve the purpose
that the author presumably had in mind. Alternatively we could
just get rid of it completely and simplify the code at the cost
of always doing the kmalloc (as we do in the current version).

Fixes: 920d2b5ef2 ("drm/nouveau/mmu: define user interfaces to mmu vmm opertaions")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:19 +10:00
Dave Airlie
1fafef9dfe urgent i686 mmap fix for drm drivers
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Merge drm-fixes-for-v4.17-rc6-urgent into drm-next

Need to backmerge some nouveau fixes to reduce
the nouveau -next conflicts a lot.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-05-18 14:08:53 +10:00
Laurent Pinchart
315852b422 drm: rcar-du: Fix build failure
Commit 75a07f399c ("drm: rcar-du: Zero-out sg_tables when duplicating
plane state") introduced a reference to the alpha field of struct
rcar_du_vsp_plane_state that got removed in commit 301a9b8d54
("drm/rcar-du: Convert to the new generic alpha property"). The issue
stems from the merge of the two commits through separate branches and
breaks compilation of the driver. Fix it.

Fixes: 75a07f399c ("drm: rcar-du: Zero-out sg_tables when duplicating plane state")
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Tested-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180515174752.28954-1-laurent.pinchart+renesas@ideasonboard.com
2018-05-17 15:03:40 +10:00
Laurent Pinchart
dd856d924b drm: rcar-du: Fix rcar_du_of_init() stub
The rcar_du_of_init() function is supposed to be defined as a stub when
CONFIG_DRM_RCAR_LVDS is disabled as the rcar_du_of.c file isn't compiled
in that case. However, a bug in the configuration option check makes it
a stub when CONFIG_DRM_RCAR_LVDS=m as well, which prevents legacy DTs
from being fixed at boot time. Fix the configuration option check by
using IS_ENABLED.

Fixes: 81c0e3dd82 ("drm: rcar-du: Fix legacy DT to create LVDS encoder nodes")
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180515155736.3379-1-laurent.pinchart+renesas@ideasonboard.com
2018-05-17 15:03:32 +10:00
Stephen Rothwell
548da31da9 drm/amdgpu: include pagemap.h for release_pages()
Fixes: 5ae0283e83 ("drm/amdgpu: Add userptr support for KFD"
Cc: Felix Kuehling <Felix.Kuehling@amd.com>
Cc: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-05-17 14:59:08 +10:00
Dave Airlie
95d2c3e15d Merge branch 'drm-next-4.18' of git://people.freedesktop.org/~agd5f/linux into drm-next
Main changes for 4.18.  I'd like to do a separate pull for vega20 later
this week or next.  Highlights:
- Reserve pre-OS scanout buffer during init for seemless transition from
  console to driver
- VEGAM support
- Improved GPU scheduler documentation
- Initial gfxoff support for raven
- SR-IOV fixes
- Default to non-AGP on PowerPC for radeon
- Fine grained clock voltage control for vega10
- Power profiles for vega10
- Further clean up of powerplay/driver interface
- Underlay fixes
- Display link bw updates
- Gamma fixes
- Scatter/Gather display support on CZ/ST
- Misc bug fixes and clean ups

[airlied: fixup v3d vs scheduler API change]

Link: https://patchwork.freedesktop.org/patch/msgid/20180515185450.1113-1-alexander.deucher@amd.com
Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-05-16 08:31:29 +10:00
Dave Airlie
b8a71080ad Last drm/i915 changes for v4.18:
- NV12 enabling (Chandra, Maarten)
 - ICL workarounds (Oscar)
 - ICL basic DPLL enabling (Paulo)
 - GVT updates
 - DP link config refactoring (Jani)
 - Module parameter to override DMC firmware (Jani)
 - PSR updates (José, DK, Daniel, Ville)
 - ICL DP vswing programming (Manasi)
 - ICL DBuf slice updates (Mahesh)
 - Selftest fixes and updates (Chris, Matthew, Oscar)
 - Execlist fixes and updates (Chris)
 - Stolen memory first 4k fix (Hans de Goede)
 - wait_for fixes (Mika)
 - Tons of GEM improvements (Chris)
 - Plenty of other fixes and improvements (Everyone)
 - Crappy changelog (Me)
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Merge tag 'drm-intel-next-2018-05-14' of git://anongit.freedesktop.org/drm/drm-intel into drm-next

Last drm/i915 changes for v4.18:

- NV12 enabling (Chandra, Maarten)
- ICL workarounds (Oscar)
- ICL basic DPLL enabling (Paulo)
- GVT updates
- DP link config refactoring (Jani)
- Module parameter to override DMC firmware (Jani)
- PSR updates (José, DK, Daniel, Ville)
- ICL DP vswing programming (Manasi)
- ICL DBuf slice updates (Mahesh)
- Selftest fixes and updates (Chris, Matthew, Oscar)
- Execlist fixes and updates (Chris)
- Stolen memory first 4k fix (Hans de Goede)
- wait_for fixes (Mika)
- Tons of GEM improvements (Chris)
- Plenty of other fixes and improvements (Everyone)
- Crappy changelog (Me)

Signed-off-by: Dave Airlie <airlied@redhat.com>

# gpg: Signature made Mon 14 May 2018 11:04:24 PM AEST
# gpg:                using RSA key D398079D26ABEE6F
# gpg: Good signature from "Jani Nikula <jani.nikula@intel.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 1565 A65B 77B0 632E 1124  E59C D398 079D 26AB EE6F

# Conflicts:
#	drivers/gpu/drm/i915/intel_lrc.c
#	drivers/gpu/drm/i915/intel_sprite.c
Link: https://patchwork.freedesktop.org/patch/msgid/87k1s51bvw.fsf@intel.com
2018-05-16 07:10:13 +10:00
Nayan Deshmukh
8344c53f57 drm/scheduler: remove unused parameter
this patch also effect the amdgpu and etnaviv drivers which
use the function drm_sched_entity_init

Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Suggested-by: Christian König <christian.koenig@amd.com>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:27 -05:00
Dirk Hohndel
1297bf2e91 Add SPDX idenitifier and clarify license
This is dual licensed under GPL-2.0 or MIT.

Signed-off-by: Dirk Hohndel (VMware) <dirk@hohndel.org>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:27 -05:00
Christian König
6b155d6af0 drm/amdgpu: print the BO flags in the gem debugfs entry
Quite useful to know.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:27 -05:00
Christian König
c7535379f6 drm/amdgpu: drop printing the BO offset in the gem debugfs (v2)
It is meaningless anyway.

v2: remove unused variable (Alex)

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:26 -05:00
Yong Zhao
959a2091fa drm/amdgpu: Add support to change mtype for 2nd part of gart BOs on GFX9
This change prepares for a workaround in amdkfd for a GFX9 HW bug. It
requires the control stack memory of compute queues, which is allocated
from the second page of MQD gart BOs, to have mtype NC, rather than
the default UC.

Signed-off-by: Yong Zhao <yong.zhao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:26 -05:00
Mikita Lipski
8eb7719813 drm/amd/powerplay: Add notify PWE function to SMU10
Functionality to message smc to enable pwe after gpu suspense.
It is used in case when display resumes from S3 and wants to start
audio driver by enabling pwe.

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:25 -05:00
Shirish S
a2a330ad66 drm/amd/display: remove need of modeset flag for overlay planes (V2)
This patch is in continuation to the
"843e3c7 drm/amd/display: defer modeset check in dm_update_planes_state"
where we started to eliminate the dependency on
DRM_MODE_ATOMIC_ALLOW_MODESET to be set by the user space,
which as such is not mandatory.

After deferring, this patch eliminates the dependency on the flag
for overlay planes.

This has to be done in stages as its a pretty complex and requires thorough
testing before we free primary planes as well from dependency on modeset
flag.

V2: Simplified the plane type check.

Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:25 -05:00
Junwei Zhang
c430bc9770 drm/amdgpu: fix null pointer for bo unmap trace function
fix crash in trace.

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:25 -05:00
Alex Deucher
323a9dbc45 drm/amdgpu/gmc9: remove unused register defs
These got moved to the new df module so no longer
used in this file.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:24 -05:00
Christian König
996cab9553 drm/amdgpu: add HDP flush dummy for UVD 6/7
The UVD firmware doesn't seem to like the HDP flush here.

This worked for years without HDP flush, so just skip it.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:24 -05:00
Junwei Zhang
a50cb94819 drm/amdgpu: set ttm bo priority before initialization
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: David Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:23 -05:00
Junwei Zhang
967c650d49 drm/ttm: remove priority hard code when initializing ttm bo
Then priority could be set before initialization.
By default, it requires to kzalloc ttm bo. In fact, we always do so.

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: David Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:23 -05:00
Rex Zhu
9164e8b7b3 drm/amd/pp: Fix performance drop on Fiji
The performance drop if the default TDP more than 256 Watt

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:23 -05:00
Rex Zhu
4ccd2d931c drm/amd/pp: Implement force_clock_level for RV
under manual dpm mode, user can set gfx/mem clock
through sysfs pp_dpm_sclk/mclk on Rv.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:22 -05:00
Junwei Zhang
267256b5d8 drm/amd/powerplay: add PME smu message for raven
Used for working around an audio bug on some platforms.

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:22 -05:00
Colin Ian King
f4c2cc4321 drm/amd/display: clean up assignment of amdgpu_crtc
The declaration of pointer amdgpu_crtc has a redundant assignment to
amdgpu_crtc. Clean this up by removing it.

Detected by CoverityScan, CID#1460299 ("Evaluation order violation")

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:21 -05:00
Colin Ian King
3d3c4f1b4d drm/amd/powerplay: fix spelling mistake: "contruct" -> "construct"
Trivial fix to spelling mistake in PP_ASSERT_WITH_CODE message text

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:21 -05:00
Rex Zhu
4aa8c41bfb drm/amd/pp: Refine the output of pp_power_profile_mode on VI
In order to keep consist with Vega,
the output format of the pp_power_profile_mode would be
<integer><mode name string>< “*” for current profile>:"detail settings"
and remove the "CURRENT" mode line.

for example:
NUM        MODE_NAME     SCLK_UP_HYST   SCLK_DOWN_HYST SCLK_ACTIVE_LEVEL     MCLK_UP_HYST   MCLK_DOWN_HYST MCLK_ACTIVE_LEVEL
  0   3D_FULL_SCREEN:        0              100               30                0              100               10
  1     POWER_SAVING:       10                0               30                -                -                -
  2            VIDEO:        -                -                -               10               16               31
  3               VR:        0               11               50                0              100               10
  4          COMPUTE:        0                5               30                -                -                -
  5         CUSTOM *:        0                5               30                0              100               10
NUM        MODE_NAME     SCLK_UP_HYST   SCLK_DOWN_HYST SCLK_ACTIVE_LEVEL     MCLK_UP_HYST   MCLK_DOWN_HYST MCLK_ACTIVE_LEVEL
  0   3D_FULL_SCREEN:        0              100               30                0              100               10
  1   POWER_SAVING *:       10                0               30                0              100               10
  2            VIDEO:        -                -                -               10               16               31
  3               VR:        0               11               50                0              100               10
  4          COMPUTE:        0                5               30                -                -                -
  5           CUSTOM:        -                -                -                -                -                -

Reviewed-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:21 -05:00
Chunming Zhou
4bebcceede drm/amdgpu: invalidate parent bo when shadow bo was invalidated
Shadow BO is located on GTT and its parent (PT and PD) BO could located on VRAM.
In some case, the BO on GTT could be evicted but the parent did not. This may
cause the shadow BO not be put in the evict list and could not be invalidate
correctly.
v2: suggested by Christian

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reported-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:20 -05:00
Chunming Zhou
3f4299bee6 drm/amdgpu: abstract bo_base init function
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:20 -05:00
Tom St Denis
7e4237dbe4 drm/amd/amdgpu: Add some documentation to the debugfs entries
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:19 -05:00
Tom St Denis
dfe8a0187c drm/amd/amdgpu: vcn10 Add callback for emit_reg_write_reg_wait
The callback .emit_reg_write_reg_wait was missing for vcn decode
which resulted in a kernel oops.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:19 -05:00
Rex Zhu
51d45cbc91 drm/amdgpu: Fix display corruption on CI with dpm enabled
with dpm enabled, need to get active crtcs in dc/no-dc mode.

caused by
'commit ebb649667a31 ("drm/amdgpu: Set pm_display_cfg in non-dc mode")'

Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:19 -05:00
Rex Zhu
fc5a136dda drm/amd/pp: Skip fan attributes if fan not present
With powerplay enabled, also need to skip fan attributes
if no fan present.

Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:18 -05:00
Andrey Grodzovsky
719a39a1e9 drm/amdgpu: Switch to interruptable wait to recover from ring hang.
v2:
Use dma_fence_wait instead of dma_fence_wait_timeout(...,MAX_SCHEDULE_TIMEOUT)
Avoid printing error message for ERESTARTSYS

Originally-by: David Panariti <David.Panariti@amd.com>
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:18 -05:00
Michel Dänzer
00862edba1 drm/ttm: Use GFP_TRANSHUGE_LIGHT for allocating huge pages
GFP_TRANSHUGE tries very hard to allocate huge pages, which can result
in long delays with high memory pressure. I have observed firefox
freezing for up to around a minute due to this while restic was taking
a full system backup.

Since we don't really need huge pages, use GFP_TRANSHUGE_LIGHT |
__GFP_NORETRY instead, in order to fail quickly when there are no huge
pages available.

Set __GFP_KSWAPD_RECLAIM as well, in order for huge pages to be freed
up in the background if necessary.

With these changes, I'm no longer seeing freezes during a restic backup.

Cc: stable@vger.kernel.org
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:17 -05:00
Shirish S
87ac8fb08b drm/amd/display: disable FBC on underlay pipe
FBC is not applicable for the underlay pipe,
hence disallow enabling and disabling of the same.

This also fixes the BUG hit of calling sleep in
atomic context.

Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:17 -05:00
Michel Dänzer
f7dbe9186d drm/amd/display: Use kvzalloc for potentially large allocations
Allocating up to 32 physically contiguous pages can easily fail (and has
failed for me), and isn't necessary anyway.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:17 -05:00
Xiaojie Yuan
f333625426 drm/amdgpu/uvd7: add emit_reg_write_reg_wait ring callback
Fix the NULL pointer dereference while running amdgpu_test:

[   54.972246] BUG: unable to handle kernel NULL pointer dereference at 0000000000000000
[   54.972265] IP:           (null)
[   54.972273] PGD 0 P4D 0
[   54.972280] Oops: 0010 [#1] SMP PTI
[   54.972288] Modules linked in: amdkfd amd_iommu_v2 amdgpu(OE) chash gpu_sched ttm drm_kms_helper drm i2c_algo_bit fb_sys_fops syscopyarea sysfillrect sysimgblt snd_hda_codec_realtek snd_hda_codec_generic snd_hda_codec_hdmi snd_hda_intel snd_hda_codec snd_hda_core snd_hwdep intel_rapl snd_pcm snd_seq_midi snd_seq_midi_event snd_rawmidi x86_pkg_temp_thermal intel_powerclamp coretemp kvm_intel snd_seq snd_seq_device kvm irqbypass snd_timer crct10dif_pclmul crc32_pclmul ghash_clmulni_intel pcbc snd soundcore joydev input_leds aesni_intel aes_x86_64 crypto_simd glue_helper cryptd idma64 virt_dma mei_me intel_lpss_pci serio_raw intel_cstate intel_rapl_perf shpchp intel_pch_thermal mei mac_hid intel_lpss acpi_pad parport_pc ppdev nfsd lp auth_rpcgss nfs_acl lockd grace sunrpc parport autofs4 hid_generic
[   54.972434]  usbhid mxm_wmi e1000e psmouse ahci hid libahci wmi pinctrl_sunrisepoint video pinctrl_intel
[   54.972457] CPU: 6 PID: 1393 Comm: uvd Tainted: G           OE    4.16.0-rc7-27fb84fda777 #1
[   54.972473] Hardware name: MSI MS-7984/Z170 KRAIT GAMING (MS-7984), BIOS B.80 05/11/2016
[   54.972489] RIP: 0010:          (null)
[   54.972497] RSP: 0018:ffffaea002c8bcc0 EFLAGS: 00010202
[   54.972508] RAX: 0000000000000000 RBX: ffff9d30d3c56f60 RCX: 00000000007c0002
[   54.972522] RDX: 000000000001a6fb RSI: 000000000001a6e9 RDI: ffff9d30d3c56f60
[   54.972536] RBP: ffffaea002c8bd10 R08: 0000000000000002 R09: ffffffffc06977d0
[   54.972550] R10: 0000000000000040 R11: 0000000000000000 R12: 0000000000000002
[   54.972564] R13: ffff9d30d3c5001c R14: ffff9d30d3c50000 R15: 0000000000000006
[   54.972579] FS:  0000000000000000(0000) GS:ffff9d30eed80000(0000) knlGS:0000000000000000
[   54.972594] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[   54.972606] CR2: 0000000000000000 CR3: 00000002dbc0a001 CR4: 00000000003606e0
[   54.972620] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
[   54.972634] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400
[   54.972648] Call Trace:
[   54.972685]  ? gmc_v9_0_emit_flush_gpu_tlb+0x111/0x140 [amdgpu]
[   54.972721]  uvd_v7_0_ring_emit_vm_flush+0x31/0x70 [amdgpu]
[   54.972751]  amdgpu_vm_flush+0x5dc/0x6c0 [amdgpu]
[   54.972787]  ? pp_dpm_powergate_uvd+0x50/0x80 [amdgpu]
[   54.972816]  amdgpu_ib_schedule+0x120/0x4e0 [amdgpu]
[   54.972850]  amdgpu_job_run+0x17b/0x1c0 [amdgpu]
[   54.972861]  drm_sched_main+0x2cc/0x490 [gpu_sched]
[   54.972873]  ? wait_woken+0x80/0x80
[   54.972882]  kthread+0x121/0x140
[   54.972891]  ? drm_sched_job_finish+0xf0/0xf0 [gpu_sched]
[   54.972902]  ? kthread_create_worker_on_cpu+0x70/0x70
[   54.972914]  ret_from_fork+0x35/0x40
[   54.972922] Code:  Bad RIP value.
[   54.972932] RIP:           (null) RSP: ffffaea002c8bcc0
[   54.972943] CR2: 0000000000000000
[   54.972951] ---[ end trace 5feb349263bbf633 ]---

Signed-off-by: Xiaojie Yuan <Xiaojie.Yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:16 -05:00
Harry Wentland
8a61bc085f drm/amd/display: Don't return ddc result and read_bytes in same return value
The two ranges overlap.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:16 -05:00
Harry Wentland
d66057830c drm/amd/display: Add get_firmware_info_v3_2 for VG12
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:15 -05:00
Jerry (Fangzhi) Zuo
3aabfcd700 drm/amd: Add BIOS smu_info v3_3 required struct def.
Signed-off-by: Jerry (Fangzhi) Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:15 -05:00
Harry Wentland
868b83511b drm/amd/display: Add VG12 ASIC IDs
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:15 -05:00
Harry Wentland
ada8ce1530 drm/amd/display: Couple formatting fixes
Things such as mis-indent, and space at beginning of line.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:14 -05:00
Harry Wentland
403dc5e8aa drm/amd/display: Use int for calculating vline start
We are not sure these calculations will never need negative numbers. Use
signed integers and warn and cap at 0 if this ever happens.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:14 -05:00
Tony Cheng
34ff937029 drm/amd/display: dal 3.1.44
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:13 -05:00
Martin Tsai
3bff0796e9 drm/amd/display: to synchronize the hubp and dpp programming in cursor control
Signed-off-by: Martin Tsai <Martin.Tsai@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:13 -05:00
Jerry (Fangzhi) Zuo
70ee2def89 drm/amd/display: Check dc_sink every time in MST hotplug
Extended fix to: "Don't read EDID in atomic_check"

Fix issue of missing dc_sink in .mode_valid in hot plug routine.

Need to check dc_sink everytime in .get_modes hook after checking
edid, since edid is not getting removed in hot unplug but dc_sink
doesn't.

Signed-off-by: Jerry (Fangzhi) Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:13 -05:00
Julian Parkin
6b62218123 drm/amd/display: reprogram infoframe during apply_ctx_to_hw
To ensure the infoframe gets updated during an SDR/HDR switch
this change adds a new function to to check if the HDR static
metadata has changed and adds it to is_timing_changed and
pipe_need_reprogram checks

Signed-off-by: Julian Parkin <jparkin@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:12 -05:00
Jerry (Fangzhi) Zuo
7ab3fdde04 drm/amd/display: Update MST edid property every time
Extended fix to: "Don't read EDID in atomic_check"

Fix display property not observed in GUI display after hot plug.

Call drm_mode_connector_update_edid_property every time in
.get_modes hook, due to the fact that edid property is getting
removed from usermode ioctl DRM_IOCTL_MODE_GETCONNECTOR each time
in hot unplug.

Signed-off-by: Jerry (Fangzhi) Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:12 -05:00
Julian Parkin
8ec06a1796 drm/amd/display: Add assert that chroma pitch is non zero
Signed-off-by: Julian Parkin <jparkin@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:12 -05:00
Dmytro Laktyushkin
34cb6b3860 drm/amd/display: compact the rq/dlg/ttu log
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:11 -05:00
Anthony Koo
7b265fd96c drm/amd/display: update dtn logging and goldens
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:11 -05:00
Anthony Koo
7c91bd434e drm/amd/display: add some DTN logs for input and output tf
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:10 -05:00
Charlene Liu
c0aceb7d63 drm/amd/display: add cursor TTU CRQ related
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:10 -05:00
Krunoslav Kovac
55a01d4023 drm/amd/display: Add user_regamma to color module
Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:10 -05:00
Tony Cheng
8a79593d77 drm/amd/display: dal 3.1.43
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:09 -05:00
Hersen Wu
50834eb488 drm/amd/display: DP link validation bug for YUV422
remove limit YUV422 color depth to 24bits which is
workaround for old ASIC

Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:09 -05:00
Eric Bernstein
3158223efd drm/amd/display: Refactor otg_blank sequence
Also rename otg_blank to blank_pixel_data.

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:08 -05:00
Eric Bernstein
8e357610ca drm/amd/display: Make program_output_csc HWSS interface function
Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:08 -05:00
Anthony Koo
388277b170 drm/amd/display: fix issue related to infopacket was not transmitted
Check in code was incorrect, and infopacket is only transmitted after update
function is called multiple times.
Purpose of the function was to check if infopackets are being enabled, and
then enable global control. Fix the code to do this.

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:08 -05:00
Harry Wentland
3d777c82bd drm/amd/display: Disallow enabling CRTC without primary plane with FB
The below commit

    "drm/atomic: Try to preserve the crtc enabled state in drm_atomic_remove_fb, v2"

introduces a slight behavioral change to rmfb. Instead of disabling a crtc
when the primary plane is disabled, it now preserves it.

Since DC is currently not equipped to handle this we need to fail such
a commit, otherwise we might see a corrupted screen.

This is based on Shirish's previous approach but avoids adding all
planes to the new atomic state which leads to a full update in DC for
any commit, and is not what we intend.

Theoretically DM should be able to deal with states with fully populated planes,
even for simple updates, such as cursor updates. This should still be
addressed in the future.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:07 -05:00
Mikita Lipski
a80aa93de1 drm/amd/display: Unify dm resume sequence into a single call
Merge amdgpu_dm_display_resume function into dm_resume,
as it is not called anywhere else anymore.

Initially the call was broken down into 2 functions for cursor corruption
issue. Now the issue is not visible, hence the dm_resume will perform
dm_display_resume in it.

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:07 -05:00
Mikita Lipski
40c21ed6b3 drm/amd/display: Fix deadlock when flushing irq
Lock irq table when reading a work in queue,
unlock to flush the work, lock again till all tasks
are cleared

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:06 -05:00
Emily Deng
6e9c2b88eb drm/amdgpu/sriov: Need to set in_gpu_reset flag to back after gpu reset
After host os reset gpu reset, need to set flag in_gpu_reset to
zero.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:06 -05:00
Emily Deng
abc342538c drm/amdgpu: For sriov reset, move IB test into exclusive mode
When put the IB test out of exclusive mode, and do sriov reset,
the IB test will randomly fail. As out of exclusive mode it uses
kiq to do read and write registers, but as it has world switch,
the kiq read and write time will be random, sometimes it will
beyond the MAX_KIQ_REG_WAIT and then the read or write register
will fail, which will result the IB test fail.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:06 -05:00
Pixel Ding
5dd3f9efd4 drm/scheduler: don't update last scheduled fence in TDR
The current sequence in scheduler thread is:
1. update last sched fence
2. job begin (adding to mirror list)
3. job finish (remove from mirror list)
4. back to 1

Since we update last sched prior to joining mirror list, the jobs
in mirror list already pass the last sched fence. TDR just run
the jobs in mirror list, so we should not update the last sched
fences in TDR.

Signed-off-by: Pixel Ding <Pixel.Ding@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:05 -05:00
Eric Huang
eda8377d16 drm/powerplay: Add powertune table for VEGAM
Add the powertune table for VEGAM.

Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:05 -05:00
Eric Huang
0c24e7ef23 drm/amd/powerplay: add specific changes for VEGAM in smu7_hwmgr.c
VEGAM specific changes for smu7:
1. add avfs control.
2. add a smc message defferent as smu7.
3. don't switch mc arb memory timing.
4. update LCAC_MC0/1_CNTL value.

Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:04 -05:00
Eric Huang
ac7822b002 drm/amd/powerplay: add smumgr support for VEGAM (v2)
The smumgr handles communication between the driver
and the SMU for power management.

v2: fix typo (Alex)

Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:04 -05:00
Eric Huang
4dc1a2d928 drm/amd/powerplay: update process pptables
Add functionality to fetch gpio table from vbios.

Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:04 -05:00
Eric Huang
4eeed17e71 drm/amd/powerplay: update ppatomctrl.c (v2)
used for calculating memory clocks in powerplay.

v2: handle endian swapping of atom data (Alex)

Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:03 -05:00
Eric Huang
ee38fbf3bf drm/amd: add a new struct in atombios.h
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:03 -05:00
Eric Huang
f4ad6fa997 drm/amd/powerplay: add smu75 header files
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:02 -05:00
Harry Wentland
48231fd516 drm/amd/display: Use HBR2 if eDP monitor it doesn't advertise link rate
Some eDP displays use the extra link rate table to advertise link rate
support. If they do that they don't need to provide link rate through
the usual registers. Since we don't currently have support for the extra
link rate table default to HBR2 for the display in this.

Note that this is a HACK. Ultimately we need to teach DC to use the
extra link rate table.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:02 -05:00
Alex Deucher
221adb2172 drm/amdgpu: Add VEGAM support to the legacy DCE 11 module
DC is preferred.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:02 -05:00
Jerry (Fangzhi) Zuo
7737de9163 drm/amd/display: Implement VEGAM device IDs in DM
Add CHIP_VEGAM

Signed-off-by: Jerry (Fangzhi) Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:01 -05:00
Jerry (Fangzhi) Zuo
0c75d5acc8 drm/amd/display: Implement VEGAM device IDs in DC
Implement device IDs for VEGAM

Signed-off-by: Jerry (Fangzhi) Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:01 -05:00
Leo Liu
e930793280 drm/amdgpu: add VEGAM pci ids
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:00 -05:00
Leo Liu
b51c5194a5 drm/amdgpu: add VEGAM support to vi
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:00 -05:00
Leo Liu
a771289786 drm/amdgpu: add VEGAM to VCE harvest config
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:44:00 -05:00
Leo Liu
f11ded5ec2 drm/amdgpu: add VEGAM VCE firmware support
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:43:59 -05:00
Leo Liu
136b10ad9b drm/amdgpu: add VEGAM UVD encode support
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:43:59 -05:00
Leo Liu
ba8f7ad0e5 drm/amdgpu: add VEGAM UVD firmware support
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:43:58 -05:00
Leo Liu
7176546958 drm/amdgpu: initialize VEGAM GFX
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:43:58 -05:00
Leo Liu
aefbbd6cc5 drm/amdgpu: add VEGAM GFX golden settings
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:43:58 -05:00
Leo Liu
62aac2010d drm/amdgpu: add VEGAM GFX firmware support
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:43:57 -05:00
Leo Liu
c3f27c08ec drm/amdgpu: add VEGAM SDMA golden settings
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:43:57 -05:00
Leo Liu
2267e26241 drm/amdgpu: add VEGAM SDMA firmware support
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:43:56 -05:00
Leo Liu
f43c72ba03 drm/amdgpu: initialize VEGAM GMC (v2)
v2: use proper register rather than hardcoding.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:43:56 -05:00
Leo Liu
13b75aac5d drm/amdgpu: add VEGAM GMC golden settings
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:43:56 -05:00
Leo Liu
589ecd753a drm/amdgpu: skip VEGAM MC firmware load
Directly loaded by VBIOS

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:43:55 -05:00
Leo Liu
675fd32b27 drm/amdgpu: add VEGAM dc support check
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:43:55 -05:00
Leo Liu
be2c8cde0b drm/amdgpu/virtual_dce: add VEGAM support
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:43:54 -05:00
Leo Liu
5830bb986d drm/amdgpu: add VEGAM SMU firmware support
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:43:54 -05:00
Leo Liu
34fd54bc08 drm/amdgpu: specify VEGAM ucode SMU load method
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:43:54 -05:00
Leo Liu
32cc7e536a drm/amdgpu: set VEGAM to ASIC family and ip blocks
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:43:53 -05:00
Leo Liu
cc07f18ddb drm/amdgpu: bypass GPU info firmware load for VEGAM
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:43:53 -05:00
Leo Liu
48ff108d9d drm/amdgpu: add VEGAM ASIC type
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:43:52 -05:00
Mathieu Malaterre
037d1a66ae drm/radeon: Change the default to PCI on PowerPC
AGP mode is unstable on PowerPC. Symptoms are generally of the form:

[ 1228.795711] radeon 0000:00:10.0: ring 0 stalled for more than 10240msec

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Mathieu Malaterre <malat@debian.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:43:52 -05:00
Rex Zhu
c5a4484941 drm/amd/pp: Add OVERDRIVE support on Vega10 (v2)
when bit14 in module parameter ppfeaturemask was set.
od feature will be enabled on Vega10 except vbios not support.

user can read od range by reading sysfs pp_od_clk_voltage,
cat pp_od_clk_voltage
OD_SCLK:
0:        852Mhz        800mV
1:        991Mhz        900mV
2:       1138Mhz        950mV
3:       1269Mhz       1000mV
4:       1348Mhz       1050mV
5:       1399Mhz       1100mV
6:       1440Mhz       1150mV
7:       1500Mhz       1200mV
OD_MCLK:
0:        167Mhz        800mV
1:        500Mhz        800mV
2:        800Mhz        950mV
3:        945Mhz       1000mV
OD_RANGE:
SCLK:     852MHz       2200MHz
MCLK:     167MHz       1500MHz
VDDC:     800mV        1200mV

and can configure the clock/voltage by writing pp_od_clk_voltage
for example:

echo "s 0 900 820">pp_od_clk_voltage to change the sclk/vddc
to 900MHz and 820 mV in dpm level0.

echo "r" to change the clk/voltage to  default value.

echo "c">pp_od_clk_voltage
to commit the change

v2: squash in warning fix (Alex)

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-15 13:43:52 -05:00