2a00f026a1
122 Commits
Author | SHA1 | Message | Date | |
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Linus Torvalds
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e7f44b65b5 |
Devicetree for 4.7:
- Rewrite of the unflattening code to avoid recursion and lessen the stack usage. - Rewrite of the phandle args parsing code to get rid of the fixed args size. This is needed for IOMMU code. - Sync to latest dtc which adds more dts style checking. These warnings are enabled with "W=1" compiles. - Tegra documentation updates related to the above warnings. - A bunch of spelling and other doc fixes. - Various vendor prefix additions. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJXP3OZAAoJEPr7XbWNvGHDEUAQAJLbR9Js7RENPGX/u0NSJNaJ yQhyNVsz/BkAWFfWT6YEfyNnDY0UcRs2N9RHb+z65TsX1jvJJxLRDLRfz+rExfiZ cA1RJaF77kPOdA0eZapJIzPvAf97Zik+nzKLsqUPUSYaIzghV5rN6aR2AjXN5AYv TMQP41NwNQkxfO5I+NOssEB8IBH+DlAzg0LYXw8wNsAJc8o+DgEQjU8cxCqR0NgE SbpbJNF8tRXEJckZRC+Q7Gyn2J7VglmM/5VTFbBBwgIly2lcLADPVuX/Z6hZE3OH K7mhNWBu61vI5lU6u7q64ePeb63j+Ut/RR0tTPgjsLg0Qg0ue+6iZ66S9ZHEicbU wT4A/hjSImvZoQGGMrtUF5HGcaoMHGLGFgFc/Ouox8OQflntQBzuEx/gOQpPXcIT vdwITNW8/OGV3rgtmRO9mbdSZiAHPsydoTkIl+Ucod3nTrlEEOwgQARYO+2CfSRj sknndj26Kf+0n0tSv2d4JAEdEozp2ZPyfiAfpPXW74jOmOxeswUb3Kxx8YMwhCEl +s96rm1vtpNmJzXtuPV3eB0TydWMQ/3NXN6XOS7qEN/5y1AbQqKEoIyJOziBQMxe c9Eh/YSjsm4uw3Q0wHOI3s4hTwWfuBmwpIsANJVKrRbftPF58bMUBYU/44ReTtA8 iMsrqJpnSCcAyS8doWRY =s+gW -----END PGP SIGNATURE----- Merge tag 'devicetree-for-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: - Rewrite of the unflattening code to avoid recursion and lessen the stack usage. - Rewrite of the phandle args parsing code to get rid of the fixed args size. This is needed for IOMMU code. - Sync to latest dtc which adds more dts style checking. These warnings are enabled with "W=1" compiles. - Tegra documentation updates related to the above warnings. - A bunch of spelling and other doc fixes. - Various vendor prefix additions. * tag 'devicetree-for-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (52 commits) devicetree: Add Creative Technology vendor id gpio: dt-bindings: add ibm,ppc4xx-gpio binding of/unittest: Remove unnecessary module.h header inclusion drivers/of: Fix build warning in populate_node() drivers/of: Fix depth when unflattening devicetree of: dynamic: changeset prop-update revert fix drivers/of: Export of_detach_node() drivers/of: Return allocated memory from of_fdt_unflatten_tree() drivers/of: Specify parent node in of_fdt_unflatten_tree() drivers/of: Rename unflatten_dt_node() drivers/of: Avoid recursively calling unflatten_dt_node() drivers/of: Split unflatten_dt_node() of: include errno.h in of_graph.h of: document refcount incrementation of of_get_cpu_node() Documentation: dt: soc: fix spelling mistakes Documentation: dt: power: fix spelling mistake Documentation: dt: pinctrl: fix spelling mistake Documentation: dt: opp: fix spelling mistake Documentation: dt: net: fix spelling mistakes Documentation: dt: mtd: fix spelling mistake ... |
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Linus Torvalds
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7afd16f882 |
PCI changes for the v4.7 merge window:
Enumeration Refine PCI support check in pcibios_init() (Adrian-Ken Rueegsegger) Provide common functions for ECAM mapping (Jayachandran C) Allow all PCIe services on non-ACPI host bridges (Jon Derrick) Remove return values from pcie_port_platform_notify() and relatives (Jon Derrick) Widen portdrv service type from 4 bits to 8 bits (Keith Busch) Add Downstream Port Containment portdrv service type (Keith Busch) Add Downstream Port Containment driver (Keith Busch) Resource management Identify Enhanced Allocation (EA) BAR Equivalent resources in sysfs (Alex Williamson) Supply CPU physical address (not bus address) to iomem_is_exclusive() (Bjorn Helgaas) alpha: Call iomem_is_exclusive() for IORESOURCE_MEM, but not IORESOURCE_IO (Bjorn Helgaas) Mark Broadwell-EP Home Agent 1 as having non-compliant BARs (Prarit Bhargava) Disable all BAR sizing for devices with non-compliant BARs (Prarit Bhargava) Move PCI I/O space management from OF to PCI core code (Tomasz Nowicki) PCI device hotplug acpiphp_ibm: Avoid uninitialized variable reference (Dan Carpenter) Use cached copy of PCI_EXP_SLTCAP_HPC bit (Lukas Wunner) Virtualization Mark Intel i40e NIC INTx masking as broken (Alex Williamson) Reverse standard ACS vs device-specific ACS enabling (Alex Williamson) Work around Intel Sunrise Point PCH incorrect ACS capability (Alex Williamson) IOMMU Add pci_add_dma_alias() to abstract implementation (Bjorn Helgaas) Move informational printk to pci_add_dma_alias() (Bjorn Helgaas) Add support for multiple DMA aliases (Jacek Lawrynowicz) Add DMA alias quirk for mic_x200_dma (Jacek Lawrynowicz) Thunderbolt Fix double free of drom buffer (Andreas Noever) Add Intel Thunderbolt device IDs (Lukas Wunner) Fix typos and magic number (Lukas Wunner) Support 1st gen Light Ridge controller (Lukas Wunner) Generic host bridge driver Use generic ECAM API (Jayachandran C) Cavium ThunderX host bridge driver Don't clobber read-only bits in bridge config registers (David Daney) Use generic ECAM API (Jayachandran C) Freescale i.MX6 host bridge driver Use enum instead of bool for variant indicator (Andrey Smirnov) Implement reset sequence for i.MX6+ (Andrey Smirnov) Factor out ref clock enable (Bjorn Helgaas) Add initial imx6sx support (Christoph Fritz) Add reset-gpio-active-high boolean property to DT (Petr Štetiar) Add DT property for link gen, default to Gen1 (Tim Harvey) dts: Specify imx6qp version of PCIe core (Andrey Smirnov) dts: Fix PCIe reset GPIO polarity on Toradex Apalis Ixora (Petr Štetiar) Marvell Armada host bridge driver add DT binding for Marvell Armada 7K/8K PCIe controller (Thomas Petazzoni) Add driver for Marvell Armada 7K/8K PCIe controller (Thomas Petazzoni) Marvell MVEBU host bridge driver Constify mvebu_pcie_pm_ops structure (Jisheng Zhang) Use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS for mvebu_pcie_pm_ops (Jisheng Zhang) Microsoft Hyper-V host bridge driver Report resources release after stopping the bus (Vitaly Kuznetsov) Add explicit barriers to config space access (Vitaly Kuznetsov) Renesas R-Car host bridge driver Select PCI_MSI_IRQ_DOMAIN (Arnd Bergmann) Synopsys DesignWare host bridge driver Remove incorrect RC memory base/limit configuration (Gabriele Paoloni) Move Root Complex setup code to dw_pcie_setup_rc() (Jisheng Zhang) TI Keystone host bridge driver Add error IRQ handler (Murali Karicheri) Remove unnecessary goto statement (Murali Karicheri) Miscellaneous Fix spelling errors (Colin Ian King) -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJXPdMKAAoJEFmIoMA60/r8ofUP/j0zyzn24f0xY1wLeGJ8geB9 6nHk1QdkPqwCiXZahEcnA5HMlFCl/ciWjjsoCqeMlvS6NXkX13KGcc1UGZszelTs 68bFhyBKqcoMn0it53vBjBXnkfA64PmlxwY/T1ADulxL8amFOCpjjBruZ8pxJ/U7 r6uHvhxUxHCRF7hMmpNN+V5XWXWCFFkPJZvxOTkglaxkbdnhZ0h0Xz9p9liUvjPH mBE72E3WUjiGogXGoLAPDclz1NI6rhRVUyTRcQ8EWaOwitV3OqMuDpAwoWH62ZZJ iorCkQk2/eKfN6OA6UgZh4loauAty0FeoZDX7ZVftQr52IpAzRUVx1oAq0J7u4ga KRX37mlK/53UcMZyv9Lz2kw4KjaLLELiInzcF+w3Bbov4UhY4/sL5uh9eNMFvSUU iZuY+GFlceL0P6wZuVKU5U8td/CyBr3f5vY/3htxuYHE1xJq4FkL92JpWRCvwpVr YdCzocscw73Yn8ZMplt8DX2fyabN7HyGezbQISrDDGY6T0ZDsRRKc6FFAt4xF+ta JJ+bcY8OcXtxGw6SXtrscL7vNXdR7Zg1HBSa8Sl/CopCdW9zs0VdwgFoxgORcWDT mphIgt57DMzaiUUaV8FRQz0mSLixnAcCEfGjVbAEEw3SP5ZChGfS3EknKb/CPRyk TD6I3pXTBhTWXd8aS113 =68Iz -----END PGP SIGNATURE----- Merge tag 'pci-v4.7-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI updates from Bjorn Helgaas: "Enumeration: - Refine PCI support check in pcibios_init() (Adrian-Ken Rueegsegger) - Provide common functions for ECAM mapping (Jayachandran C) - Allow all PCIe services on non-ACPI host bridges (Jon Derrick) - Remove return values from pcie_port_platform_notify() and relatives (Jon Derrick) - Widen portdrv service type from 4 bits to 8 bits (Keith Busch) - Add Downstream Port Containment portdrv service type (Keith Busch) - Add Downstream Port Containment driver (Keith Busch) Resource management: - Identify Enhanced Allocation (EA) BAR Equivalent resources in sysfs (Alex Williamson) - Supply CPU physical address (not bus address) to iomem_is_exclusive() (Bjorn Helgaas) - alpha: Call iomem_is_exclusive() for IORESOURCE_MEM, but not IORESOURCE_IO (Bjorn Helgaas) - Mark Broadwell-EP Home Agent 1 as having non-compliant BARs (Prarit Bhargava) - Disable all BAR sizing for devices with non-compliant BARs (Prarit Bhargava) - Move PCI I/O space management from OF to PCI core code (Tomasz Nowicki) PCI device hotplug: - acpiphp_ibm: Avoid uninitialized variable reference (Dan Carpenter) - Use cached copy of PCI_EXP_SLTCAP_HPC bit (Lukas Wunner) Virtualization: - Mark Intel i40e NIC INTx masking as broken (Alex Williamson) - Reverse standard ACS vs device-specific ACS enabling (Alex Williamson) - Work around Intel Sunrise Point PCH incorrect ACS capability (Alex Williamson) IOMMU: - Add pci_add_dma_alias() to abstract implementation (Bjorn Helgaas) - Move informational printk to pci_add_dma_alias() (Bjorn Helgaas) - Add support for multiple DMA aliases (Jacek Lawrynowicz) - Add DMA alias quirk for mic_x200_dma (Jacek Lawrynowicz) Thunderbolt: - Fix double free of drom buffer (Andreas Noever) - Add Intel Thunderbolt device IDs (Lukas Wunner) - Fix typos and magic number (Lukas Wunner) - Support 1st gen Light Ridge controller (Lukas Wunner) Generic host bridge driver: - Use generic ECAM API (Jayachandran C) Cavium ThunderX host bridge driver: - Don't clobber read-only bits in bridge config registers (David Daney) - Use generic ECAM API (Jayachandran C) Freescale i.MX6 host bridge driver: - Use enum instead of bool for variant indicator (Andrey Smirnov) - Implement reset sequence for i.MX6+ (Andrey Smirnov) - Factor out ref clock enable (Bjorn Helgaas) - Add initial imx6sx support (Christoph Fritz) - Add reset-gpio-active-high boolean property to DT (Petr Štetiar) - Add DT property for link gen, default to Gen1 (Tim Harvey) - dts: Specify imx6qp version of PCIe core (Andrey Smirnov) - dts: Fix PCIe reset GPIO polarity on Toradex Apalis Ixora (Petr Štetiar) Marvell Armada host bridge driver: - add DT binding for Marvell Armada 7K/8K PCIe controller (Thomas Petazzoni) - Add driver for Marvell Armada 7K/8K PCIe controller (Thomas Petazzoni) Marvell MVEBU host bridge driver: - Constify mvebu_pcie_pm_ops structure (Jisheng Zhang) - Use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS for mvebu_pcie_pm_ops (Jisheng Zhang) Microsoft Hyper-V host bridge driver: - Report resources release after stopping the bus (Vitaly Kuznetsov) - Add explicit barriers to config space access (Vitaly Kuznetsov) Renesas R-Car host bridge driver: - Select PCI_MSI_IRQ_DOMAIN (Arnd Bergmann) Synopsys DesignWare host bridge driver: - Remove incorrect RC memory base/limit configuration (Gabriele Paoloni) - Move Root Complex setup code to dw_pcie_setup_rc() (Jisheng Zhang) TI Keystone host bridge driver: - Add error IRQ handler (Murali Karicheri) - Remove unnecessary goto statement (Murali Karicheri) Miscellaneous: - Fix spelling errors (Colin Ian King)" * tag 'pci-v4.7-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (48 commits) PCI: Disable all BAR sizing for devices with non-compliant BARs x86/PCI: Mark Broadwell-EP Home Agent 1 as having non-compliant BARs PCI: Identify Enhanced Allocation (EA) BAR Equivalent resources in sysfs PCI, of: Move PCI I/O space management to PCI core code PCI: generic, thunder: Use generic ECAM API PCI: Provide common functions for ECAM mapping PCI: hv: Add explicit barriers to config space access PCI: Use cached copy of PCI_EXP_SLTCAP_HPC bit PCI: Add Downstream Port Containment driver PCI: Add Downstream Port Containment portdrv service type PCI: Widen portdrv service type from 4 bits to 8 bits PCI: designware: Remove incorrect RC memory base/limit configuration PCI: hv: Report resources release after stopping the bus ARM: dts: imx6qp: Specify imx6qp version of PCIe core PCI: imx6: Implement reset sequence for i.MX6+ PCI: imx6: Use enum instead of bool for variant indicator PCI: thunder: Don't clobber read-only bits in bridge config registers thunderbolt: Fix double free of drom buffer PCI: rcar: Select PCI_MSI_IRQ_DOMAIN PCI: armada: Add driver for Marvell Armada 7K/8K PCIe controller ... |
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Bjorn Helgaas
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58f8b094e9 |
Merge branches 'pci/host-armada', 'pci/host-designware', 'pci/host-hv', 'pci/host-imx6', 'pci/host-keystone', 'pci/host-mvebu', 'pci/host-rcar', 'pci/host-thunder' and 'pci/host-vmd' into next
* pci/host-armada: PCI: armada: Add driver for Marvell Armada 7K/8K PCIe controller dt-bindings: pci: add DT binding for Marvell Armada 7K/8K PCIe controller * pci/host-designware: PCI: designware: Remove incorrect RC memory base/limit configuration PCI: designware: Move Root Complex setup code to dw_pcie_setup_rc() * pci/host-hv: PCI: hv: Report resources release after stopping the bus * pci/host-imx6: ARM: dts: imx6qp: Specify imx6qp version of PCIe core PCI: imx6: Implement reset sequence for i.MX6+ PCI: imx6: Use enum instead of bool for variant indicator PCI: imx6: Add DT property for link gen, default to Gen1 PCI: imx6: Add reset-gpio-active-high boolean property to DT ARM: dts: imx6: Fix PCIe reset GPIO polarity on Toradex Apalis Ixora PCI: imx6: Add initial imx6sx support PCI: imx6: Factor out ref clock enable Revert "PCI: imx6: Add support for active-low reset GPIO" * pci/host-keystone: PCI: keystone: Remove unnecessary goto statement PCI: keystone: Add error IRQ handler * pci/host-mvebu: PCI: mvebu: Use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS for mvebu_pcie_pm_ops PCI: mvebu: Constify mvebu_pcie_pm_ops structure * pci/host-rcar: PCI: rcar: Select PCI_MSI_IRQ_DOMAIN * pci/host-thunder: PCI: thunder: Don't clobber read-only bits in bridge config registers * pci/host-vmd: PCI: Remove return values from pcie_port_platform_notify() and relatives PCI/ACPI: Allow all PCIe services on non-ACPI host bridges |
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Andrey Smirnov
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4d31c6109a |
PCI: imx6: Implement reset sequence for i.MX6+
I.MX6+ has a dedicated bit for resetting PCIe core, which should be used instead of a regular reset sequence since using the latter will hang the SoC. This commit is based on c34068d48273e24d392d9a49a38be807954420ed from http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git Tested-by: Gary Bisson <gary.bisson@boundarydevices.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
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Thierry Reding
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13541cc3d4 |
dt-bindings: pci: tegra: Update for per-lane PHYs
The XUSB pad controller allows PCIe lanes to be controlled individually, providing fine-grained control over their power state. Previous attempts at describing the XUSB pad controller in DT had erroneously assumed that all PCIe lanes were driven by the same PHY, and hence the PCI host controller would reference only a single PHY. Moving to a representation of per-lane PHYs requires that the operating system driver for the PCI host controller have access to the set of PHY devices that make up the connection of each root port in order to power up and down all of the lanes as necessary. Acked-by: Rob Herring <robh@kernel.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Thomas Petazzoni
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80014ad5d5 |
dt-bindings: pci: add DT binding for Marvell Armada 7K/8K PCIe controller
This commit adds the Device Tree binding documentation that allows to describe the PCIe controller found in Marvell Armada 7K/8K SoCs. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Rob Herring <rob@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> |
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Geert Uytterhoeven
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332bea1a26 |
PCI: hisi: DT spelling s/interrupts-*/interrupt-*/
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Rob Herring <robh@kernel.org> |
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Tim Harvey
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a5fcec480f |
PCI: imx6: Add DT property for link gen, default to Gen1
Freescale has stated [1] that the LVDS clock source of the IMX6 does not pass the PCI Gen2 clock jitter test, therefore unless an external Gen2 compliant external clock source is present and supplied back to the IMX6 PCIe core via LVDS CLK1/CLK2 you can not claim Gen2 compliance. Add a DT property to specify Gen1 vs Gen2 and check this before allowing a Gen2 link. We default to Gen1 if the property is not present because at this time there are no IMX6 boards in mainline that 'input' a clock on LVDS CLK1/CLK2. In order to be Gen2 compliant on IMX6 you need to: - Have a Gen2 compliant external clock generator and route that clock back to either LVDS CLK1 or LVDS CLK2 as an input (see IMX6SX-SabreSD reference design). - Specify this clock in the PCIe node in the DT (i.e., IMX6QDL_CLK_LVDS1_IN or IMX6QDL_CLK_LVDS2_IN instead of IMX6QDL_CLK_LVDS1_GATE which configures it as a CLK output). [1] https://community.freescale.com/message/453209 Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> CC: Fabio Estevam <fabio.estevam@freescale.com> CC: Zhu Richard <Richard.Zhu@freescale.com> CC: Akshay Bhat <akshay.bhat@timesys.com> CC: Rob Herring <robh+dt@kernel.org> CC: Shawn Guo <shawnguo@kernel.org> |
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Petr Štetiar
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3ea8529acc |
PCI: imx6: Add reset-gpio-active-high boolean property to DT
Currently the reset-gpio DT property which controls the PCI bus device reset signal defaults to active-low reset sequence (L=reset state, H=operation state) plus the code in reset function isn't GPIO polarity aware - it doesn't matter if the defined reset-gpio is active-low or active-high, it will always result into active-low reset sequence. I've tried to fix it properly and change the reset-gpio reset sequence to be polarity-aware, but this patch has been accepted and then reverted as it has introduced few backward incompatible issues: 1. Some DTBs, for example, imx6qdl-sabresd, don't define reset-gpio polarity correctly: reset-gpio = <&gpio7 12 0>; which means that it's defined as active-high, but in reality it's active-low; thus it wouldn't work without a DTS fix. 2. The logic in the reset function is inverted: gpio_set_value_cansleep(imx6_pcie->reset_gpio, 0) msleep(100); gpio_set_value_cansleep(imx6_pcie->reset_gpio, 1); so even if some of the i.MX6 boards had reset-gpio polarity defined correctly in their DTSes, they would stop working. As we can't break old DTBs, we can't fix them, so we need to introduce this new DT reset-gpio-active-high boolean property so we can support boards with active-high reset sequence. This active-high reset sequence is for example needed on Apalis SoMs, where GPIO1_IO28, used to PCIe reset is not connected directly to PERST# PCIe signal, but it's ORed with RESETBMCU coming off the PMIC, and thus is inverted, active-high. Tested-by: Tim Harvey <tharvey@gateworks.com> # Gateworks Ventana boards (which have active-low PERST#) Signed-off-by: Petr Štetiar <ynezz@true.cz> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org> |
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Christoph Fritz
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e3c06cd063 |
PCI: imx6: Add initial imx6sx support
Add initial PCIe support for the imx6 SoC derivate imx6sx. PCI MSI support is untested as the necessary suspend/resume quirk is not included in this patch. This patch is heavily based on patches by Richard Zhu. [bhelgaas: factor out refclk enable, fix adjacent typos in imx6q-pcie.txt] Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com> Acked-by: Richard Zhu <Richard.Zhu@freescale.com> Acked-by: Lucas Stach <l.stach@pengutronix.de> |
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Stephen Boyd
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ea9b269fa5 |
devicetree: bindings: designware-pcie: Fix unit address
Remove the 0x in the unit address because it shouldn't be there. Cc: Joao Pinto <jpinto@synopsys.com> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Rob Herring <robh@kernel.org> |
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Murali Karicheri
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025dd3daed |
PCI: keystone: Add error IRQ handler
Keystone PCI hardware generates error interrupts at RC using a platform IRQ instead of a standard MSI or legacy IRQ. Add a simple error handler that logs the fatal interrupt status to the console. [bhelgaas: s/node/dev->of_node/, tidy comments, return irqreturn_t directly] Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rob Herring <robh@kernel.org> CC: Pawel Moll <pawel.moll@arm.com> CC: Mark Rutland <mark.rutland@arm.com> CC: Ian Campbell <ijc+devicetree@hellion.org.uk> CC: Kumar Gala <galak@codeaurora.org> |
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Linus Torvalds
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5a6b7e53d0 |
ARM: DT updates for v4.6
These are all the updates to device tree files for 32-bit platforms, plus a couple of related 64-bit updates: New SoC support: - Allwinner A83T - Axis Artpec-6 SoC - Mediatek MT7623 SoC - TI Keystone K2G SoC - ST Microelectronics stm32f469 New board or machine support: - ARM Juno R2 - Buffalo Linkstation LS-QVL and LS-GL - Cubietruck plus - D-Link DIR-885L - DT support for ARM RealView PB1176 and PB11MPCore - Google Nexus 7 - Homlet v2 - Itead Ibox - Lamobo R1 - LG Optimus Black - Logicpd dm3730 - Raspberry Pi Model A Other changes include - Lots of updates for Qualcomm APQ8064, MSM8974 and others - Improved support for Nokia N900 and other OMAP machines - Common clk support for lpc32xx - HDLCD display on ARM - Improved stm32f429 support - Improved Renesas device support, r8a779x and others - Lots of Rockchip updates - Samsung cleanups - ADC support for Atmel SAMA5D2 - BCM2835 (Raspberry Pi) improvements - Broadcom Northstar Plus enhancements - OMAP GPMC rework - Several improvements for Atmel SAMA5D2 / Xplained - Global change to remove inofficial "arm,amba-bus" compatible string -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIVAwUAVu67PmCrR//JCVInAQIZlA//UV7DK8tHNvLCuHBX8MnW5xxljUWFCoFp Zsi9LJj+KDIE+rpY65n75+il+rT1ZcgaITzH+Qvaq75f51ZwW7HY5jHiPYsINa80 oMtbdWlnpNIH48jD5yMKaDTE8md7lZ8tgA//6aw1doDx2LYX4D1QRG6XI1OC6E62 OjlzXkTTe50Aowi6aMQz4PZQM89m09FT0aw/Qsokh0fcW8oXhXcJSlFgLF/tZUYs VU4oWshUX2/VW3ShXlAJdrItpdDIogwZtDS7xKXmk6AHfapLb7s4HuEOInqbeOa7 QWTjtoVj6ZHyeVptyn6kj5+xOdL4bXAT4Kg2TctF1iv0I6XG8CKflNqOJt2wLR1M DP0VQXK0TmKCeI+vbRhniLRP7EPYp4N9KFAe6M6aVP3nKYX81EqWdtPjuwp7GxAC sIGad2ocynKW4Eb4xOD2/5EwzkhwHv7SPQTCyCyQo8ILGN5MOSBZJOC1kXATTtbq u7LbOLyFMeWPJFYZyPxe79MwiX0dfJekrZYQ1tYL3MEQqQNmbY6+r+6QLMhT+iSj SE1oBaAReOuZUquiBEt398OvdfQ/n+F5BasKKCojXuhueNO3+rY7mT5X/vmOs2eh CUpfl766CixaZmF6p8es1Qeu64ASODbPiOw3Dv5Cgwcbfy/C3b3ccty0zazlOaNJ Sm6VXU3RavA= =RLUc -----END PGP SIGNATURE----- Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM DT updates from Arnd Bergmann: "These are all the updates to device tree files for 32-bit platforms, plus a couple of related 64-bit updates: New SoC support: - Allwinner A83T - Axis Artpec-6 SoC - Mediatek MT7623 SoC - TI Keystone K2G SoC - ST Microelectronics stm32f469 New board or machine support: - ARM Juno R2 - Buffalo Linkstation LS-QVL and LS-GL - Cubietruck plus - D-Link DIR-885L - DT support for ARM RealView PB1176 and PB11MPCore - Google Nexus 7 - Homlet v2 - Itead Ibox - Lamobo R1 - LG Optimus Black - Logicpd dm3730 - Raspberry Pi Model A Other changes include - Lots of updates for Qualcomm APQ8064, MSM8974 and others - Improved support for Nokia N900 and other OMAP machines - Common clk support for lpc32xx - HDLCD display on ARM - Improved stm32f429 support - Improved Renesas device support, r8a779x and others - Lots of Rockchip updates - Samsung cleanups - ADC support for Atmel SAMA5D2 - BCM2835 (Raspberry Pi) improvements - Broadcom Northstar Plus enhancements - OMAP GPMC rework - Several improvements for Atmel SAMA5D2 / Xplained - Global change to remove inofficial "arm,amba-bus" compatible string" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (350 commits) ARM, ARM64: dts: drop "arm,amba-bus" in favor of "simple-bus" ARM: dts: artpec: dual-license on artpec6.dtsi ARM: dts: ux500: add synaptics RMI4 for Ux500 TVK DT arm64: dts: juno/vexpress: fix node name unit-address presence warnings arm64: dts: foundation-v8: add SBSA Generic Watchdog device node ARM: dts: at91: sama5d2 Xplained: add leds node ARM: dts: at91: sama5d2 Xplained: add user push button ARM: dts: at91: sama5d2 Xplained: set pin muxing for usb gadget and usb host ARM: dts: stm32f429: Enable Ethernet on Eval board ARM: dts: omap3-sniper: TWL4030 keypad support Revert "ARM: dts: DRA7: Add dt nodes for PWMSS" ARM: dts: dm814x: dra62x: Disable wait pin monitoring for NAND ARM: dts: dm814x: dra62x: Fix NAND device nodes ARM: dts: stm32f429: Add Ethernet support ARM: dts: stm32f429: Add system config bank node ARM: dts: at91: sama5d2: add nand0 and nfc0 nodes ARM: dts: at91: sama5d2: add dma properties to UART nodes ARM: dts: at91: sama5d2 Xplained: Correct the macb irq pinctrl node ARM: dts: exynos: Don't overheat the Odroid XU3-Lite on high load ARM: dts: exynos: Add cooling levels for Exynos5422/5800 CPUs ... |
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Linus Torvalds
|
63e30271b0 |
PCI changes for the v4.6 merge window:
Enumeration Disable IO/MEM decoding for devices with non-compliant BARs (Bjorn Helgaas) Mark Broadwell-EP Home Agent & PCU as having non-compliant BARs (Bjorn Helgaas Resource management Mark shadow copy of VGA ROM as IORESOURCE_PCI_FIXED (Bjorn Helgaas) Don't assign or reassign immutable resources (Bjorn Helgaas) Don't enable/disable ROM BAR if we're using a RAM shadow copy (Bjorn Helgaas) Set ROM shadow location in arch code, not in PCI core (Bjorn Helgaas) Remove arch-specific IORESOURCE_ROM_SHADOW size from sysfs (Bjorn Helgaas) ia64: Use ioremap() instead of open-coded equivalent (Bjorn Helgaas) ia64: Keep CPU physical (not virtual) addresses in shadow ROM resource (Bjorn Helgaas) MIPS: Keep CPU physical (not virtual) addresses in shadow ROM resource (Bjorn Helgaas) Remove unused IORESOURCE_ROM_COPY and IORESOURCE_ROM_BIOS_COPY (Bjorn Helgaas) Don't leak memory if sysfs_create_bin_file() fails (Bjorn Helgaas) rcar: Remove PCI_PROBE_ONLY handling (Lorenzo Pieralisi) designware: Remove PCI_PROBE_ONLY handling (Lorenzo Pieralisi) Virtualization Wait for up to 1000ms after FLR reset (Alex Williamson) Support SR-IOV on any function type (Kelly Zytaruk) Add ACS quirk for all Cavium devices (Manish Jaggi) AER Rename pci_ops_aer to aer_inj_pci_ops (Bjorn Helgaas) Restore pci_ops pointer while calling original pci_ops (David Daney) Fix aer_inject error codes (Jean Delvare) Use dev_warn() in aer_inject (Jean Delvare) Log actual error causes in aer_inject (Jean Delvare) Log aer_inject error injections (Jean Delvare) VPD Prevent VPD access for buggy devices (Babu Moger) Move pci_read_vpd() and pci_write_vpd() close to other VPD code (Bjorn Helgaas) Move pci_vpd_release() from header file to pci/access.c (Bjorn Helgaas) Remove struct pci_vpd_ops.release function pointer (Bjorn Helgaas) Rename VPD symbols to remove unnecessary "pci22" (Bjorn Helgaas) Fold struct pci_vpd_pci22 into struct pci_vpd (Bjorn Helgaas) Sleep rather than busy-wait for VPD access completion (Bjorn Helgaas) Update VPD definitions (Hannes Reinecke) Allow access to VPD attributes with size 0 (Hannes Reinecke) Determine actual VPD size on first access (Hannes Reinecke) Generic host bridge driver Move structure definitions to separate header file (David Daney) Add pci_host_common_probe(), based on gen_pci_probe() (David Daney) Expose pci_host_common_probe() for use by other drivers (David Daney) Altera host bridge driver Fix altera_pcie_link_is_up() (Ley Foon Tan) Cavium ThunderX host bridge driver Add PCIe host driver for ThunderX processors (David Daney) Add driver for ThunderX-pass{1,2} on-chip devices (David Daney) Freescale i.MX6 host bridge driver Add DT bindings to configure PHY Tx driver settings (Justin Waters) Move imx6_pcie_reset_phy() near other PHY handling functions (Lucas Stach) Move PHY reset into imx6_pcie_establish_link() (Lucas Stach) Remove broken Gen2 workaround (Lucas Stach) Move link up check into imx6_pcie_wait_for_link() (Lucas Stach) Freescale Layerscape host bridge driver Add "fsl,ls2085a-pcie" compatible ID (Yang Shi) Intel VMD host bridge driver Attach VMD resources to parent domain's resource tree (Jon Derrick) Set bus resource start to 0 (Keith Busch) Microsoft Hyper-V host bridge driver Add fwnode_handle to x86 pci_sysdata (Jake Oshins) Look up IRQ domain by fwnode_handle (Jake Oshins) Add paravirtual PCI front-end for Microsoft Hyper-V VMs (Jake Oshins) NVIDIA Tegra host bridge driver Add pci_ops.{add,remove}_bus() callbacks (Thierry Reding) Implement ->{add,remove}_bus() callbacks (Thierry Reding) Remove unused struct tegra_pcie.num_ports field (Thierry Reding) Track bus -> CPU mapping (Thierry Reding) Remove misleading PHYS_OFFSET (Thierry Reding) Renesas R-Car host bridge driver Depend on ARCH_RENESAS, not ARCH_SHMOBILE (Simon Horman) Synopsys DesignWare host bridge driver ARC: Add PCI support (Joao Pinto) Add generic dw_pcie_wait_for_link() (Joao Pinto) Add default link up check if sub-driver doesn't override (Joao Pinto) Add driver for prototyping kits based on ARC SDP (Joao Pinto) TI Keystone host bridge driver Defer probing if devm_phy_get() returns -EPROBE_DEFER (Shawn Lin) Xilinx AXI host bridge driver Use of_pci_get_host_bridge_resources() to parse DT (Bharat Kumar Gogada) Remove dependency on ARM-specific struct hw_pci (Bharat Kumar Gogada) Don't call pci_fixup_irqs() on Microblaze (Bharat Kumar Gogada) Update Zynq binding with Microblaze node (Bharat Kumar Gogada) microblaze: Support generic Xilinx AXI PCIe Host Bridge IP driver (Bharat Kumar Gogada) Xilinx NWL host bridge driver Add support for Xilinx NWL PCIe Host Controller (Bharat Kumar Gogada) Miscellaneous Check device_attach() return value always (Bjorn Helgaas) Move pci_set_flags() from asm-generic/pci-bridge.h to linux/pci.h (Bjorn Helgaas) Remove includes of empty asm-generic/pci-bridge.h (Bjorn Helgaas) ARM64: Remove generated include of asm-generic/pci-bridge.h (Bjorn Helgaas) Remove empty asm-generic/pci-bridge.h (Bjorn Helgaas) Remove includes of asm/pci-bridge.h (Bjorn Helgaas) Consolidate PCI DMA constants and interfaces in linux/pci-dma-compat.h (Bjorn Helgaas) unicore32: Remove unused HAVE_ARCH_PCI_SET_DMA_MASK definition (Bjorn Helgaas) Cleanup pci/pcie/Kconfig whitespace (Andreas Ziegler) Include pci/hotplug Kconfig directly from pci/Kconfig (Bjorn Helgaas) Include pci/pcie/Kconfig directly from pci/Kconfig (Bogicevic Sasa) frv: Remove stray pci_{alloc,free}_consistent() declaration (Christoph Hellwig) Move pci_dma_* helpers to common code (Christoph Hellwig) Add PCI_CLASS_SERIAL_USB_DEVICE definition (Heikki Krogerus) Add QEMU top-level IDs for (sub)vendor & device (Robin H. Johnson) Fix broken URL for Dell biosdevname (Naga Venkata Sai Indubhaskar Jupudi) -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJW6XgMAAoJEFmIoMA60/r8Yq4P/1nNwwZPikU+9Z8k0HyGPll6 vqXBOYj/wlbAxJTzH2weaoyUamFrwvsKaO3Vap3xHkAeTFPD/Dp0TipCCNMrZ82Z j1y83JJpenkRyX6ifLARCNYpOtvnvgzSrO9x7Sb2Xfqb64dPb7+jGAfOpGNzhKsO n1nj/L7RGx8Q6fNFGf8ANMXKTsdkdL+1pdwegjUXmD5WdOT+oW8DmqVbhyfSKwl0 E8r4Ml2lIg7Qd5Wu5iKMIBsR0+5HEyrwV7ch92wXChwKfoRwG70qnn7FGdc0y5ZB XvJuj8UD5UeMxEUeoRa9SwU6wWQT3Q9e6BzMS+P+43z36SPYjMfy/Xffv054z/bY rQomLjuGxNLESpmfNK5JfKxWoe2YNXjHQIDWMrAHyNlwdKJbYiwPcxnZJhvOa/eB p0QYcGS7O43STjibG9PZhzeq8tuSJRshxi0W6iB9QlqO8qs8nJQxIO+sZj/vl4yz lSnswWcV9062KITl8Fe9xDw244/RTz1xSVCdldlSoDhJyeMOjRvzS8raUMyyVmbA YULsI3l2iCl+fwDm/T21o7hJG966oYdAmgEv7lc7BWfgEAMg//LZXvMzVvrPFB2D R77u/0idtOciVJrmnO/x9DnQO2hzro9SLmVH6m0+0YU4wSSpZfGn98PCrtkatOAU c8zT9dJgyJVE3Z7cnPJ4 =otsF -----END PGP SIGNATURE----- Merge tag 'pci-v4.6-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI updates from Bjorn Helgaas: "PCI changes for v4.6: Enumeration: - Disable IO/MEM decoding for devices with non-compliant BARs (Bjorn Helgaas) - Mark Broadwell-EP Home Agent & PCU as having non-compliant BARs (Bjorn Helgaas Resource management: - Mark shadow copy of VGA ROM as IORESOURCE_PCI_FIXED (Bjorn Helgaas) - Don't assign or reassign immutable resources (Bjorn Helgaas) - Don't enable/disable ROM BAR if we're using a RAM shadow copy (Bjorn Helgaas) - Set ROM shadow location in arch code, not in PCI core (Bjorn Helgaas) - Remove arch-specific IORESOURCE_ROM_SHADOW size from sysfs (Bjorn Helgaas) - ia64: Use ioremap() instead of open-coded equivalent (Bjorn Helgaas) - ia64: Keep CPU physical (not virtual) addresses in shadow ROM resource (Bjorn Helgaas) - MIPS: Keep CPU physical (not virtual) addresses in shadow ROM resource (Bjorn Helgaas) - Remove unused IORESOURCE_ROM_COPY and IORESOURCE_ROM_BIOS_COPY (Bjorn Helgaas) - Don't leak memory if sysfs_create_bin_file() fails (Bjorn Helgaas) - rcar: Remove PCI_PROBE_ONLY handling (Lorenzo Pieralisi) - designware: Remove PCI_PROBE_ONLY handling (Lorenzo Pieralisi) Virtualization: - Wait for up to 1000ms after FLR reset (Alex Williamson) - Support SR-IOV on any function type (Kelly Zytaruk) - Add ACS quirk for all Cavium devices (Manish Jaggi) AER: - Rename pci_ops_aer to aer_inj_pci_ops (Bjorn Helgaas) - Restore pci_ops pointer while calling original pci_ops (David Daney) - Fix aer_inject error codes (Jean Delvare) - Use dev_warn() in aer_inject (Jean Delvare) - Log actual error causes in aer_inject (Jean Delvare) - Log aer_inject error injections (Jean Delvare) VPD: - Prevent VPD access for buggy devices (Babu Moger) - Move pci_read_vpd() and pci_write_vpd() close to other VPD code (Bjorn Helgaas) - Move pci_vpd_release() from header file to pci/access.c (Bjorn Helgaas) - Remove struct pci_vpd_ops.release function pointer (Bjorn Helgaas) - Rename VPD symbols to remove unnecessary "pci22" (Bjorn Helgaas) - Fold struct pci_vpd_pci22 into struct pci_vpd (Bjorn Helgaas) - Sleep rather than busy-wait for VPD access completion (Bjorn Helgaas) - Update VPD definitions (Hannes Reinecke) - Allow access to VPD attributes with size 0 (Hannes Reinecke) - Determine actual VPD size on first access (Hannes Reinecke) Generic host bridge driver: - Move structure definitions to separate header file (David Daney) - Add pci_host_common_probe(), based on gen_pci_probe() (David Daney) - Expose pci_host_common_probe() for use by other drivers (David Daney) Altera host bridge driver: - Fix altera_pcie_link_is_up() (Ley Foon Tan) Cavium ThunderX host bridge driver: - Add PCIe host driver for ThunderX processors (David Daney) - Add driver for ThunderX-pass{1,2} on-chip devices (David Daney) Freescale i.MX6 host bridge driver: - Add DT bindings to configure PHY Tx driver settings (Justin Waters) - Move imx6_pcie_reset_phy() near other PHY handling functions (Lucas Stach) - Move PHY reset into imx6_pcie_establish_link() (Lucas Stach) - Remove broken Gen2 workaround (Lucas Stach) - Move link up check into imx6_pcie_wait_for_link() (Lucas Stach) Freescale Layerscape host bridge driver: - Add "fsl,ls2085a-pcie" compatible ID (Yang Shi) Intel VMD host bridge driver: - Attach VMD resources to parent domain's resource tree (Jon Derrick) - Set bus resource start to 0 (Keith Busch) Microsoft Hyper-V host bridge driver: - Add fwnode_handle to x86 pci_sysdata (Jake Oshins) - Look up IRQ domain by fwnode_handle (Jake Oshins) - Add paravirtual PCI front-end for Microsoft Hyper-V VMs (Jake Oshins) NVIDIA Tegra host bridge driver: - Add pci_ops.{add,remove}_bus() callbacks (Thierry Reding) - Implement ->{add,remove}_bus() callbacks (Thierry Reding) - Remove unused struct tegra_pcie.num_ports field (Thierry Reding) - Track bus -> CPU mapping (Thierry Reding) - Remove misleading PHYS_OFFSET (Thierry Reding) Renesas R-Car host bridge driver: - Depend on ARCH_RENESAS, not ARCH_SHMOBILE (Simon Horman) Synopsys DesignWare host bridge driver: - ARC: Add PCI support (Joao Pinto) - Add generic dw_pcie_wait_for_link() (Joao Pinto) - Add default link up check if sub-driver doesn't override (Joao Pinto) - Add driver for prototyping kits based on ARC SDP (Joao Pinto) TI Keystone host bridge driver: - Defer probing if devm_phy_get() returns -EPROBE_DEFER (Shawn Lin) Xilinx AXI host bridge driver: - Use of_pci_get_host_bridge_resources() to parse DT (Bharat Kumar Gogada) - Remove dependency on ARM-specific struct hw_pci (Bharat Kumar Gogada) - Don't call pci_fixup_irqs() on Microblaze (Bharat Kumar Gogada) - Update Zynq binding with Microblaze node (Bharat Kumar Gogada) - microblaze: Support generic Xilinx AXI PCIe Host Bridge IP driver (Bharat Kumar Gogada) Xilinx NWL host bridge driver: - Add support for Xilinx NWL PCIe Host Controller (Bharat Kumar Gogada) Miscellaneous: - Check device_attach() return value always (Bjorn Helgaas) - Move pci_set_flags() from asm-generic/pci-bridge.h to linux/pci.h (Bjorn Helgaas) - Remove includes of empty asm-generic/pci-bridge.h (Bjorn Helgaas) - ARM64: Remove generated include of asm-generic/pci-bridge.h (Bjorn Helgaas) - Remove empty asm-generic/pci-bridge.h (Bjorn Helgaas) - Remove includes of asm/pci-bridge.h (Bjorn Helgaas) - Consolidate PCI DMA constants and interfaces in linux/pci-dma-compat.h (Bjorn Helgaas) - unicore32: Remove unused HAVE_ARCH_PCI_SET_DMA_MASK definition (Bjorn Helgaas) - Cleanup pci/pcie/Kconfig whitespace (Andreas Ziegler) - Include pci/hotplug Kconfig directly from pci/Kconfig (Bjorn Helgaas) - Include pci/pcie/Kconfig directly from pci/Kconfig (Bogicevic Sasa) - frv: Remove stray pci_{alloc,free}_consistent() declaration (Christoph Hellwig) - Move pci_dma_* helpers to common code (Christoph Hellwig) - Add PCI_CLASS_SERIAL_USB_DEVICE definition (Heikki Krogerus) - Add QEMU top-level IDs for (sub)vendor & device (Robin H. Johnson) - Fix broken URL for Dell biosdevname (Naga Venkata Sai Indubhaskar Jupudi)" * tag 'pci-v4.6-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (94 commits) PCI: Add PCI_CLASS_SERIAL_USB_DEVICE definition PCI: designware: Add driver for prototyping kits based on ARC SDP PCI: designware: Add default link up check if sub-driver doesn't override PCI: designware: Add generic dw_pcie_wait_for_link() PCI: Cleanup pci/pcie/Kconfig whitespace PCI: Simplify pci_create_attr() control flow PCI: Don't leak memory if sysfs_create_bin_file() fails PCI: Simplify sysfs ROM cleanup PCI: Remove unused IORESOURCE_ROM_COPY and IORESOURCE_ROM_BIOS_COPY MIPS: Loongson 3: Keep CPU physical (not virtual) addresses in shadow ROM resource MIPS: Loongson 3: Use temporary struct resource * to avoid repetition ia64/PCI: Keep CPU physical (not virtual) addresses in shadow ROM resource ia64/PCI: Use ioremap() instead of open-coded equivalent ia64/PCI: Use temporary struct resource * to avoid repetition PCI: Clean up pci_map_rom() whitespace PCI: Remove arch-specific IORESOURCE_ROM_SHADOW size from sysfs PCI: thunder: Add driver for ThunderX-pass{1,2} on-chip devices PCI: thunder: Add PCIe host driver for ThunderX processors PCI: generic: Expose pci_host_common_probe() for use by other drivers PCI: generic: Add pci_host_common_probe(), based on gen_pci_probe() ... |
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Bjorn Helgaas
|
562df5c852 |
Merge branch 'pci/host-designware' into next
* pci/host-designware: PCI: designware: Add driver for prototyping kits based on ARC SDP PCI: designware: Add default link up check if sub-driver doesn't override PCI: designware: Add generic dw_pcie_wait_for_link() ARC: Add PCI support |
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Bjorn Helgaas
|
c334f9c89e |
Merge branches 'pci/host-altera', 'pci/host-imx6', 'pci/host-keystone', 'pci/host-rcar', 'pci/host-tegra', 'pci/host-thunder', 'pci/host-vmd', 'pci/host-xilinx' and 'pci/host-xilinx-nwl' into next
* pci/host-altera: PCI: altera: Fix altera_pcie_link_is_up() * pci/host-imx6: PCI: imx6: Add DT bindings to configure PHY Tx driver settings * pci/host-keystone: PCI: keystone: Defer probing if devm_phy_get() returns -EPROBE_DEFER * pci/host-rcar: PCI: rcar: Depend on ARCH_RENESAS, not ARCH_SHMOBILE * pci/host-tegra: PCI: tegra: Remove misleading PHYS_OFFSET PCI: tegra: Track bus -> CPU mapping PCI: tegra: Remove unused struct tegra_pcie.num_ports field PCI: tegra: Implement ->{add,remove}_bus() callbacks PCI: Add pci_ops.{add,remove}_bus() callbacks * pci/host-thunder: PCI: thunder: Add driver for ThunderX-pass{1,2} on-chip devices PCI: thunder: Add PCIe host driver for ThunderX processors PCI: generic: Expose pci_host_common_probe() for use by other drivers PCI: generic: Add pci_host_common_probe(), based on gen_pci_probe() PCI: generic: Move structure definitions to separate header file * pci/host-vmd: x86/PCI: VMD: Attach VMD resources to parent domain's resource tree x86/PCI: VMD: Set bus resource start to 0 x86/PCI: VMD: Document code for maintainability * pci/host-xilinx: microblaze/PCI: Support generic Xilinx AXI PCIe Host Bridge IP driver PCI: xilinx: Update Zynq binding with Microblaze node PCI: xilinx: Don't call pci_fixup_irqs() on Microblaze PCI: xilinx: Remove dependency on ARM-specific struct hw_pci PCI: xilinx: Use of_pci_get_host_bridge_resources() to parse DT * pci/host-xilinx-nwl: PCI: xilinx-nwl: Add support for Xilinx NWL PCIe Host Controller |
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Joao Pinto
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5a3aa2a8fa |
PCI: designware: Add driver for prototyping kits based on ARC SDP
Add a reference platform driver for PCI RC IP Protoyping Kits based on the ARC SDP. [bhelgaas: changelog, split patch up, MAINTAINERS update] Signed-off-by: Joao Pinto <jpinto@synopsys.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Pratyush Anand <pratyush.anand@gmail.com> |
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David Daney
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7b6e7ba8e8 |
PCI: thunder: Add driver for ThunderX-pass{1,2} on-chip devices
The cavium,pci-thunder-ecam devices are exactly ECAM-based PCI root complexes. These root complexes (loosely referred to as ECAM units in the hardware manuals) are used to access the Thunder on-chip devices. They are special in that all the BARs on devices behind these root complexes are at fixed addresses. Add a driver for these devices that synthesizes Enhanced Allocation (EA) capability entries for each BAR. Since this EA synthesis is needed for exactly two chip models, we can hard- code some assumptions about the device topology and the layout of the config space of specific DEVFNs in the driver. [bhelgaas: changelog, whitespace] Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rob Herring <robh@kernel.org> |
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David Daney
|
f12b76e56a |
PCI: thunder: Add PCIe host driver for ThunderX processors
The root complexes used to access off-chip PCIe devices (called PEM units in the hardware manuals) on some Cavium ThunderX processors require quirky access methods for the config space of the PCIe bridge. Add a driver to provide these config space accessor functions. Use the pci-host-common code to configure the PCI machinery. Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Arnd Bergmann <arnd@arndb.de> |
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Bharat Kumar Gogada
|
ab597d35ef |
PCI: xilinx-nwl: Add support for Xilinx NWL PCIe Host Controller
Add PCIe Root Port driver for Xilinx PCIe NWL bridge IP. [bhelgaas: wait for link like dw_pcie_wait_for_link(), simplify bitmap error path, typos, whitespace, fold in Dan Carpenter's PTR_ERR() fix] Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Rob Herring <robh@kernel.org> |
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Bharat Kumar Gogada
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e5d4b2006c |
PCI: xilinx: Update Zynq binding with Microblaze node
Update Zynq PCI binding documentation with Microblaze node. [bhelgaas: fix "microbalze_0_intc" typo] Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Michal Simek <michal.simek@xilinx.com> |
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Justin Waters
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28e3abe591 |
PCI: imx6: Add DT bindings to configure PHY Tx driver settings
The settings in GPR8 are dependent upon the particular layout of the hardware platform. As such, they should be configurable via the device tree. Look up PHY Tx driver settings from the device tree. Fall back to the original hard-coded values if they are not specified in the device tree. Signed-off-by: Justin Waters <justin.waters@timesys.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Lucas Stach <l.stach@pengutronix.de> |
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Minghuan Lian
|
f21a3c7d57 |
dts/ls2080a: Update PCIe compatible
The patch adds LS2085a to PCIe compatible to fix the compatibility issue when using firmware with LS2085a compatible property. Signed-off-by: Minghuan Lian <minghuan.lian@nxp.com> Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Olof Johansson <olof@lixom.net> |
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Simon Horman
|
0cf1337e0b |
PCI: rcar: Add device tree support for r8a7793
Add "renesas,pcie-r8a7793" as a compatibility string for "renesas,pcie-rcar-gen2". This doesn't change the driver, so it does nothing by itself. But it does mean that checkpatch won't complain about a future patch that adds "renesas,pci-r8a7793" to a DT, which helps ensure that shipped DTs use documented compatibility strings. [bhelgaas: changelog] Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rob Herring <robh@kernel.org> |
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Simon Horman
|
a176cd304a |
PCI: rcar: Add gen2 device tree support for r8a7793
Add "renesas,pci-r8a7793" as a compatibility string for "renesas,pci-rcar-gen2". This doesn't change the driver, so it does nothing by itself. But it does mean that checkpatch won't complain about a future patch that adds "renesas,pci-r8a7793" to a DT, which helps ensure that shipped DTs use documented compatibility strings. [bhelgaas: changelog] Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rob Herring <robh@kernel.org> |
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Bjorn Helgaas
|
c111e8bf6e |
Merge branches 'pci/host', 'pci/host-designware', 'pci/host-hisi', 'pci/host-qcom' and 'pci/host-rcar' into next
* pci/host: PCI: host: Add of_pci_get_host_bridge_resources() stub PCI: host: Mark PCIe/PCI (MSI) IRQ cascade handlers as IRQF_NO_THREAD * pci/host-designware: PCI: designware: Make config accessor override checking symmetric PCI: designware: Simplify control flow * pci/host-hisi: PCI: hisi: Add support for HiSilicon Hip06 PCIe host controllers * pci/host-qcom: ARM: dts: ifc6410: enable PCIe DT node for this board ARM: dts: apq8064: add PCIe devicetree node PCI: qcom: Add Qualcomm PCIe controller driver PCI: qcom: Document PCIe devicetree bindings PCI: designware: Ensure ATU is enabled before IO/conf space accesses * pci/host-rcar: PCI: rcar: Add Gen2 PHY setup to pcie-rcar PCI: rcar: Add runtime PM support to pcie-rcar PCI: rcar: Remove unused pci_sys_data struct from pcie-rcar |
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Gabriele Paoloni
|
5930fe4ede |
PCI: hisi: Add support for HiSilicon Hip06 PCIe host controllers
Add support for the HiSilicon Hip06 SoC. Documentation has been updated to include Hip06. Add Gabriele Paoloni as maintainer of the driver. Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com> |
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Bjorn Helgaas
|
65d5b109d1 |
Merge branches 'pci/host-generic', 'pci/host-imx6', 'pci/host-iproc' and 'pci/host-rcar' into next
* pci/host-generic: PCI: generic,versatile: Remove unused pci_sys_data structures * pci/host-imx6: PCI: imx6: Add support for active-low reset GPIO PCI: imx6: Use gpio_set_value_cansleep() * pci/host-iproc: PCI: iproc: Add iProc PCIe MSI support PCI: iproc: Add iProc PCIe MSI device tree binding PCI: iproc: Add PAXC interface support PCI: iproc: Update iProc PCIe device tree binding PCI: iproc: Do not use 0x in front of %pap PCI: iproc: Hide CONFIG_PCIE_IPROC * pci/host-rcar: PCI: rcar: Add gen2 fallback compatibility string for pcie-rcar PCI: rcar: Add gen2 fallback compatibility string for pci-rcar-gen2 PCI: rcar: Add support for R-Car H3 to pcie-rcar Revert "PCI: rcar: Build pcie-rcar.c only on ARM" PCI: rcar: Convert to DT resource parsing API PCI: rcar: Allow DT to override default window settings |
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Stanimir Varbanov
|
845d5ca266 |
PCI: qcom: Document PCIe devicetree bindings
Document Qualcomm PCIe driver devicetree bindings. Signed-off-by: Stanimir Varbanov <svarbanov@mm-sol.com> Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rob Herring <robh@kernel.org> |
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Simon Horman
|
a37b3eafe8 |
PCI: rcar: Add gen2 fallback compatibility string for pcie-rcar
Add fallback compatibility string for R-Car Gen 2 family. This is in keeping with the fallback scheme being adopted wherever appropriate for drivers for Renesas SoCs. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> |
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Simon Horman
|
3517652fda |
PCI: rcar: Add gen2 fallback compatibility string for pci-rcar-gen2
Add fallback compatibility string for R-Car Gen 2 family. This is in keeping with the fallback scheme being adopted wherever appropriate for drivers for Renesas SoCs. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rob Herring <robh@kernel.org> |
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Harunobu Kurokawa
|
e015f88c36 |
PCI: rcar: Add support for R-Car H3 to pcie-rcar
Add the "renesas,pcie-r8a7795" property for the R-Car H3 device to the pcie-rcar driver. Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Harunobu Kurokawa <harunobu.kurokawa.dn@renesas.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> |
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Ray Jui
|
c7bd481953 |
PCI: iproc: Add iProc PCIe MSI device tree binding
Update the iProc PCIe device tree bindings with added binding information for MSI. Signed-off-by: Ray Jui <rjui@broadcom.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Anup Patel <anup.patel@broadcom.com> Reviewed-by: Vikram Prakash <vikramp@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> |
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Ray Jui
|
e8b8318de6 |
PCI: iproc: Update iProc PCIe device tree binding
Add a new compatible string "brcm,iproc-pcie-paxc", for PAXC-based iProc PCIe root complex. A PAXC-based PCIe root complex is connected to emulated endpoint devices internal to the ASIC. Signed-off-by: Ray Jui <rjui@broadcom.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> |
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Phil Edworthy
|
8d598cabf5 |
PCI: rcar: Allow DT to override default window settings
If the DTB specifies dma-ranges, use those values. Otherwise, default to the values that were previously hardcoded into the driver. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Simon Horman <horms+renesas@verge.net.au> |
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Linus Torvalds
|
c0d6fe2f01 |
ARM: DT updates for v4.4
As usual, this is the massive branch we have for each release. Lots of various updates and additions of hardware descriptions on existing hardware, as well as the usual additions of new boards and SoCs. This is also the first release where we've started mixing 64- and 32-bit DT updates in one branch. (Specific details on what's actually here and new is pretty easy to tell from the diffstat, so there's little point in duplicating listing it here.) -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJWQT2WAAoJEIwa5zzehBx37tgQAIBe5eDJFXFihTlyOQ2plL3q vVH4OCzXIHELfM1J8CGZNah1wCQqNOts8RAmDCzxr+zSYuLOwJOEDZ6NKmErMxl0 NTj3+BsqKO3NRym970ofPqU9JRLQmpZ8K7dzk8Nwj2+r1WZHFu/j6Jv44n/Ns0lw 7+wxnG322lTm7SnvALCMD5lD4Y7VpThooWy5SdFtRoAetn+cLbVCJIeeQvO6Vxkp NooeJR0t2e8cpbAND5Jwu6eeWRcIbrvgjYDe0omhrIY05i9yNvIsC2HuQFGjF43z p2CnQvcKnhOXTZw3yse1Fx5igA7jqwVjjC/lVeDyxhusAtLpmuB6qbSaj7DpqkSQ nJxX1d49WKm68K+aknmee1kYRrvc4DE/kORI4IxXnsVNMu16ifTVLnxKgUhwzukb eZdTP6rsqgNozaYvh0k1vfSFd+CNSkBg+E9nrI3tU95yo3LOIhobVBCvBcWlmUvQ JdavRztqosChjIx3a9i1eCNKJtCg9p4m+gWjUqVVWsxBHe/3HojzjZnsBSynIQMA uGIVm0TKhNl1Svxl3oJo9257UCUK7+5PqJHK9IHrcWDULYx05JGSjuZcyvNS6Fo+ u1DMf0ud4gXJYhecFBa7b3zRjk5YxptgCCTjeEEOTUJbbhZqDjGFZlNuFi6dmqD3 ILJ2QMe/DGiPIlUmCfsx =qY1q -----END PGP SIGNATURE----- Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM DT updates from Olof Johansson: "As usual, this is the massive branch we have for each release. Lots of various updates and additions of hardware descriptions on existing hardware, as well as the usual additions of new boards and SoCs. This is also the first release where we've started mixing 64- and 32-bit DT updates in one branch. (Specific details on what's actually here and new is pretty easy to tell from the diffstat, so there's little point in duplicating listing it here)" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (499 commits) ARM: dts: uniphier: add system-bus-controller nodes ARM64: juno: disable NOR flash node by default ARM: dts: uniphier: add outer cache controller nodes arm64: defconfig: Enable PCI generic host bridge by default arm64: Juno: Add support for the PCIe host bridge on Juno R1 Documentation: of: Document the bindings used by Juno R1 PCIe host bridge ARM: dts: uniphier: add I2C aliases for ProXstream2 boards dts/Makefile: Add build support for LS2080a QDS & RDB board DTS dts/ls2080a: Add DTS support for LS2080a QDS & RDB boards dts/ls2080a: Update Simulator DTS to add support of various peripherals dts/ls2080a: Remove text about writing to Free Software Foundation dts/ls2080a: Update DTSI to add support of various peripherals doc: DTS: Update DWC3 binding to provide reference to generic bindings doc/bindings: Update GPIO devicetree binding documentation for LS2080A Documentation/dts: Move FSL board-specific bindings out of /powerpc Documentation: DT: Add entry for FSL LS2080A QDS and RDB boards arm64: Rename FSL LS2085A SoC support code to LS2080A arm64: Use generic Layerscape SoC family naming ARM: dts: uniphier: add ProXstream2 Vodka board support ARM: dts: uniphier: add ProXstream2 Gentil board support ... |
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Linus Torvalds
|
9bbd4b9f38 |
DeviceTree updates for 4.4:
- DT binding doc consolidation moving similar bindings to common locations. The majority of these are display related which were scattered in video/, fb/, drm/, gpu/, and panel/ directories. - Add new config option, CONFIG_OF_ALL_DTBS, to enable building all dtbs in the tree for most arches with dts files (except powerpc for now). - OF_IRQ=n fixes for user enabled CONFIG_OF. - of_node_put ref counting fixes from Julia Lawall. - Common DT binding for wakeup-source and deprecation of all similar bindings. - DT binding for PXA LCD controller. - Allow ignoring failed PCI resource translations in order to ignore 64-bit addresses on non-LPAE 32-bit kernels. - Support setting the NUMA node from DT instead of only from parent device. - Couple of earlycon DT parsing fixes for address and options. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJWO+HwAAoJEPr7XbWNvGHDFOoP/RcK4z5dtVQL2XRFbJBqRBZU riMc4BZkwpcKGXjzZlMrLw+mg4vaoLKSIAGAsYkgdDOKbYphQQdVwDzN099Fzpzy EE6K7Q+AW618z34AWdDjcpJYzSFnjAjYdh6JabohmKdPlxobR1RsKT+nRpDOGfeO c1DmxAQ1Fiav+xAI4m0YUuyxQDUeFYC0mVcVPzRbWZj31Ia5BgIrvT+V7fM55CTb dOAYWDHrfOw+yYI98sqZoSAb5H+E3UuY1ymBMhiP16Ot2vCyIKRYwhDokF9VYO/0 MpIMhCgv1jmE5NCbBeYSSJUePySvvnuyYe6HIaJQjV8KGEZ5C7c1iLMgtvov2KVI bcSx6nPH/u5FuWIhWdMINPc50AQBAK/akYcgoCVjioVX+4WY2pqLvsXW2arEr//Z XY3FUpgS6eI42HBsj4SxrGnzaRc2jPOs6yiANkywmHnpWcyvszCxUEvf0Mh0cbkm diu31/owdpUO5imCe+ErtGVV3vY2VUMnbcm8J61pqL52OZNPLZUUEfktv1JCGW7y cVdnlgeGSFuCbY4jUErvxtQGJQLFwf7Gg1U/VfFXX2iuQGAACB1KwxY5sR6P5Ghz W6NvOTT36kaM9WGqn/bquOd6EmKcx9aZfgRLOkgV86Q/11gHKpuRjkrsth7rIJDI 97qkGiWl4t1Ll5T4StK8 =tGCy -----END PGP SIGNATURE----- Merge tag 'devicetree-for-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull DeviceTree updates from Rob Herring: "A fairly large (by DT standards) pull request this time with the majority being some overdue moving DT binding docs around to consolidate similar bindings. - DT binding doc consolidation moving similar bindings to common locations. The majority of these are display related which were scattered in video/, fb/, drm/, gpu/, and panel/ directories. - Add new config option, CONFIG_OF_ALL_DTBS, to enable building all dtbs in the tree for most arches with dts files (except powerpc for now). - OF_IRQ=n fixes for user enabled CONFIG_OF. - of_node_put ref counting fixes from Julia Lawall. - Common DT binding for wakeup-source and deprecation of all similar bindings. - DT binding for PXA LCD controller. - Allow ignoring failed PCI resource translations in order to ignore 64-bit addresses on non-LPAE 32-bit kernels. - Support setting the NUMA node from DT instead of only from parent device. - Couple of earlycon DT parsing fixes for address and options" * tag 'devicetree-for-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (45 commits) MAINTAINERS: update DT binding doc locations devicetree: add Sigma Designs vendor prefix of: simplify arch_find_n_match_cpu_physical_id() function Documentation: arm: Fixed typo in socfpga fpga mgr example Documentation: devicetree: fix reference to legacy wakeup properties Documentation: devicetree: standardize/consolidate on "wakeup-source" property drivers: of: removing assignment of 0 to static variable xtensa: enable building of all dtbs mips: enable building of all dtbs metag: enable building of all dtbs metag: use common make variables for dtb builds h8300: enable building of all dtbs arm64: enable building of all dtbs arm: enable building of all dtbs arc: enable building of all dtbs arc: use common make variables for dtb builds of: add config option to enable building of all dtbs of/fdt: fix error checking for earlycon address of/overlay: add missing of_node_put of/platform: add missing of_node_put ... |
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Linus Torvalds
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3c87b79188 |
PCI changes for the v4.4 merge window:
Resource management Add support for Enhanced Allocation devices (Sean O. Stalley) Add Enhanced Allocation register entries (Sean O. Stalley) Handle IORESOURCE_PCI_FIXED when sizing resources (David Daney) Handle IORESOURCE_PCI_FIXED when assigning resources (David Daney) Handle Enhanced Allocation capability for SR-IOV devices (David Daney) Clear IORESOURCE_UNSET when reverting to firmware-assigned address (Bjorn Helgaas) Make Enhanced Allocation bitmasks more obvious (Bjorn Helgaas) Expand Enhanced Allocation BAR output (Bjorn Helgaas) Add of_pci_check_probe_only to parse "linux,pci-probe-only" (Marc Zyngier) Fix lookup of linux,pci-probe-only property (Marc Zyngier) Add sparc mem64 resource parsing for root bus (Yinghai Lu) PCI device hotplug pciehp: Queue power work requests in dedicated function (Guenter Roeck) Driver binding Add builtin_pci_driver() to avoid registration boilerplate (Paul Gortmaker) Virtualization Set SR-IOV NumVFs to zero after enumeration (Alexander Duyck) Remove redundant validation of SR-IOV offset/stride registers (Alexander Duyck) Remove VFs in reverse order if virtfn_add() fails (Alexander Duyck) Reorder pcibios_sriov_disable() (Alexander Duyck) Wait 1 second between disabling VFs and clearing NumVFs (Alexander Duyck) Fix sriov_enable() error path for pcibios_enable_sriov() failures (Alexander Duyck) Enable SR-IOV ARI Capable Hierarchy before reading TotalVFs (Ben Shelton) Don't try to restore VF BARs (Wei Yang) MSI Don't alloc pcibios-irq when MSI is enabled (Joerg Roedel) Add msi_controller setup_irqs() method for special multivector setup (Lucas Stach) Export all remapped MSIs to sysfs attributes (Romain Bezut) Disable MSI on SiS 761 (Ondrej Zary) AER Clear error status registers during enumeration and restore (Taku Izumi) Generic host bridge driver Fix lookup of linux,pci-probe-only property (Marc Zyngier) Allow multiple hosts with different map_bus() methods (David Daney) Pass starting bus number to pci_scan_root_bus() (David Daney) Fix address window calculation for non-zero starting bus (David Daney) Altera host bridge driver Add msi.h to ARM Kbuild (Ley Foon Tan) Add Altera PCIe host controller driver (Ley Foon Tan) Add Altera PCIe MSI driver (Ley Foon Tan) APM X-Gene host bridge driver Remove msi_controller assignment (Duc Dang) Broadcom iProc host bridge driver Fix header comment "Corporation" misspelling (Florian Fainelli) Fix code comment to match code (Ray Jui) Remove unused struct iproc_pcie.irqs[] (Ray Jui) Call pci_fixup_irqs() for ARM64 as well as ARM (Ray Jui) Fix PCIe reset logic (Ray Jui) Improve link detection logic (Ray Jui) Update PCIe device tree bindings (Ray Jui) Add outbound mapping support (Ray Jui) Freescale i.MX6 host bridge driver Return real error code from imx6_add_pcie_port() (Fabio Estevam) Add PCIE_PHY_RX_ASIC_OUT_VALID definition (Fabio Estevam) Freescale Layerscape host bridge driver Remove ls_pcie_establish_link() (Minghuan Lian) Ignore PCIe controllers in Endpoint mode (Minghuan Lian) Factor out SCFG related function (Minghuan Lian) Update ls_add_pcie_port() (Minghuan Lian) Remove unused fields from struct ls_pcie (Minghuan Lian) Add support for LS1043a and LS2080a (Minghuan Lian) Add ls_pcie_msi_host_init() (Minghuan Lian) HiSilicon host bridge driver Add HiSilicon SoC Hip05 PCIe driver (Zhou Wang) Marvell MVEBU host bridge driver Return zero for reserved or unimplemented config space (Russell King) Use exact config access size; don't read/modify/write (Russell King) Use of_get_available_child_count() (Russell King) Use for_each_available_child_of_node() to walk child nodes (Russell King) Report full node name when reporting a DT error (Russell King) Use port->name rather than "PCIe%d.%d" (Russell King) Move port parsing and resource claiming to separate function (Russell King) Fix memory leaks and refcount leaks (Russell King) Split port parsing and resource claiming from port setup (Russell King) Use gpio_set_value_cansleep() (Russell King) Use devm_kcalloc() to allocate an array (Russell King) Use gpio_desc to carry around gpio (Russell King) Improve clock/reset handling (Russell King) Add PCI Express root complex capability block (Russell King) Remove code restricting accesses to slot 0 (Russell King) NVIDIA Tegra host bridge driver Wrap static pgprot_t initializer with __pgprot() (Ard Biesheuvel) Renesas R-Car host bridge driver Build pci-rcar-gen2.c only on ARM (Geert Uytterhoeven) Build pcie-rcar.c only on ARM (Geert Uytterhoeven) Make PCI aware of the I/O resources (Phil Edworthy) Remove dependency on ARM-specific struct hw_pci (Phil Edworthy) Set root bus nr to that provided in DT (Phil Edworthy) Fix I/O offset for multiple host bridges (Phil Edworthy) ST Microelectronics SPEAr13xx host bridge driver Fix dw_pcie_cfg_read/write() usage (Gabriele Paoloni) Synopsys DesignWare host bridge driver Make "clocks" and "clock-names" optional DT properties (Bhupesh Sharma) Use exact access size in dw_pcie_cfg_read() (Gabriele Paoloni) Simplify dw_pcie_cfg_read/write() interfaces (Gabriele Paoloni) Require config accesses to be naturally aligned (Gabriele Paoloni) Make "num-lanes" an optional DT property (Gabriele Paoloni) Move calculation of bus addresses to DRA7xx (Gabriele Paoloni) Replace ARM pci_sys_data->align_resource with global function pointer (Gabriele Paoloni) Factor out MSI msg setup (Lucas Stach) Implement multivector MSI IRQ setup (Lucas Stach) Make get_msi_addr() return phys_addr_t, not u32 (Lucas Stach) Set up high part of MSI target address (Lucas Stach) Fix PORT_LOGIC_LINK_WIDTH_MASK (Zhou Wang) Revert "PCI: designware: Program ATU with untranslated address" (Zhou Wang) Use of_pci_get_host_bridge_resources() to parse DT (Zhou Wang) Make driver arch-agnostic (Zhou Wang) Miscellaneous Make x86 pci_subsys_init() static (Alexander Kuleshov) Turn off Request Attributes to avoid Chelsio T5 Completion erratum (Hariprasad Shenai) -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJWPM9aAAoJEFmIoMA60/r89f8QALFMHegqKk5M08ZcCaG7unLF 5U5t88y6KF/kNYF6HOqLQiHh79U3ToU5HdrNaAtutr0UnvgbFC2WulLqKYgLiq6Y YJnwR3EfgGmdG7DKAVAXq19+nc2hgTPAEe8sciU7HKlTbqQmGj6//y3sQULGNLx3 zur0C33DCtrDgKDP7to273lkHO8Vl0YuLzyqwt0ePCMNcXR0h1dK8QxSTjuXBxaR c+T1V1Hw64MTxLz3xJd1/1ipy32u+9LnqqcdRz0zRq6qi48G9ch/i4Z6DHa8kTbj DUZrrTYKILQ2TcjcZSBmTueX11Z1Xa4/I/45sehIi6gVWL9qQbmGpt2E5YtFED+4 GdcmBSbWG/qsNsabXk38uiM3ww7+ltXEOhTXbcK+EgjvIhE6gSK/plYG0fU9pybs AKViEXVdHoT1X0N1dLK12mq7kvDCQvShHn08lz97Q9YrZ32wv1Fnij6WVSbJvfWt DubtPtisVM+rVy+VTpOImNR9wO54lTmG5jK53yNqH7I20K89y1kqARlN9nMXMB1a 2nQnwe9yWlsGj9gVNCn1KmyQSPOWjg+3Z+ekfwbxpca14s1AaN3Jm0N9Z61dXFoF y2ygoQtZ/z9BHr3quBpxXGt+aVUg2kcNw5GYeDYiALxXdJSObyzRrZ6HDb/zicU2 ZH9hBj0ctXvucmy6I2mt =uZrt -----END PGP SIGNATURE----- Merge tag 'pci-v4.4-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI updates from Bjorn Helgaas: "Resource management: - Add support for Enhanced Allocation devices (Sean O. Stalley) - Add Enhanced Allocation register entries (Sean O. Stalley) - Handle IORESOURCE_PCI_FIXED when sizing resources (David Daney) - Handle IORESOURCE_PCI_FIXED when assigning resources (David Daney) - Handle Enhanced Allocation capability for SR-IOV devices (David Daney) - Clear IORESOURCE_UNSET when reverting to firmware-assigned address (Bjorn Helgaas) - Make Enhanced Allocation bitmasks more obvious (Bjorn Helgaas) - Expand Enhanced Allocation BAR output (Bjorn Helgaas) - Add of_pci_check_probe_only to parse "linux,pci-probe-only" (Marc Zyngier) - Fix lookup of linux,pci-probe-only property (Marc Zyngier) - Add sparc mem64 resource parsing for root bus (Yinghai Lu) PCI device hotplug: - pciehp: Queue power work requests in dedicated function (Guenter Roeck) Driver binding: - Add builtin_pci_driver() to avoid registration boilerplate (Paul Gortmaker) Virtualization: - Set SR-IOV NumVFs to zero after enumeration (Alexander Duyck) - Remove redundant validation of SR-IOV offset/stride registers (Alexander Duyck) - Remove VFs in reverse order if virtfn_add() fails (Alexander Duyck) - Reorder pcibios_sriov_disable() (Alexander Duyck) - Wait 1 second between disabling VFs and clearing NumVFs (Alexander Duyck) - Fix sriov_enable() error path for pcibios_enable_sriov() failures (Alexander Duyck) - Enable SR-IOV ARI Capable Hierarchy before reading TotalVFs (Ben Shelton) - Don't try to restore VF BARs (Wei Yang) MSI: - Don't alloc pcibios-irq when MSI is enabled (Joerg Roedel) - Add msi_controller setup_irqs() method for special multivector setup (Lucas Stach) - Export all remapped MSIs to sysfs attributes (Romain Bezut) - Disable MSI on SiS 761 (Ondrej Zary) AER: - Clear error status registers during enumeration and restore (Taku Izumi) Generic host bridge driver: - Fix lookup of linux,pci-probe-only property (Marc Zyngier) - Allow multiple hosts with different map_bus() methods (David Daney) - Pass starting bus number to pci_scan_root_bus() (David Daney) - Fix address window calculation for non-zero starting bus (David Daney) Altera host bridge driver: - Add msi.h to ARM Kbuild (Ley Foon Tan) - Add Altera PCIe host controller driver (Ley Foon Tan) - Add Altera PCIe MSI driver (Ley Foon Tan) APM X-Gene host bridge driver: - Remove msi_controller assignment (Duc Dang) Broadcom iProc host bridge driver: - Fix header comment "Corporation" misspelling (Florian Fainelli) - Fix code comment to match code (Ray Jui) - Remove unused struct iproc_pcie.irqs[] (Ray Jui) - Call pci_fixup_irqs() for ARM64 as well as ARM (Ray Jui) - Fix PCIe reset logic (Ray Jui) - Improve link detection logic (Ray Jui) - Update PCIe device tree bindings (Ray Jui) - Add outbound mapping support (Ray Jui) Freescale i.MX6 host bridge driver: - Return real error code from imx6_add_pcie_port() (Fabio Estevam) - Add PCIE_PHY_RX_ASIC_OUT_VALID definition (Fabio Estevam) Freescale Layerscape host bridge driver: - Remove ls_pcie_establish_link() (Minghuan Lian) - Ignore PCIe controllers in Endpoint mode (Minghuan Lian) - Factor out SCFG related function (Minghuan Lian) - Update ls_add_pcie_port() (Minghuan Lian) - Remove unused fields from struct ls_pcie (Minghuan Lian) - Add support for LS1043a and LS2080a (Minghuan Lian) - Add ls_pcie_msi_host_init() (Minghuan Lian) HiSilicon host bridge driver: - Add HiSilicon SoC Hip05 PCIe driver (Zhou Wang) Marvell MVEBU host bridge driver: - Return zero for reserved or unimplemented config space (Russell King) - Use exact config access size; don't read/modify/write (Russell King) - Use of_get_available_child_count() (Russell King) - Use for_each_available_child_of_node() to walk child nodes (Russell King) - Report full node name when reporting a DT error (Russell King) - Use port->name rather than "PCIe%d.%d" (Russell King) - Move port parsing and resource claiming to separate function (Russell King) - Fix memory leaks and refcount leaks (Russell King) - Split port parsing and resource claiming from port setup (Russell King) - Use gpio_set_value_cansleep() (Russell King) - Use devm_kcalloc() to allocate an array (Russell King) - Use gpio_desc to carry around gpio (Russell King) - Improve clock/reset handling (Russell King) - Add PCI Express root complex capability block (Russell King) - Remove code restricting accesses to slot 0 (Russell King) NVIDIA Tegra host bridge driver: - Wrap static pgprot_t initializer with __pgprot() (Ard Biesheuvel) Renesas R-Car host bridge driver: - Build pci-rcar-gen2.c only on ARM (Geert Uytterhoeven) - Build pcie-rcar.c only on ARM (Geert Uytterhoeven) - Make PCI aware of the I/O resources (Phil Edworthy) - Remove dependency on ARM-specific struct hw_pci (Phil Edworthy) - Set root bus nr to that provided in DT (Phil Edworthy) - Fix I/O offset for multiple host bridges (Phil Edworthy) ST Microelectronics SPEAr13xx host bridge driver: - Fix dw_pcie_cfg_read/write() usage (Gabriele Paoloni) Synopsys DesignWare host bridge driver: - Make "clocks" and "clock-names" optional DT properties (Bhupesh Sharma) - Use exact access size in dw_pcie_cfg_read() (Gabriele Paoloni) - Simplify dw_pcie_cfg_read/write() interfaces (Gabriele Paoloni) - Require config accesses to be naturally aligned (Gabriele Paoloni) - Make "num-lanes" an optional DT property (Gabriele Paoloni) - Move calculation of bus addresses to DRA7xx (Gabriele Paoloni) - Replace ARM pci_sys_data->align_resource with global function pointer (Gabriele Paoloni) - Factor out MSI msg setup (Lucas Stach) - Implement multivector MSI IRQ setup (Lucas Stach) - Make get_msi_addr() return phys_addr_t, not u32 (Lucas Stach) - Set up high part of MSI target address (Lucas Stach) - Fix PORT_LOGIC_LINK_WIDTH_MASK (Zhou Wang) - Revert "PCI: designware: Program ATU with untranslated address" (Zhou Wang) - Use of_pci_get_host_bridge_resources() to parse DT (Zhou Wang) - Make driver arch-agnostic (Zhou Wang) Miscellaneous: - Make x86 pci_subsys_init() static (Alexander Kuleshov) - Turn off Request Attributes to avoid Chelsio T5 Completion erratum (Hariprasad Shenai)" * tag 'pci-v4.4-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (94 commits) PCI: altera: Add Altera PCIe MSI driver PCI: hisi: Add HiSilicon SoC Hip05 PCIe driver PCI: layerscape: Add ls_pcie_msi_host_init() PCI: layerscape: Add support for LS1043a and LS2080a PCI: layerscape: Remove unused fields from struct ls_pcie PCI: layerscape: Update ls_add_pcie_port() PCI: layerscape: Factor out SCFG related function PCI: layerscape: Ignore PCIe controllers in Endpoint mode PCI: layerscape: Remove ls_pcie_establish_link() PCI: designware: Make "clocks" and "clock-names" optional DT properties PCI: designware: Make driver arch-agnostic ARM/PCI: Replace pci_sys_data->align_resource with global function pointer PCI: designware: Use of_pci_get_host_bridge_resources() to parse DT Revert "PCI: designware: Program ATU with untranslated address" PCI: designware: Move calculation of bus addresses to DRA7xx PCI: designware: Make "num-lanes" an optional DT property PCI: designware: Require config accesses to be naturally aligned PCI: designware: Simplify dw_pcie_cfg_read/write() interfaces PCI: designware: Use exact access size in dw_pcie_cfg_read() PCI: spear: Fix dw_pcie_cfg_read/write() usage ... |
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Bjorn Helgaas
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7225107e15 |
Merge branch 'pci/host-layerscape' into next
* pci/host-layerscape: PCI: layerscape: Add ls_pcie_msi_host_init() PCI: layerscape: Add support for LS1043a and LS2080a PCI: layerscape: Remove unused fields from struct ls_pcie PCI: layerscape: Update ls_add_pcie_port() PCI: layerscape: Factor out SCFG related function PCI: layerscape: Ignore PCIe controllers in Endpoint mode PCI: layerscape: Remove ls_pcie_establish_link() |
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Bjorn Helgaas
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4ed31f24a6 |
Merge branch 'pci/host-hisi' into next
* pci/host-hisi: PCI: hisi: Add HiSilicon SoC Hip05 PCIe driver |
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Bjorn Helgaas
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c2df02bdaa |
Merge branches 'pci/host-altera', 'pci/host-designware', 'pci/host-generic', 'pci/host-imx6', 'pci/host-iproc', 'pci/host-mvebu', 'pci/host-rcar', 'pci/host-tegra' and 'pci/host-xgene' into next
* pci/host-altera: PCI: altera: Add Altera PCIe MSI driver PCI: altera: Add Altera PCIe host controller driver ARM: Add msi.h to Kbuild * pci/host-designware: PCI: designware: Make "clocks" and "clock-names" optional DT properties PCI: designware: Make driver arch-agnostic ARM/PCI: Replace pci_sys_data->align_resource with global function pointer PCI: designware: Use of_pci_get_host_bridge_resources() to parse DT Revert "PCI: designware: Program ATU with untranslated address" PCI: designware: Move calculation of bus addresses to DRA7xx PCI: designware: Make "num-lanes" an optional DT property PCI: designware: Require config accesses to be naturally aligned PCI: designware: Simplify dw_pcie_cfg_read/write() interfaces PCI: designware: Use exact access size in dw_pcie_cfg_read() PCI: spear: Fix dw_pcie_cfg_read/write() usage PCI: designware: Set up high part of MSI target address PCI: designware: Make get_msi_addr() return phys_addr_t, not u32 PCI: designware: Implement multivector MSI IRQ setup PCI: designware: Factor out MSI msg setup PCI: Add msi_controller setup_irqs() method for special multivector setup PCI: designware: Fix PORT_LOGIC_LINK_WIDTH_MASK * pci/host-generic: PCI: generic: Fix address window calculation for non-zero starting bus PCI: generic: Pass starting bus number to pci_scan_root_bus() PCI: generic: Allow multiple hosts with different map_bus() methods arm64: dts: Drop linux,pci-probe-only from the Seattle DTS powerpc/PCI: Fix lookup of linux,pci-probe-only property PCI: generic: Fix lookup of linux,pci-probe-only property of/pci: Add of_pci_check_probe_only to parse "linux,pci-probe-only" * pci/host-imx6: PCI: imx6: Add PCIE_PHY_RX_ASIC_OUT_VALID definition PCI: imx6: Return real error code from imx6_add_pcie_port() * pci/host-iproc: PCI: iproc: Fix header comment "Corporation" misspelling PCI: iproc: Add outbound mapping support PCI: iproc: Update PCIe device tree bindings PCI: iproc: Improve link detection logic PCI: iproc: Fix PCIe reset logic PCI: iproc: Call pci_fixup_irqs() for ARM64 as well as ARM PCI: iproc: Remove unused struct iproc_pcie.irqs[] PCI: iproc: Fix code comment to match code * pci/host-mvebu: PCI: mvebu: Remove code restricting accesses to slot 0 PCI: mvebu: Add PCI Express root complex capability block PCI: mvebu: Improve clock/reset handling PCI: mvebu: Use gpio_desc to carry around gpio PCI: mvebu: Use devm_kcalloc() to allocate an array PCI: mvebu: Use gpio_set_value_cansleep() PCI: mvebu: Split port parsing and resource claiming from port setup PCI: mvebu: Fix memory leaks and refcount leaks PCI: mvebu: Move port parsing and resource claiming to separate function PCI: mvebu: Use port->name rather than "PCIe%d.%d" PCI: mvebu: Report full node name when reporting a DT error PCI: mvebu: Use for_each_available_child_of_node() to walk child nodes PCI: mvebu: Use of_get_available_child_count() PCI: mvebu: Use exact config access size; don't read/modify/write PCI: mvebu: Return zero for reserved or unimplemented config space * pci/host-rcar: PCI: rcar: Fix I/O offset for multiple host bridges PCI: rcar: Set root bus nr to that provided in DT PCI: rcar: Remove dependency on ARM-specific struct hw_pci PCI: rcar: Make PCI aware of the I/O resources PCI: rcar: Build pcie-rcar.c only on ARM PCI: rcar: Build pci-rcar-gen2.c only on ARM * pci/host-tegra: PCI: tegra: Wrap static pgprot_t initializer with __pgprot() * pci/host-xgene: PCI/MSI: xgene: Remove msi_controller assignment |
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Ley Foon Tan
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af1169b48b |
PCI: altera: Add Altera PCIe MSI driver
Add Altera PCIe MSI driver. This soft IP supports a configurable number of vectors, which is a DTS parameter. [bhelgaas: Kconfig depend on PCIE_ALTERA, typos, whitespace] Signed-off-by: Ley Foon Tan <lftan@altera.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Rob Herring <robh@kernel.org> |
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Zhou Wang
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500a1d9a43 |
PCI: hisi: Add HiSilicon SoC Hip05 PCIe driver
Add PCIe host support for HiSilicon SoC Hip05, related DT binding documentation, and maintainer update. [bhelgaas: changelog, 32-bit only config write warning text] Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com> Signed-off-by: liudongdong <liudongdong3@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rob Herring <robh@kernel.org> (DT binding) |
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Minghuan Lian
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5192ec7b24 |
PCI: layerscape: Add support for LS1043a and LS2080a
Both LS1043a and LS2080a are based on ARMv8 64-bit architecture and have similar PCIe implementation. LUT is added to controller. Add LS1043a and LS2080a support. [bhelgaas: move unused field removal into separate patch, include DT update] Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> (DT update) Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Arnd Bergmann <arnd@arndb.de> (DT update) |
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Bhupesh Sharma
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df7701621b |
PCI: designware: Make "clocks" and "clock-names" optional DT properties
Move the clock-related properties in the DesignWare PCIe controller bindings to 'optional' set of properties. [bhelgaas: move to separate patch] Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Arnd Bergmann <arnd@arndb.de> |
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Gabriele Paoloni
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907fce0902 |
PCI: designware: Make "num-lanes" an optional DT property
Currently "num-lanes" is read in dw_pcie_host_init(), but it is only used if we call dw_pcie_setup_rc() while bringing up the link. If the link has already been brought up by firmware, we need not call dw_pcie_setup_rc(), and "num-lanes" is unnecessary. Only complain about "num-lanes" if we actually need it and we didn't find a valid value. [bhelgaas: changelog] Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> |
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Liviu Dudau
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e8e1dc803f |
Documentation: of: Document the bindings used by Juno R1 PCIe host bridge
ARM's Juno R1 board used PLDA XpressRICH3-AXI IP to implement a PCIe host bridge. Introduce "plda" as vendor prefix for PLDA and document the DT bindings for PLDA XpressRICH3-AXI IP as well as ARM's Juno R1. Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com> Acked-by: Mark Rutland <mark.rutland@arm.com> |
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Ley Foon Tan
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eaa6111b70 |
PCI: altera: Add Altera PCIe host controller driver
Add the Altera PCIe host controller driver. [bhelgaas: whitespace, fold in DT and maintainer updates, OF_PCI dependency from Arnd] Signed-off-by: Ley Foon Tan <lftan@altera.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Rob Herring <robh@kernel.org> (DT binding) |
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Bjorn Helgaas
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f517256a68 |
Documentation/devicetree: Update PCI Device Tree bindings
Update broken links to PCI bus and interrupt mapping bindings. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Rob Herring <robh@kernel.org> |
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Mark Rutland
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b531566e4d |
Docs: dt: Add PCI MSI map bindings
Currently msi-parent is used by a few bindings to describe the relationship between a PCI root complex and a single MSI controller, but this property does not have a generic binding document. Additionally, msi-parent is insufficient to describe more complex relationships between MSI controllers and devices under a root complex, where devices may be able to target multiple MSI controllers, or where MSI controllers use (non-probeable) sideband information to distinguish devices. This patch adds a generic binding for mapping PCI devices to MSI controllers. This document covers msi-parent, and a new msi-map property (specific to PCI*) which may be used to map devices (identified by their Requester ID) to sideband data for each MSI controller that they may target. Acked-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |