Commit Graph

8 Commits

Author SHA1 Message Date
Greg Kroah-Hartman
e79220db63 phy: for 5.7
*) Rename and Re-design phy-cadence-dp driver to phy-cadence-torrent driver
 *) Add new PHY driver for Qualcomm 28nm Hi-Speed USB PHY
 *) Add new PHY driver for Qualcomm Super Speed PHY in QCS404
 *) Add support for Qualcomm PCIe QMP/QHP PHY in SDM845 to phy-qcom-qmp driver
 *) Add support for Qualcomm UFS PHY in MSM8996 to phy-qcom-qmp driver
 *) Add support for an additional reference clock in Mediatek phy-mtk-tphy driver
 *) Add support for configuring tuning parameters in Mediatek phy-mtk-tphy driver
 *) Add support for GMII PHY in TI K3 AM654x/J721E SoCs to phy-gmii-sel driver
 *) Add support for USB2 PHY in Amlogic A1 SoC Family to phy-meson-g12a-usb2
    driver
 *) Add support for USB3/USB2/PCIe PHY in Socionext Pro5 SoC to
    phy-uniphier-usb3ss/phy-uniphier-usb3hs/phy-uniphier-pcie driver respectively
 *) Add support for QUSB2 PHY in Qualcomm SC7180 in driver
 *) Convert dt-bindings of Cadence DP, Qualcomm QUSB2 to YAML format
 
 Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
 -----BEGIN PGP SIGNATURE-----
 
 iQJCBAABCgAsFiEEUXMr/TfP2p4suIY5Dlx4XIBNgtkFAl51P+IOHGtpc2hvbkB0
 aS5jb20ACgkQDlx4XIBNgtmEUQ//cnSP2uYWIfi7UXEMBqSMjwOeGqG8mLNNaLFh
 L3+AXf60I78wHvnPOu3u5kGi5P82YnkDeBnxKhElrNxtcv3iWxHswU2DKwr3i+/S
 OsPgBKTvYYoqcpeM/nf2hYZWJ8DofA0wuQ2o7n67Ldrm+QWORZzwohir0JAiNCl9
 5+XAQo7gnQqUrsfQ1uuCkcYVM5hoE/7HebaxcXMYDdPfttz+QhZZ4XjHgh4KAiGO
 MHn0aiF6nNJz465Un6YF+rFAcQjkl8R7WK93hCW2YPU2l2nvR+Z7cc7GfVIWPoss
 Rv9dUDtdXEJxPxZNaaQWqx+fyr3JmRm3hM53oj/aocZkxzH9omt+HNA5F98EP9S7
 X9YbxG/xRkf0sTfHFJbrGKZMXJn6u+jmJP54R3YhHqt1oBtHyQ1nCaqWLg3Lj7gx
 vaAV50dtwA0jkZVxP2iyAfGUBxG2NlDLeDZt7XUxZWGOyrwbujqt4PcxMyxS1tRs
 LHaT4xDBqR2pLbElx3omnx2q5U2wAW37yUzDMQ+q9mFHJhSMZ+vwkk418cleMaQE
 itu3Lg0I3uy3WIYj7V/xkAhEHH+MclmaBLOdtAA0Je75Zw8p6yDubv93A5lEmlrY
 P5ePuhgi/jBUqfYrtbzAP3v+vkC10auDDmA3342AaILwZ6LkWz6sqa8w6urT+6za
 2twcuWI=
 =+CzV
 -----END PGP SIGNATURE-----

Merge tag 'phy-for-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-next

Kishon writes:

phy: for 5.7

*) Rename and Re-design phy-cadence-dp driver to phy-cadence-torrent driver
*) Add new PHY driver for Qualcomm 28nm Hi-Speed USB PHY
*) Add new PHY driver for Qualcomm Super Speed PHY in QCS404
*) Add support for Qualcomm PCIe QMP/QHP PHY in SDM845 to phy-qcom-qmp driver
*) Add support for Qualcomm UFS PHY in MSM8996 to phy-qcom-qmp driver
*) Add support for an additional reference clock in Mediatek phy-mtk-tphy driver
*) Add support for configuring tuning parameters in Mediatek phy-mtk-tphy driver
*) Add support for GMII PHY in TI K3 AM654x/J721E SoCs to phy-gmii-sel driver
*) Add support for USB2 PHY in Amlogic A1 SoC Family to phy-meson-g12a-usb2
   driver
*) Add support for USB3/USB2/PCIe PHY in Socionext Pro5 SoC to
   phy-uniphier-usb3ss/phy-uniphier-usb3hs/phy-uniphier-pcie driver respectively
*) Add support for QUSB2 PHY in Qualcomm SC7180 in driver
*) Convert dt-bindings of Cadence DP, Qualcomm QUSB2 to YAML format

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>

* tag 'phy-for-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy: (52 commits)
  phy: qcom-qusb2: Add new overriding tuning parameters in QUSB2 V2 PHY
  phy: qcom-qusb2: Add support for overriding tuning parameters in QUSB2 V2 PHY
  dt-bindings: phy: qcom-qusb2: Add support for overriding Phy tuning parameters
  phy: qcom-qusb2: Add generic QUSB2 V2 PHY support
  dt-bindings: phy: qcom,qusb2: Add compatibles for QUSB2 V2 phy and SC7180
  dt-bindings: phy: qcom,qusb2: Convert QUSB2 phy bindings to yaml
  phy: rk-inno-usb2: Decrease verbosity of repeating log.
  phy: amlogic: Add Amlogic A1 USB2 PHY Driver
  dt-bindings: phy: Add Amlogic A1 USB2 PHY Bindings
  phy: ti: gmii-sel: add support for am654x/j721e soc
  dt-bindings: phy: ti: gmii-sel: add support for am654x/j721e soc
  phy: qualcomm: usb: Add SuperSpeed PHY driver
  dt-bindings: Add Qualcomm USB SuperSpeed PHY bindings
  phy: qualcomm: Add Synopsys 28nm Hi-Speed USB PHY driver
  dt-bindings: phy: Add Qualcomm Synopsys Hi-Speed USB PHY binding
  dt-bindings: phy: remove qcom-dwc3-usb-phy
  phy: phy-mtk-tphy: add a new reference clock
  phy: phy-mtk-tphy: remove unused u3phya_ref clock
  phy: phy-mtk-tphy: make the ref clock optional
  phy: phy-mtk-tphy: add a property for internal resistance
  ...
2020-03-21 12:02:20 +01:00
Grygorii Strashko
d9aa91dfb2 phy: ti: gmii-sel: add support for am654x/j721e soc
TI AM654x/J721E SoCs have the same PHY interface selection mechanism for
CPSWx subsystem as TI SoCs (AM3/4/5/DRA7), but registers and bit-fields
placement is different.

This patch adds corresponding support for TI AM654x/J721E SoCs PHY
interface selection.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2020-03-20 19:34:29 +05:30
Grygorii Strashko
58aa772931 phy: ti: gmii-sel: do not fail in case of gmii
The "gmii" PHY interface mode is supported on TI AM335x/437x/5xx SoCs, so
don't fail if it's selected.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2020-02-20 18:06:57 +05:30
Grygorii Strashko
eefed634eb phy: ti: gmii-sel: fix set of copy-paste errors
- under PHY_INTERFACE_MODE_MII the 'mode' func parameter is assigned
instead of 'gmii_sel_mode' and it's working only because the default value
'gmii_sel_mode' is set to 0.

- console outputs use 'rgmii_id' and 'mode' values to print PHY mode
instead of using 'submode' value which is representing PHY interface mode
now.

This patch fixes above two cases.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2020-02-20 18:06:57 +05:30
Grygorii Strashko
316b429459 phy: ti: gmii-sel: fix mac tx internal delay for rgmii-rxid
Now phy-gmii-sel will disable MAC TX internal delay for PHY interface mode
"rgmii-rxid" which is incorrect.
Hence, fix it by enabling MAC TX internal delay in the case of "rgmii-rxid"
mode.

Fixes: 92b58b3474 ("phy: ti: introduce phy-gmii-sel driver")
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-10-25 17:58:15 +05:30
Colin Ian King
1138a442a0 phy: ti: ensure priv is not null before dereferencing it
Currently priv is being dereferenced before priv is being null checked.
Fix this by moving the null check on priv before the dereference.

Detected by CoverityScan, CID#1476018 ("Dereference before null check")

Fixes: 92b58b3474 ("phy: ti: introduce phy-gmii-sel driver")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-01-16 18:00:54 +05:30
kbuild test robot
1a3a092706 phy: ti: fix semicolon.cocci warnings
drivers/phy/ti/phy-gmii-sel.c:91:2-3: Unneeded semicolon

 Remove unneeded semicolon.

Generated by: scripts/coccinelle/misc/semicolon.cocci

Fixes: 1811851f4e73 ("phy: ti: introduce phy-gmii-sel driver")
CC: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: kbuild test robot <fengguang.wu@intel.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12 10:01:52 +05:30
Grygorii Strashko
92b58b3474 phy: ti: introduce phy-gmii-sel driver
TI am335x/am437x/dra7(am5)/dm814x CPSW3G Ethernet Subsystem supports two
10/100/1000 Ethernet ports with selectable G/MII, RMII, and RGMII
interfaces. The interface mode is selected by configuring the MII mode
selection register(s) (GMII_SEL) in the System Control Module chapter
(SCM). GMII_SEL register(s) and bit fields placement in SCM are different
between SoCs while fields meaning is the same.

Historically CPSW external Port's interface mode selection configuration
was introduced using custom API and driver cpsw-phy-sel.c. This leads to
unnecessary driver, DT binding and custom API support effort.

This patch introduces CPSW Port's PHY Interface Mode selection Driver
(phy-gmii-sel) which implements standard Linux PHY interface and used
as a replacement for TI's specific driver cpsw-phy-sel.c and corresponding
custom API.

Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-12-12 10:01:40 +05:30