2 Commits

Author	SHA1	Message	Date
Niklas Cassel	610e128374	bindings: PCI: artpec: correct pci binding example ... - Increase config size. When using a PCIe switch, the previous config size only had room for one device. - Add bus range. Inherited optional property. - Map downstream I/O to PCI address 0. We can map it to any address, but let's be consistent with other drivers. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Rob Herring <robh@kernel.org>	2016-08-31 10:01:54 -05:00
Niklas Cassel	3f3f67cbf6	PCI: Add DT binding for Axis ARTPEC-6 PCIe controller ... Add the Device Tree binding documentation that allows to describe the PCIe controller found in the Axis ARTPEC-6 SoC. Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rob Herring <robh@kernel.org>	2016-06-11 12:35:20 -05:00