Commit Graph

1490 Commits

Author SHA1 Message Date
Nils Wallménius
438498a862 drm/amdgpu: Drop unused parameter for *get_sleep_divider_id_from_clock
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:24 -04:00
Nils Wallménius
354ef928a0 drm/amdgpu: Simplify calculation in *get_sleep_divider_id_from_clock
a / (1 << b) is equivalent to a >> b for unsigned values

Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:23 -04:00
Nils Wallménius
9887e425f9 drm/amdgpu: Use max macro in *get_sleep_divider_id_from_clock
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:23 -04:00
Nils Wallménius
859b8b6a27 drm/amd/powerplay: Use defined constants for minium engine clock
Replacing magic numbers in calculation of sleep divider id for fiji
and polaris.

Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:22 -04:00
Alex Deucher
f9fbac64eb drm/amdgpu: add missing licenses on a couple of files
Noticed by n1s on IRC.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:22 -04:00
Alex Deucher
7dae69a290 drm/amdgpu: fetch cu_info once at init
Fetch this info once at init and just store the results
for future requests.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:21 -04:00
Christian König
edf600dac6 drm/amd: cleanup remaining spaces and tabs v2
This is the result of running the following commands:
find drivers/gpu/drm/amd/ -name "*.h" -exec sed -i 's/[ \t]\+$//' {} \;
find drivers/gpu/drm/amd/ -name "*.c" -exec sed -i 's/[ \t]\+$//' {} \;
find drivers/gpu/drm/amd/ -name "*.h" -exec sed -i 's/ \+\t/\t/' {} \;
find drivers/gpu/drm/amd/ -name "*.c" -exec sed -i 's/ \+\t/\t/' {} \;

v2: drop changes to DAL and internal headers

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:20 -04:00
Christian König
b1c8a81fdd drm/amdgpu: remove define for reserved client ID
Just set it to zero instead.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:20 -04:00
Christian König
79aa03893d drm/amdgpu: remove owner cleanup v2
The client ID is now unique, so no need to resert the owner fields any more.

v2: remove unused variables as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com> (v1)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:19 -04:00
Christian König
0ea54b9b6c drm/amdgpu: make the VMID owner always 64bit
Otherwise we could (in theory) run into problems on 32bit systems.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:18 -04:00
Christian König
4d9c514d8c drm/amdgpu: two minor 80 char fixes
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:18 -04:00
Monk Liu
794ff5710e drm/amdgpu: hdp flush&inval should always do
This fixes Tonga vm-fault issue when running disaster
(a multiple context GL heavy tests),
We should always flush & invalidate hdp no matter vm
used or not.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-05-11 12:31:17 -04:00
Tom St Denis
f0f3a8fbdb drm/amd/amdgpu: Enable CG for UVD6 on Carrizo
Tested via vdpau/mpv.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:17 -04:00
Chunming Zhou
fe70766487 drm/amdgpu: add pipeline sync for compute job
hardware ring is async processed, the job is executed in parallel.
In some case, this will result vm fault, like jobs with different vmids.

This works around a CPC hw issue which will eventually be fixed in fw.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:16 -04:00
Monk Liu
c5637837ba drm/amdgpu: keep vm in job instead of ib (v2)
ib.vm is a legacy way to get vm, after scheduler
implemented vm should be get from job, and all ibs
from one job share the same vm, no need to keep ib.vm
just move vm field to job.

this patch as well add job as paramter to ib_schedule
so it can get vm from job->vm.

v2: agd: sqaush in:
drm/amdgpu: check if ring emit_vm_flush exists in vm flush

No vm flush on engines that don't support VM.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=95195

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:16 -04:00
Chunming Zhou
1f207f81e3 drm/amdgpu: make vmid owner be client_id
Using the pointer is not adequate.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:15 -04:00
Chunming Zhou
031e2983e8 drm/amdgpu: add client id for every vm
This adds a unique id for each vm client so we can
properly track them.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:14 -04:00
Chunming Zhou
444066b915 drm/amdgpu: fix wrong release of vmid owner
The release of the vmid owner was not handled
correctly.  We need to take the lock and walk
the lru list.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:14 -04:00
Dave Airlie
bafb86f5bc Linux 4.6-rc7
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Merge tag 'v4.6-rc7' into drm-next

Merge this back as we've built up a fair few conflicts, and I have
some newer trees to pull in.
2016-05-09 13:49:56 +10:00
Dave Airlie
ba391646d0 drm/amdgpu: fix build on aarch64.
Same fix went in previously for some other files.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-05-09 10:30:42 +10:00
Dave Airlie
a64424d722 Merge branch 'drm-next-4.7' of git://people.freedesktop.org/~agd5f/linux into drm-next
This is the first big radeon/amdgpu pull request for 4.7.  Highlights:
    - Polaris support in amdgpu
      Current display stack on par with other asics, for advanced features DAL is required
      Power management support
      Support for GFX, Compute, SDMA, UVD, VCE
    - VCE and UVD init/fini cleanup in radeon
    - GPUVM improvements
    - Scheduler improvements
    - Clockgating improvements
    - Powerplay improvements
    - TTM changes to support driver specific LRU update mechanism
    - Radeon support for new Mesa features
    - ASYNC pageflip support for radeon
    - Lots of bug fixes and code cleanups

* 'drm-next-4.7' of git://people.freedesktop.org/~agd5f/linux: (180 commits)
  drm/amdgpu: Replace rcu_assign_pointer() with RCU_INIT_POINTER()
  drm/amdgpu: use drm_mode_vrefresh() rather than mode->vrefresh
  drm/amdgpu/uvd6: add bypass support for fiji (v3)
  drm/amdgpu/fiji: set UVD CG state when enabling UVD DPM (v2)
  drm/powerplay: add missing clockgating callback for tonga
  drm/amdgpu: Constify some tables
  drm/amd/powerplay: Delete dead struct declaration
  drm/amd/powerplay/hwmgr: don't add invalid voltage
  drm/amd/powerplay/hwmgr: prevent VDDC from exceeding 2V
  MAINTAINERS: Remove unneded wildcard for the Radeon/AMDGPU drivers
  drm/radeon: add cayman VM support for append packet.
  drm/amd/amdgpu: Add debugfs entries for smc/didt/pcie
  drm/amd/amdgpu: Drop print_status callbacks.
  drm/amd/powerplay: revise reading/writing pptable on Polaris10
  drm/amd/powerplay: revise reading/writing pptable on Tonga
  drm/amd/powerplay: revise reading/writing pptable on Fiji
  drm/amd/powerplay: revise caching the soft pptable and add it's size
  drm/amd/powerplay: add dpm force multiple levels on cz/tonga/fiji/polaris (v2)
  drm/amd/powerplay: fix fan speed percent setting error on Polaris10
  drm/amd/powerplay: fix bug dpm can't work when resume back on Polaris
  ...
2016-05-06 14:17:22 +10:00
Muhammad Falak R Wani
84fae133f0 drm/amdgpu: Replace rcu_assign_pointer() with RCU_INIT_POINTER()
The rcu_assign_pointer() ensures that the initialization of a structure
is carried out before storing a pointer to that structre. It is always
safe to use RCU_INIT_POINTER() to NULL a pointer, instead of
rcu_assign_pointer().
This results in slightly smaller/faster code.

The following semantic patch was used:
<smpl>

@@
@@

- rcu_assign_pointer
+ RCU_INIT_POINTER
  (..., NULL)

</smpl>

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Muhammad Falak R Wani <falakreyaz@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:31:06 -04:00
Alex Deucher
6b8812eb00 drm/amdgpu: use drm_mode_vrefresh() rather than mode->vrefresh
This is a port of radeon commit:
3d2d98ee1a
drm/radeon: use drm_mode_vrefresh() rather than mode->vrefresh
to amdgpu.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-05-04 20:31:02 -04:00
Alex Deucher
a0cdef9e82 drm/amdgpu/uvd6: add bypass support for fiji (v3)
Handle uvd clock bypass settings as part of clockgating
setup.

v2: fix gate logic
v3: fix header include

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:30:57 -04:00
Alex Deucher
bdf1ecea3c drm/amdgpu/fiji: set UVD CG state when enabling UVD DPM (v2)
Need to call the IP cg callbacks.

v2: fix gate logic

Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:30:44 -04:00
Alex Deucher
ce90dbd9b8 drm/powerplay: add missing clockgating callback for tonga
Without this clockgating is not enabled.

Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:30:38 -04:00
Nils Wallménius
909a0631b1 drm/amdgpu: Constify some tables
Some more tables with constant data were added with the polaris support

v2: missed a few

Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:30:34 -04:00
Nils Wallménius
58174c2787 drm/amd/powerplay: Delete dead struct declaration
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:30:31 -04:00
Moritz Kühner
ac0cc35008 drm/amd/powerplay/hwmgr: don't add invalid voltage
if atomctrl_get_voltage_evv_on_sclk returns non zero (fail) in the expansion
of the PP_ASSERT_WITH_CODE macro the continue will actually do nothing
(The macro uses a do ... while(0) as scope, which eats the continue).
Based on the code I don't think this was the intent.
Unfortunately fixing this requires rewriting the control flow and
removing the macros.

v2: added signed of by
fixed error message print

v3: agd: drop DRM_ERROR

Signed-off-by: Moritz Kühner <kuehner.moritz@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:30:27 -04:00
Moritz Kühner
c790f87318 drm/amd/powerplay/hwmgr: prevent VDDC from exceeding 2V
If the tonga gpu is controlled by SVID2 tonga_get_evv_voltage will only print
an error if the voltage exceeds 2V although a comment clearly states that it
needs be less than 2V.

v2: added signed of by

Signed-off-by: Moritz Kühner <kuehner.moritz@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:30:24 -04:00
Tom St Denis
adcec288bc drm/amd/amdgpu: Add debugfs entries for smc/didt/pcie
This adds 3 new files that can be read/written to access
indirect GPU registers.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:30:11 -04:00
Tom St Denis
16a7989ac6 drm/amd/amdgpu: Drop print_status callbacks.
First patch in series to move to user mode
debug tools we're removing the print_status callbacks.

These functions were unused at the moment anyway.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:30:06 -04:00
Eric Huang
a72d5604ea drm/amd/powerplay: revise reading/writing pptable on Polaris10
Change the way we store pptables in the driver to better
facilitate eventual runtime updates for debugging.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:30:02 -04:00
Eric Huang
92dea67dd6 drm/amd/powerplay: revise reading/writing pptable on Tonga
Change the way we store pptables in the driver to better
facilitate eventual runtime updates for debugging.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:29:59 -04:00
Eric Huang
65ba4f227c drm/amd/powerplay: revise reading/writing pptable on Fiji
Change the way we store pptables in the driver to better
facilitate eventual runtime updates for debugging.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:29:55 -04:00
Eric Huang
1551019523 drm/amd/powerplay: revise caching the soft pptable and add it's size
This fixes a bug in the pptable access interface that could lead to
a crash.  Check the pointer before using it.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:29:52 -04:00
Eric Huang
5632708f44 drm/amd/powerplay: add dpm force multiple levels on cz/tonga/fiji/polaris (v2)
Allows you to force multiple levels rather than just one via the new
sysfs interrface.

v2: squash in:
drm/amd/powerplay: ensure clock level set by user is valid.
From Rex.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:29:47 -04:00
Eric Huang
5122438954 drm/amd/powerplay: fix fan speed percent setting error on Polaris10
The logic was reversed.

Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:29:43 -04:00
Eric Huang
681ed01c62 drm/amd/powerplay: fix bug dpm can't work when resume back on Polaris
Need to initialize the values to 0 since they get or'ed with additional
values.  If the initialization is missing, on resume, they may end up
with a combination of stale data and new data.

Fixes dpm on resume.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:29:39 -04:00
Rex Zhu
7d367c2aea drm/amd/powerplay: fix some initialize error on polaris10.
1. don't enable SclkThrottleLowNotification, it's not supported.
2. Set missing mclk_dpm0_activity_target

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:29:34 -04:00
Rex Zhu
7383bcb94a drm/amd/powerplay: return 0 when interface not implement on some asic.
Don't fail if certain optional interface callbacks are missing.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:29:27 -04:00
Mykola Lysenko
0b45541df3 drm/amdgpu: fix memory leak in CGS (FW info)
Previously requested FW pointer should not be
overwritten on a subsequent call.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Mykola Lysenko <Mykola.Lysenko@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:29:20 -04:00
Rex Zhu
b0d113453a drm/amd/powerplay: update vce power gate state for baffin.
Forgot to save the current gate state so we don't know
what the current state is if we try and gate/ungate the
block.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:29:15 -04:00
Eric Huang
c8c67448b7 drm/amd/powerplay: Fix a bug for enabling ACDC gpio interrupt
Only enable it if it's supported rather than unconitionally.

Signed-off-by: Eric Yang <eric.yang2@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:29:11 -04:00
Rex Zhu
dcf799e54b drm/amd/powerplay: fix issue that get wrong reference clock value.
use wrong parameter to compute the reference clock.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:29:07 -04:00
Rex Zhu
e16ff21d2a drm/amd/powerplay: parameter updates according to SMC.
Update to latest changes for SMC team.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:29:03 -04:00
Rex Zhu
9e26bbb36a drm/amd/powerplay: add fan control mode interface for baffin
Add interface for manual fan control.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:28:59 -04:00
Rex Zhu
f0911de82c drm/amd/powerplay: enable some feature for baffin/ellesmere. (v2)
Sync up with internal updates.

v2: squash in:
drm/amd/powerplay: set revert flag for enable thermal protect.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:28:53 -04:00
Rex Zhu
925a51c442 drm/amdgpu: code style refine.
Whitespace fix.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:28:50 -04:00
Alex Deucher
5f88567c62 drm/amd/powerplay: fix copy paste error in error message
Noticed-by: Vasily Anonimov <vasily.anonimov@googlemail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:28:44 -04:00
Slava Grigorev
ae17c999f0 drm/amd/amdgpu: fix 64-bit division
Signed-off-by: Slava Grigorev <slava.grigorev@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:28:37 -04:00
Flora Cui
f89510686c drm/amdgpu: add polaris10/11 smc fw declaration
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:28:33 -04:00
Rex Zhu
5de95e55de drm/amd/powerplay: Disable Spread Spectrum on DPM 0 on baffin as SPLL Shut Down feature is enabled.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Flora Cui <Flora.Cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:28:24 -04:00
Rex Zhu
2043f43e4b drm/amd/powerplay: enable set lowest mclk clock on baffin.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:28:19 -04:00
Rex Zhu
971f8daafa drm/amd/powrplay: fix issue that get wrong enable flag.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:28:13 -04:00
Rex Zhu
b4c6f99ee7 drm/amd/powerplay: fix mclk in high clock for baffin
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:28:08 -04:00
Rex Zhu
b2d9614318 drm/amd/powerplay: print gpu loading and uvd/vce power gate enablement for polaris10/11.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:28:02 -04:00
Flora Cui
2cc0c0b5cd drm/amdgpu: change ELM/BAF to Polaris10/Polaris11
Adjust to preferred code names.

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:27:57 -04:00
Flora Cui
a3ad7a9ad8 drm/amdgpu: add ELM/BAF pci ids
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:27:51 -04:00
Flora Cui
c0c1f579e6 drm/amdgpu: update the core VI support for ELM/BAF
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:27:45 -04:00
Flora Cui
c5a93a282f drm/amdgpu: ungate SMC clockgating first before suspend
46c34bcb6a15dd85329a39a5e72c62108626acdc put all block’s clockgating
support in SMC. The sequence in suspend routine should be adjusted
accordingly, otherwise it causes asic hang.

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:27:39 -04:00
Eric Huang
f4bfffddd7 drm/amd/amdgpu: add power gating init for Baffin
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:27:34 -04:00
Eric Huang
2b6cd97797 drm/amd/amdgpu: add power gating initialization support for GFX8.0
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:27:28 -04:00
Flora Cui
538333f0dc drm/amd/powerplay: add default clockgating handling
This is to workaround regression introduced in
46c34bcb6a15dd85329a39a5e72c62108626acdc. It should be reverted with a
final fix.

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:27:22 -04:00
Eric Huang
62a86fc234 drm/amd/amdgpu: add medium grain powergating support for Baffin
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:27:16 -04:00
Eric Huang
7df48927b2 drm/amd/powerplay: add GFX per cu powergating for Baffin
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:27:09 -04:00
Eric Huang
65f85e7d82 drm/amd/powerplay: add GFX per cu powergating support through SMU/powerplay
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:27:02 -04:00
Eric Huang
bacec8985f drm/amd/amdgpu: add query GFX cu info in CGS query system info
Needed for per CU powergating.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:26:55 -04:00
Eric Huang
8fe3d33307 drm/amd/powerplay: add GFX/SYS clockgating support for ELM/BAF
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:26:48 -04:00
Eric Huang
03e3905f21 drm/amd/powerplay: add all blocks clockgating support through SMU/powerplay
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:26:42 -04:00
yanyang1
e85c7d664d drm/amd/powerplay: update baffin & ellesmere smc_sk firmware.
sync the code form catalyst CL:#1230866.

Signed-off-by: yanyang1 <Young.Yang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:26:33 -04:00
yanyang1
a6ece7ffd9 drm/amd/powerplay: Add smc_sk firmware to baffin & ellesmere.
update relational h files.

Signed-off-by: yanyang1 <Young.Yang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:26:26 -04:00
yanyang1
735f002b14 drm/amd/amdgpu: Add smc_sk firmware in baffin & ellesmere.
add CGS_UCODE_ID_SMU_SK.

Signed-off-by: yanyang1 <Young.Yang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:26:19 -04:00
Eric Huang
92c6d645ee drm/amd/powerplay: add UVD&VCE DPM and powergating support for elm/baf
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:26:13 -04:00
Eric Huang
eede52627b drm/amd/powerplay: add thermal control for elm/baf
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:26:07 -04:00
Rex Zhu
0ff71753ef drm/amd/powerplay: enable powerplay for baffin.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:26:01 -04:00
Rex Zhu
b83c4ab9ca drm/amd/powerplay: init hwmgr for ELM/BAF
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:25:56 -04:00
Rex Zhu
a23eefa2f4 drm/amd/powerplay: enable dpm for baffin.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:25:50 -04:00
rezhu
c81726252e drm/amd/powerplay: add smu support for ellesmere/baffin
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:25:43 -04:00
rezhu
b304ac83ee drm/amd/powerplay: add header files for ellesmere smu manager.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:25:38 -04:00
Sonny Jiang
1b4eeea5f7 drm/amdgpu: add VCE support to ELM/BAF
Ellesmere and Baffin are VCE 3.4

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:25:29 -04:00
Sonny Jiang
38d7581764 drm/amdgpu: add UVD support for ELM/BAF
Ellesmere and Baffin are UVD 6.3

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:25:18 -04:00
Flora Cui
68182d909b drm/amdgpu: add GFX support for ELM/BAF
V2: use gfx_8_0_*.h instead of gfx_8_1_*.h
v3: agd: integrate support for gfx info table

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:25:11 -04:00
Flora Cui
d7120b8f22 drm/amdgpu: add mmRLC_CGCG_CGLS_CTRL_3D & mmRLC_CGCG_RAMP_CTRL_3D
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:25:02 -04:00
Alex Deucher
397a270eff drm/amdgpu: add an interface to get gfx constants from atombios
Fetch the values from atom rather than hardcoding them in the
driver.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:24:57 -04:00
Flora Cui
2cea03de10 drm/amdgpu: add SDMA support for ELM/BAF
V2: seperate baffin & ellesmere settings instead of using fiji ones.

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:24:50 -04:00
Flora Cui
60909285ef drm/amdgpu: add DCE golden setting for ELM/BAF
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:24:38 -04:00
Flora Cui
c9778572e9 drm/amdgpu: add GMC support for ELM/BAF
V2: add golden_settings_baffin_a11 instead of reuse golden_settings_fiji_a10

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:24:27 -04:00
Alex Deucher
b18e6ad781 drm/amdgpu/dce11: add dce clock setting for ELM/BAF
Setup the disp clock and dp reference clock.  This is
now a separate command table on elm/baf compared to
older asics.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-04 20:24:22 -04:00
Alex Deucher
22f0c5bd14 drm/amdgpu/dce11: update pll programming for ELM/BAF
SetPixelClock table handles pll divider calculation and
spread spectrum setup, so no need to use calculate the
dividers and call the ss enable cmd table.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-04 20:24:17 -04:00
Alex Deucher
927a81c98e drm/amdgpu: add ELM/BAF support to dce_v11_0_pick_pll (v2)
New PLL scheme on ELM/BAF.

v2: squash in pll fix.  Plls are part of the phys.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-04 20:24:13 -04:00
Alex Deucher
d031287a43 drm/amdgpu/atom: add support for new UNIPHYTransmitterContol cmd table
New uniphy transmitter setup table for elm/baf.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-04 20:24:08 -04:00
Alex Deucher
4b5844e8bf drm/amdgpu/atom: add support for new DIGxEncoderControl cmd table
New digital encoder setup table for elm/baf.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-04 20:24:04 -04:00
Alex Deucher
ee681c9aa2 drm/amdgpu/atom: add support for new SetPixelClock table
New version of the SetPixelClock table for elm/baf.  The
new table calculates the pll dividers and handles spread
spectrum calculations and setup.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-04 20:23:58 -04:00
Alex Deucher
541cd55557 drm/amdgpu/atom: add SetDCEClock helper
New cmd table for ELM/BAF for setting the dispclock or
dprefclock.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-04 20:23:53 -04:00
Alex Deucher
6e14e92b3d drm/amdgpu: update atombios.h (v2)
update to internal version 893

v2: Pull in gfx_info changes from 898

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-04 20:23:49 -04:00
Alex Deucher
2238445925 drm/amdgpu: bump the afmt limit for CZ, ST, Polaris
Fixes array overflow on these chips.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-05-04 20:23:43 -04:00
Alex Deucher
f195038c7e drm/amdgpu: use defines for CRTCs and AMFT blocks
Prerequiste for the next patch which ups the limits.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-05-04 20:23:35 -04:00
Alex Deucher
d525eb8d2e drm/amdgpu: add ELM/BAF DCE11 configs (v2)
Add support for the display configuration on elm/baf.

v2: add missing Stoney case

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-04 20:23:28 -04:00
Alex Deucher
b81223001f drm/amdgpu: add ELM/BAF asic types
New asic types for ellesmere and baffin.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2016-05-04 20:23:22 -04:00