Commit Graph

5 Commits

Author SHA1 Message Date
Linus Walleij
f30e49f129 gpio: tps65218: use the new open drain callback
The TPS65218 supports open drain mode on its three pins,
with one of them configurable also as push-pull. Use the
new .set_single_ended() callback to set this up properly
from the core, so the core actually see it can drive the
pin(s) as open drain, and does not attempt to emulate
open drain by switching the pin to an input.

Acked-by: Nicolas Saenz Julienne <nicolassaenzj@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-04-14 14:03:25 +02:00
Linus Walleij
0a7439ef75 gpio: tps65218: remove unused #include
Just as it says: after adding the proper interfaces to gpiolib,
this is no longer needed.

Suggested-by: Nicolas Saenz Julienne <nicolassaenzj@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-19 09:22:41 +01:00
Axel Lin
818cc6a5f8 gpio: tps65218: Make tps65218_gpio_output set proper output level
The .direction_output callback should set proper output level.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-16 15:58:32 +01:00
Linus Walleij
143b65d677 gpio: create an API to detect open drain/source on lines
My left hand merges code to privatize the descriptor handling
while my right hand merges drivers that poke around and
disrespect with the same gpiolib internals.

So let's expose the proper APIs for drivers to ask the gpiolib
core if a line is marked as open drain or open source and
get some order around things so this driver compiles again.

Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Nicolas Saenz Julienne <nicolassaenzj@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-16 15:41:42 +01:00
Nicolas Saenz Julienne
c366c76a2c gpio: add tps65218 gpio
Driver for the GPIO block found in ti's tps65218 pmics.

The device has two GPIOs and one GPO pin which can be configured as follows:
GPIO1:
	-general-purpose, open-drain output controlled by GPO1 user bit and/or
	 sequencer
	-DDR3 reset input signal from SOC. Signal is either latched or
	 passed-trough to GPO2 pin. See below for details.
GPO2:
	-general-purpose output controlled by GPO2 user bit
	-DDR3 reset output signal. Signal is controlled by GPIO1 and PGOOD.
	 See below for details.
	-Output buffer can be configured as open-drain or push-pull.
GPIO3:
	-general-purpose, open-drain output controlled by GPO3 user bit and/or
	 sequencer
	-reset input-signal for DCDC1 and DCDC2.

The input configurations are not meant to be used by the user so the driver
only offers GPOs.

v2: Added request routine that evaluates the fw config flags and removed module
    owner
v3: Added .direction_input() routine, and took care of all Linus Walleij
suggestions (clamp to bool, use proper include)

Signed-off-by: Nicolas Saenz Julienne <nicolassaenzj@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-11 12:25:16 +01:00