Change details:
This patch contains additional structure and function definition changes
that are required to enable the new msgq/enet/txrx redesign introduced
by the previous 4 patches.
- structure and function definition changes to header files as a result
of Ethport, Enet, IOCEth, Tx, Rx redesign.
- ethtool changes to use new enet function and definitions
- Set number of Tx and Rx queues bassed on underlying hardware. Define
separate macros for maximum and supported numbers of Tx and Rx queues
based on underlying hardware. Take VLAN header into account for MTU
calculation. Default to INTx mode when pci_enable_msix() fails. Set a
bit in Rx poll routine, check and wait for that bit to be cleared in
the cleanup routine before proceeding.
- The TX and Rx coalesce settings are programmed in steps of 5 us. The value
that are not divisible by 5 are rounded to the next lower number. This was
causing the value os 1 to 4 to be rounded to 0, which is an invalid setting.
When creating Rx and Tx object, we are currently assigning the default
values of Rx and Tx coalescing_timeo. If these values are changed in the
driver to a different value, the change is lost during such operations as
MTU change. In order to avoid that, pass the configured value of
coalescing_timeo before Rx and Tx object creation. Fix
bnad_tx_coalescing_timeo_set() so it applies to all the Tx objects.
- Reorg uninitialization path in case of pci_probe failure.
- Hardware clock setup changes to pass asic generation, port modes and
asic mode as part firmware boot parameters to firmware.
- FW mailbox interface changes to defined asic specific mailbox interfaces.
h/w mailbox interfaces take 8-bit FIDs and 2-bit port id for owner. Cleaned
up mailbox definitions and usage for new and old HW. Eliminated usage of
ASIC ID. MSI-X vector assignment and programming done by firmware. Fixed
host offsets for CPE/RME queue registers.
- Implement polling mechanism for FW ready to have poll mechanism replaces
the current interrupt based FW READY method. The timer based poll routine
in IOC will query the ioc_fwstate register to see if there is a state
change in FW, and sends the READY event. Removed infrastructure needed to
support mbox READY event from fw as well as IOC code.
- Move FW init to HW init. Handle the case where PCI mapping goes away when
IOCPF state machine is waiting for semaphore.
- Add IOC mbox call back to client indicating that the command is sent.
Signed-off-by: Rasesh Mody <rmody@brocade.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Change details:
- Add new file bna_hw_defs.h to support new code MSGQ, ENET and TX RX redign.
This makes bna_hw.h obsolete and is removed in a later patch. bna_hw_defs.h
removes all unused HW register definition that were part of bna_hw.h.
Signed-off-by: Rasesh Mody <rmody@brocade.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Change details:
- This patch contains the changes as a result of redesigning of Tx, Rx data
path setup. In the old design, setting up Txqs, Rxqs were done in the driver.
With the new design, most of the hardware setup steps for the Txq, Rxqs are
moved to FW. Host driver issues commands to FW through the message queue to
setup/teardown tx, rx data path. FW performs necessary steps and responds
back to the driver with a status.
- As a result of this redesign, the state machine implementation for Tx, Rx
objects have changed significantly. Instead of doing the raw register access,
these state machines mostly send a command to FW and wait for response and
take the next action. In addition to tx, rx datapath setup, this patch also
deals with rx filter configuration - such as unicast address, multicast
address, vlan filter, promiscuous mode etc.
Signed-off-by: Rasesh Mody <rmody@brocade.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Change details:
- This patch contains the messages, opcodes and structure format for the
messages and responses exchanged between driver and the FW. In addition
this patch contains the state machine implementation for Ethport, Enet,
IOCEth.
- Ethport object is responsible for receiving link state events, sending
port enable/disable commands to FW.
- Enet object is responsible for synchronizing initialization/teardown of
tx & rx datapath configuration.
- IOCEth object is responsible for init/un-init of IO Controller in the
adapter which runs the FW.
- This patch also contains code for initialization and resource assignment
for Ethport, Enet, IOCEth, Tx, Rx objects.
Signed-off-by: Rasesh Mody <rmody@brocade.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Change details:
- Currently modules communicate with the FW using 32 byte command and
response register. This limits the size of the command and response
messages exchanged with the FW to 32 bytes. We need a mechanism to
exchange the comamnds and responses exchange with FW that exceeds 32 bytes.
- MSGQ implementation provides that facility. It removes the assumption that
command/response queue size is precisely calculated to accommodate all
concurrent FW commands/responses. The queue depth is made variable now, defined
by a macro. A waiting command list is implemented to hold all the commands
when there is no place in the command queue. Callback is implemented for
each command entry to invoke the module posting the command, when there is
space in the command queue and the command was finally posted to the queue.
Module/Object information is embedded in the response for tracking purpose.
Signed-off-by: Rasesh Mody <rmody@brocade.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Moves the Brocade driver into drivers/net/ethernet/brocade/ and make
the necessary Kconfig and Makefile changes.
CC: Rasesh Mody <rmody@brocade.com>
CC: Debashis Dutt <ddutt@brocade.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
