2 Commits

Author	SHA1	Message	Date
Marc Zyngier	b6ca556c35	irqchip/apple-aic: Advertise some level of vGICv3 compatibility ... The CPUs in the Apple M1 SoC partially implement a virtual GICv3 CPU interface, although one that is incapable of HW deactivation of interrupts, nor masking the maintenance interrupt. Advertise the support to KVM. Signed-off-by: Marc Zyngier <maz@kernel.org>	2021-06-01 10:46:01 +01:00
Hector Martin	76cde26394	irqchip/apple-aic: Add support for the Apple Interrupt Controller ... This is the root interrupt controller used on Apple ARM SoCs such as the M1. This irqchip driver performs multiple functions: * Handles both IRQs and FIQs * Drives the AIC peripheral itself (which handles IRQs) * Dispatches FIQs to downstream hard-wired clients (currently the ARM timer). * Implements a virtual IPI multiplexer to funnel multiple Linux IPIs into a single hardware IPI Reviewed-by: Marc Zyngier <maz@kernel.org> Acked-by: Will Deacon <will@kernel.org> Signed-off-by: Hector Martin <marcan@marcan.st>	2021-04-08 20:18:41 +09:00