drm/i915/bxt: fix panel fitter setup in crtc disable/enable
Broxton has the same panel fitter registers as Skylake. v2: - add MISSING_CASE for future platforms (daniel) Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Sagar Kamble <sagar.a.kamble@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -4881,10 +4881,12 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
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intel_ddi_enable_pipe_clock(intel_crtc);
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if (IS_SKYLAKE(dev))
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if (INTEL_INFO(dev)->gen == 9)
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skylake_pfit_update(intel_crtc, 1);
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else
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else if (INTEL_INFO(dev)->gen < 9)
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ironlake_pfit_enable(intel_crtc);
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else
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MISSING_CASE(INTEL_INFO(dev)->gen);
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/*
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* On ILK+ LUT must be loaded before the pipe is running but with
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@ -5029,10 +5031,12 @@ static void haswell_crtc_disable(struct drm_crtc *crtc)
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intel_ddi_disable_transcoder_func(dev_priv, cpu_transcoder);
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if (IS_SKYLAKE(dev))
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if (INTEL_INFO(dev)->gen == 9)
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skylake_pfit_update(intel_crtc, 0);
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else
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else if (INTEL_INFO(dev)->gen < 9)
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ironlake_pfit_disable(intel_crtc);
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else
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MISSING_CASE(INTEL_INFO(dev)->gen);
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intel_ddi_disable_pipe_clock(intel_crtc);
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@ -9191,10 +9195,13 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
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pfit_domain = POWER_DOMAIN_PIPE_PANEL_FITTER(crtc->pipe);
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if (intel_display_power_is_enabled(dev_priv, pfit_domain)) {
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if (IS_SKYLAKE(dev))
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if (INTEL_INFO(dev)->gen == 9)
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skylake_get_pfit_config(crtc, pipe_config);
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else
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else if (INTEL_INFO(dev)->gen < 9)
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ironlake_get_pfit_config(crtc, pipe_config);
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else
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MISSING_CASE(INTEL_INFO(dev)->gen);
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} else {
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pipe_config->scaler_state.scaler_id = -1;
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pipe_config->scaler_state.scaler_users &= ~(1 << SKL_CRTC_INDEX);
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