arm64: dts: imx8mq-librem5: describe the selfie cam
Enable the CSI1 MIPI RX controller and CSI1 bridge on the SoC. Describe the Librem 5 front-facing camera, connected to the CSI1 MIPI. the following sets formats, streams 10 frames and saves one: #!/bin/bash WIDTH=1632 HEIGHT=1224 SKIP=10 media-ctl -d "platform:30a90000.csi" --set-v4l2 "'csi':0 [fmt:SGBRG10/${WIDTH}x${HEIGHT} colorspace:raw]" media-ctl -d "platform:30a90000.csi" --set-v4l2 "'imx8mq-mipi-csi2 30a70000.csi':0 [fmt:SGBRG10/${WIDTH}x${HEIGHT} colorspace:raw]" media-ctl -d "platform:30a90000.csi" --set-v4l2 "'hi846 2-0020':0 [fmt:SGBRG10/${WIDTH}x${HEIGHT} colorspace:raw]" media-ctl -d "platform:30a90000.csi" -l "'hi846 2-0020':0 -> 'imx8mq-mipi-csi2 30a70000.csi':0 [1]" v4l2-ctl -d "/dev/v4l/by-path/platform-30a90000.csi-video-index0" --set-fmt-video=width=${WIDTH},height=${HEIGHT},pixelformat=GB16 --stream-mmap --stream-to=$WIDTH.raw --stream-skip=$SKIP --stream-count=1 Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -272,6 +272,10 @@
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cpu-supply = <&buck2_reg>;
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};
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&csi1 {
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status = "okay";
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};
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&ddrc {
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operating-points-v2 = <&ddrc_opp_table>;
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@ -1007,6 +1011,31 @@
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>;
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};
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camera_front: camera@20 {
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compatible = "hynix,hi846";
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reg = <0x20>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_csi1>;
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clocks = <&clk IMX8MQ_CLK_CLKO2>;
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assigned-clocks = <&clk IMX8MQ_CLK_CLKO2>;
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assigned-clock-rates = <25000000>;
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reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
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vdda-supply = <®_vcam_2v8>;
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vddd-supply = <®_vcam_1v2>;
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vddio-supply = <®_csi_1v8>;
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rotation = <90>;
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orientation = <0>;
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port {
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camera1_ep: endpoint {
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data-lanes = <1 2>;
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link-frequencies = /bits/ 64
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<80000000 200000000 300000000>;
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remote-endpoint = <&mipi1_sensor_ep>;
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};
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};
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};
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backlight@36 {
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compatible = "ti,lm36922";
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reg = <0x36>;
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@ -1080,6 +1109,23 @@
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status = "okay";
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};
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&mipi_csi1 {
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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ports {
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port@1 {
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reg = <1>;
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mipi1_sensor_ep: endpoint {
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remote-endpoint = <&camera1_ep>;
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data-lanes = <1 2>;
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};
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};
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};
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};
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&mipi_dsi {
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#address-cells = <1>;
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#size-cells = <0>;
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