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intel-pinctrl for v5.18-2

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* Fix the register offsets for Alder Lake-N
 
 The following is an automated git shortlog grouped by driver:
 
 alderlake:
  -  Fix register offsets for ADL-N variant
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEqaflIX74DDDzMJJtb7wzTHR8rCgFAmJUNjwACgkQb7wzTHR8
 rChdRQ//TDMlDqgkAE7BdU/eOrby/WoCSn5lvySb1OLFTnJDA/IlLSXtesOtGgSH
 1F3enXefs5KiyIzPJ7XGJZTy6noyZgZzhujHzX5BOhyyVtKusi8fYxuXM5291kKu
 pM72EdJ0gK0jil+sDro77mJkaWoXOHkMnC0VoKtHb9LhAtsD5wO/fZgTzTsA7FQu
 UDga4IITKuPl/tcQiVne4mT9mU1wR8Ml8MMvdY4Kl47YB776PW1ThaIgJqiJV4lq
 vPDF2E6Si/V3SNbVTyeLiwpSLu8iOAvPM1IJXftcaUeVOp+zKjA/Fu+WxtNissBt
 MsUOgSwxYRwtsq0ef3yUWXyYEvWB3YzDPqmxrjdEWR8/oDzM/HJMSQ44SisJobUv
 Gyyg+kOcYdpzY6pKrZTwEctCTaJuk42KB9ibV2QJS+pwxDtb7jjUo2XiIY8CrdwV
 ImLVfXWBBdOfqMlafhFfkg6wicppmVeSqrLlgdnUSRFR23f0LtR3mf23WEd10Esl
 HtnNsMOyBC1kKEwlVTdNY/AGYy3HUOhXt98ylwTf0UDNVO2mnxqDImyj/BQLc50u
 d9PL0ZBifhUvY4fxt+yTzU2gvi90nmvbC/4NRYwMl5iOSyR7J4okEYReRMLlMFRA
 kJeEN8N0OSR2J1Y2BnMhjfENl4jL+VIkjOFBBjwxA4f2Aj94/Yc=
 =XRon
 -----END PGP SIGNATURE-----

Merge tag 'intel-pinctrl-v5.18-2' of gitolite.kernel.org:pub/scm/linux/kernel/git/pinctrl/intel into fixes

intel-pinctrl for v5.18-2

* Fix the register offsets for Alder Lake-N

The following is an automated git shortlog grouped by driver:

alderlake:
 -  Fix register offsets for ADL-N variant
This commit is contained in:
Linus Walleij 2022-04-18 00:59:45 +02:00
commit fda4d7e776
1 changed files with 40 additions and 20 deletions

60
drivers/pinctrl/intel/pinctrl-alderlake.c
View File

@ -14,11 +14,17 @@
#include "pinctrl-intel.h"
#define ADL_PAD_OWN 0x0a0
#define ADL_PADCFGLOCK 0x110
#define ADL_HOSTSW_OWN 0x150
#define ADL_GPI_IS 0x200
#define ADL_GPI_IE 0x220
#define ADL_N_PAD_OWN 0x020
#define ADL_N_PADCFGLOCK 0x080
#define ADL_N_HOSTSW_OWN 0x0b0
#define ADL_N_GPI_IS 0x100
#define ADL_N_GPI_IE 0x120
#define ADL_S_PAD_OWN 0x0a0
#define ADL_S_PADCFGLOCK 0x110
#define ADL_S_HOSTSW_OWN 0x150
#define ADL_S_GPI_IS 0x200
#define ADL_S_GPI_IE 0x220
#define ADL_GPP(r, s, e, g) \
{ \
@ -28,14 +34,28 @@
.gpio_base = (g), \
}
#define ADL_COMMUNITY(b, s, e, g) \
#define ADL_N_COMMUNITY(b, s, e, g) \
{ \
.barno = (b), \
.padown_offset = ADL_PAD_OWN, \
.padcfglock_offset = ADL_PADCFGLOCK, \
.hostown_offset = ADL_HOSTSW_OWN, \
.is_offset = ADL_GPI_IS, \
.ie_offset = ADL_GPI_IE, \
.padown_offset = ADL_N_PAD_OWN, \
.padcfglock_offset = ADL_N_PADCFGLOCK, \
.hostown_offset = ADL_N_HOSTSW_OWN, \
.is_offset = ADL_N_GPI_IS, \
.ie_offset = ADL_N_GPI_IE, \
.pin_base = (s), \
.npins = ((e) - (s) + 1), \
.gpps = (g), \
.ngpps = ARRAY_SIZE(g), \
}
#define ADL_S_COMMUNITY(b, s, e, g) \
{ \
.barno = (b), \
.padown_offset = ADL_S_PAD_OWN, \
.padcfglock_offset = ADL_S_PADCFGLOCK, \
.hostown_offset = ADL_S_HOSTSW_OWN, \
.is_offset = ADL_S_GPI_IS, \
.ie_offset = ADL_S_GPI_IE, \
.pin_base = (s), \
.npins = ((e) - (s) + 1), \
.gpps = (g), \
@ -342,10 +362,10 @@ static const struct intel_padgroup adln_community5_gpps[] = {
};
static const struct intel_community adln_communities[] = {
ADL_COMMUNITY(0, 0, 66, adln_community0_gpps),
ADL_COMMUNITY(1, 67, 168, adln_community1_gpps),
ADL_COMMUNITY(2, 169, 248, adln_community4_gpps),
ADL_COMMUNITY(3, 249, 256, adln_community5_gpps),
ADL_N_COMMUNITY(0, 0, 66, adln_community0_gpps),
ADL_N_COMMUNITY(1, 67, 168, adln_community1_gpps),
ADL_N_COMMUNITY(2, 169, 248, adln_community4_gpps),
ADL_N_COMMUNITY(3, 249, 256, adln_community5_gpps),
};
static const struct intel_pinctrl_soc_data adln_soc_data = {
@ -713,11 +733,11 @@ static const struct intel_padgroup adls_community5_gpps[] = {
};
static const struct intel_community adls_communities[] = {
ADL_COMMUNITY(0, 0, 94, adls_community0_gpps),
ADL_COMMUNITY(1, 95, 150, adls_community1_gpps),
ADL_COMMUNITY(2, 151, 199, adls_community3_gpps),
ADL_COMMUNITY(3, 200, 269, adls_community4_gpps),
ADL_COMMUNITY(4, 270, 303, adls_community5_gpps),
ADL_S_COMMUNITY(0, 0, 94, adls_community0_gpps),
ADL_S_COMMUNITY(1, 95, 150, adls_community1_gpps),
ADL_S_COMMUNITY(2, 151, 199, adls_community3_gpps),
ADL_S_COMMUNITY(3, 200, 269, adls_community4_gpps),
ADL_S_COMMUNITY(4, 270, 303, adls_community5_gpps),
};
static const struct intel_pinctrl_soc_data adls_soc_data = {