forked from Minki/linux
Fixes for omaps that were not considered urgent enough for the
rc series. Mostly a fix for GPMC allocation and omap5 ABB (Adaptive Body Bias). -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJT0PLHAAoJEBvUPslcq6VzVicQANRgbrIUKCHiYvi2ngRafAzT JrJ6xDn1Z9gQSXErlc1syxrH8YFZuNth+jGBs+yvZ+kN5kh6vCXk34MANxxv/IjO Qkm3qAjpEwGlzeW9LKwGfA9vqcnvbNJtf+xXXsaS6vB4Eac2epBjNF1aRLHqUN1n x3buaT7otHNUYzDts5mEPkF1W8ZmmyROvcdedAYaM5wayGK/7ETO7oto4l2l9h39 rsPKX5IL+L36EDCbz45FlmiRf5jXZhR80vfcC9wR1I6om8jov4KZTPTapoSGvaxg 17UaZ2RzMvTbapUJ8kRH7fGt43GPqGO9tqxTzUEXyf1IwP6BhPmVNXNCPWlSbcGn 6zATw4DtKtqEDGu3eOLEvo5yb2QydrC3p9CIl7cmVqRECCBSEtHcoQ8pbGeMCzOP XPaCw3TKJe5lzAqVqGcgryq7NnzhzvAzLW3MfDvSq5nsYbr8bkvv+6RqyZ7RpY7Q sv0pROA1Niwi8XyGeFMvh+NB2MtmPXRbV4if0SeKwZAxWIvUk+RXejxyhP7WEqCe MiUUx/tYjzDi8wjL6BqT7elpjPizR3jy1iuevmTUdsTK6Ks5QcCSwXtlKwr/VzbA pn4u5ylclXcOuR2EOdPwjTk3++HXvDGKZtRhyjFIf6dnQB/ThJs+5yF1QrWvkiD1 alomdF9oL2wy4cf4dOLA =nbzr -----END PGP SIGNATURE----- Merge tag 'omap-for-v3.17/fixes-not-urgent-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/fixes-non-critical Merge non-urgent omap fixes from Tony Lindgren: Fixes for omaps that were not considered urgent enough for the rc series. Mostly a fix for GPMC allocation and omap5 ABB (Adaptive Body Bias). * tag 'omap-for-v3.17/fixes-not-urgent-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: omap2+: gpmc-nand: Use dynamic platform_device_alloc() omap16xx: Removes fixme no longer needed in ocpi_enable() ARM: dts: OMAP5: Add device nodes for ABB ARM: omap2+: usb-tusb6010.c: Cleaning up variable is set more than once Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
fd9f5edf6e
@ -985,6 +985,66 @@
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dma-names = "audio_tx";
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};
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};
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abb_mpu: regulator-abb-mpu {
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compatible = "ti,abb-v2";
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regulator-name = "abb_mpu";
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#address-cells = <0>;
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#size-cells = <0>;
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clocks = <&sys_clkin>;
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ti,settling-time = <50>;
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ti,clock-cycles = <16>;
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reg = <0x4ae07cdc 0x8>, <0x4ae06014 0x4>,
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<0x4a0021c4 0x8>, <0x4ae0c318 0x4>;
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reg-names = "base-address", "int-address",
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"efuse-address", "ldo-address";
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ti,tranxdone-status-mask = <0x80>;
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/* LDOVBBMPU_MUX_CTRL */
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ti,ldovbb-override-mask = <0x400>;
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/* LDOVBBMPU_VSET_OUT */
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ti,ldovbb-vset-mask = <0x1F>;
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/*
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* NOTE: only FBB mode used but actual vset will
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* determine final biasing
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*/
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ti,abb_info = <
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/*uV ABB efuse rbb_m fbb_m vset_m*/
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1060000 0 0x0 0 0x02000000 0x01F00000
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1250000 0 0x4 0 0x02000000 0x01F00000
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>;
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};
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abb_mm: regulator-abb-mm {
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compatible = "ti,abb-v2";
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regulator-name = "abb_mm";
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#address-cells = <0>;
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#size-cells = <0>;
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clocks = <&sys_clkin>;
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ti,settling-time = <50>;
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ti,clock-cycles = <16>;
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reg = <0x4ae07ce4 0x8>, <0x4ae06010 0x4>,
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<0x4a0021a4 0x8>, <0x4ae0c314 0x4>;
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reg-names = "base-address", "int-address",
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"efuse-address", "ldo-address";
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ti,tranxdone-status-mask = <0x80000000>;
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/* LDOVBBMM_MUX_CTRL */
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ti,ldovbb-override-mask = <0x400>;
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/* LDOVBBMM_VSET_OUT */
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ti,ldovbb-vset-mask = <0x1F>;
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/*
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* NOTE: only FBB mode used but actual vset will
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* determine final biasing
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*/
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ti,abb_info = <
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/*uV ABB efuse rbb_m fbb_m vset_m*/
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1025000 0 0x0 0 0x02000000 0x01F00000
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1120000 0 0x4 0 0x02000000 0x01F00000
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>;
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};
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};
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};
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@ -55,7 +55,6 @@ static struct clk *ocpi_ck;
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/*
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* Enables device access to OMAP buses via the OCPI bridge
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* FIXME: Add locking
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*/
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int ocpi_enable(void)
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{
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@ -24,25 +24,6 @@
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/* minimum size for IO mapping */
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#define NAND_IO_SIZE 4
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static struct resource gpmc_nand_resource[] = {
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{
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.flags = IORESOURCE_MEM,
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},
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{
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.flags = IORESOURCE_IRQ,
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},
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{
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device gpmc_nand_device = {
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.name = "omap2-nand",
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.id = 0,
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.num_resources = ARRAY_SIZE(gpmc_nand_resource),
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.resource = gpmc_nand_resource,
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};
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static bool gpmc_hwecc_bch_capable(enum omap_ecc ecc_opt)
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{
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/* platforms which support all ECC schemes */
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@ -93,43 +74,41 @@ int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data,
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{
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int err = 0;
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struct gpmc_settings s;
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struct device *dev = &gpmc_nand_device.dev;
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struct platform_device *pdev;
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struct resource gpmc_nand_res[] = {
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{ .flags = IORESOURCE_MEM, },
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{ .flags = IORESOURCE_IRQ, },
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{ .flags = IORESOURCE_IRQ, },
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};
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memset(&s, 0, sizeof(struct gpmc_settings));
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gpmc_nand_device.dev.platform_data = gpmc_nand_data;
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BUG_ON(gpmc_nand_data->cs >= GPMC_CS_NUM);
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err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE,
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(unsigned long *)&gpmc_nand_resource[0].start);
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(unsigned long *)&gpmc_nand_res[0].start);
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if (err < 0) {
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dev_err(dev, "Cannot request GPMC CS %d, error %d\n",
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gpmc_nand_data->cs, err);
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pr_err("omap2-gpmc: Cannot request GPMC CS %d, error %d\n",
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gpmc_nand_data->cs, err);
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return err;
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}
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gpmc_nand_resource[0].end = gpmc_nand_resource[0].start +
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NAND_IO_SIZE - 1;
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gpmc_nand_resource[1].start =
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gpmc_get_client_irq(GPMC_IRQ_FIFOEVENTENABLE);
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gpmc_nand_resource[2].start =
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gpmc_get_client_irq(GPMC_IRQ_COUNT_EVENT);
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gpmc_nand_res[0].end = gpmc_nand_res[0].start + NAND_IO_SIZE - 1;
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gpmc_nand_res[1].start = gpmc_get_client_irq(GPMC_IRQ_FIFOEVENTENABLE);
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gpmc_nand_res[2].start = gpmc_get_client_irq(GPMC_IRQ_COUNT_EVENT);
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if (gpmc_t) {
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err = gpmc_cs_set_timings(gpmc_nand_data->cs, gpmc_t);
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if (err < 0) {
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dev_err(dev, "Unable to set gpmc timings: %d\n", err);
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pr_err("omap2-gpmc: Unable to set gpmc timings: %d\n", err);
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return err;
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}
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}
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memset(&s, 0, sizeof(struct gpmc_settings));
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if (gpmc_nand_data->of_node)
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gpmc_read_settings_dt(gpmc_nand_data->of_node, &s);
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else
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gpmc_set_legacy(gpmc_nand_data, &s);
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s.device_nand = true;
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err = gpmc_cs_program_settings(gpmc_nand_data->cs, &s);
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if (err < 0)
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goto out_free_cs;
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@ -141,18 +120,34 @@ int gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data,
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gpmc_update_nand_reg(&gpmc_nand_data->reg, gpmc_nand_data->cs);
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if (!gpmc_hwecc_bch_capable(gpmc_nand_data->ecc_opt)) {
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dev_err(dev, "Unsupported NAND ECC scheme selected\n");
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return -EINVAL;
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pr_err("omap2-nand: Unsupported NAND ECC scheme selected\n");
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err = -EINVAL;
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goto out_free_cs;
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}
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err = platform_device_register(&gpmc_nand_device);
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if (err < 0) {
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dev_err(dev, "Unable to register NAND device\n");
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goto out_free_cs;
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pdev = platform_device_alloc("omap2-nand", gpmc_nand_data->cs);
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if (pdev) {
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err = platform_device_add_resources(pdev, gpmc_nand_res,
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ARRAY_SIZE(gpmc_nand_res));
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if (!err)
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pdev->dev.platform_data = gpmc_nand_data;
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} else {
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err = -ENOMEM;
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}
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if (err)
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goto out_free_pdev;
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err = platform_device_add(pdev);
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if (err) {
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dev_err(&pdev->dev, "Unable to register NAND device\n");
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goto out_free_pdev;
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}
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return 0;
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out_free_pdev:
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platform_device_put(pdev);
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out_free_cs:
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gpmc_cs_free(gpmc_nand_data->cs);
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@ -95,7 +95,6 @@ static int tusb_set_sync_mode(unsigned sysclk_ps)
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dev_t.t_avdp_w = t_scsnh_advnh;
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dev_t.cyc_aavdh_we = 3;
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dev_t.cyc_wpl = 6;
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dev_t.t_ce_rdyz = 7000;
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gpmc_calc_timings(&t, &tusb_sync, &dev_t);
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