crypto: x86/aesni-xctr - Add accelerated implementation of XCTR
Add hardware accelerated version of XCTR for x86-64 CPUs with AESNI support. More information on XCTR can be found in the HCTR2 paper: "Length-preserving encryption with HCTR2": https://eprint.iacr.org/2021/1441.pdf Signed-off-by: Nathan Huckleberry <nhuck@google.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Eric Biggers <ebiggers@google.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Nathan Huckleberry
Herbert Xu
parent
7ff554ced7
commit
fd94fcf099
@ -23,6 +23,11 @@
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#define VMOVDQ vmovdqu
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/*
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* Note: the "x" prefix in these aliases means "this is an xmm register". The
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* alias prefixes have no relation to XCTR where the "X" prefix means "XOR
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* counter".
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*/
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#define xdata0 %xmm0
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#define xdata1 %xmm1
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#define xdata2 %xmm2
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@ -31,8 +36,10 @@
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#define xdata5 %xmm5
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#define xdata6 %xmm6
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#define xdata7 %xmm7
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#define xcounter %xmm8
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#define xbyteswap %xmm9
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#define xcounter %xmm8 // CTR mode only
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#define xiv %xmm8 // XCTR mode only
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#define xbyteswap %xmm9 // CTR mode only
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#define xtmp %xmm9 // XCTR mode only
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#define xkey0 %xmm10
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#define xkey4 %xmm11
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#define xkey8 %xmm12
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@ -45,7 +52,7 @@
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#define p_keys %rdx
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#define p_out %rcx
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#define num_bytes %r8
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#define counter %r9 // XCTR mode only
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#define tmp %r10
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#define DDQ_DATA 0
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#define XDATA 1
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@ -102,7 +109,7 @@ ddq_add_8:
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* do_aes num_in_par load_keys key_len
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* This increments p_in, but not p_out
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*/
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.macro do_aes b, k, key_len
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.macro do_aes b, k, key_len, xctr
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.set by, \b
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.set load_keys, \k
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.set klen, \key_len
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@ -111,29 +118,48 @@ ddq_add_8:
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vmovdqa 0*16(p_keys), xkey0
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.endif
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vpshufb xbyteswap, xcounter, xdata0
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.set i, 1
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.rept (by - 1)
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club XDATA, i
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vpaddq (ddq_add_1 + 16 * (i - 1))(%rip), xcounter, var_xdata
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vptest ddq_low_msk(%rip), var_xdata
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jnz 1f
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vpaddq ddq_high_add_1(%rip), var_xdata, var_xdata
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vpaddq ddq_high_add_1(%rip), xcounter, xcounter
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1:
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vpshufb xbyteswap, var_xdata, var_xdata
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.set i, (i +1)
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.endr
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.if \xctr
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movq counter, xtmp
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.set i, 0
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.rept (by)
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club XDATA, i
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vpaddq (ddq_add_1 + 16 * i)(%rip), xtmp, var_xdata
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.set i, (i +1)
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.endr
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.set i, 0
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.rept (by)
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club XDATA, i
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vpxor xiv, var_xdata, var_xdata
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.set i, (i +1)
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.endr
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.else
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vpshufb xbyteswap, xcounter, xdata0
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.set i, 1
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.rept (by - 1)
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club XDATA, i
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vpaddq (ddq_add_1 + 16 * (i - 1))(%rip), xcounter, var_xdata
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vptest ddq_low_msk(%rip), var_xdata
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jnz 1f
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vpaddq ddq_high_add_1(%rip), var_xdata, var_xdata
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vpaddq ddq_high_add_1(%rip), xcounter, xcounter
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1:
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vpshufb xbyteswap, var_xdata, var_xdata
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.set i, (i +1)
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.endr
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.endif
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vmovdqa 1*16(p_keys), xkeyA
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vpxor xkey0, xdata0, xdata0
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vpaddq (ddq_add_1 + 16 * (by - 1))(%rip), xcounter, xcounter
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vptest ddq_low_msk(%rip), xcounter
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jnz 1f
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vpaddq ddq_high_add_1(%rip), xcounter, xcounter
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1:
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.if \xctr
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add $by, counter
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.else
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vpaddq (ddq_add_1 + 16 * (by - 1))(%rip), xcounter, xcounter
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vptest ddq_low_msk(%rip), xcounter
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jnz 1f
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vpaddq ddq_high_add_1(%rip), xcounter, xcounter
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1:
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.endif
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.set i, 1
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.rept (by - 1)
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@ -371,94 +397,99 @@ ddq_add_8:
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.endr
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.endm
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.macro do_aes_load val, key_len
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do_aes \val, 1, \key_len
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.macro do_aes_load val, key_len, xctr
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do_aes \val, 1, \key_len, \xctr
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.endm
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.macro do_aes_noload val, key_len
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do_aes \val, 0, \key_len
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.macro do_aes_noload val, key_len, xctr
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do_aes \val, 0, \key_len, \xctr
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.endm
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/* main body of aes ctr load */
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.macro do_aes_ctrmain key_len
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.macro do_aes_ctrmain key_len, xctr
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cmp $16, num_bytes
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jb .Ldo_return2\key_len
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jb .Ldo_return2\xctr\key_len
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vmovdqa byteswap_const(%rip), xbyteswap
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vmovdqu (p_iv), xcounter
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vpshufb xbyteswap, xcounter, xcounter
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.if \xctr
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shr $4, counter
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vmovdqu (p_iv), xiv
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.else
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vmovdqa byteswap_const(%rip), xbyteswap
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vmovdqu (p_iv), xcounter
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vpshufb xbyteswap, xcounter, xcounter
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.endif
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mov num_bytes, tmp
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and $(7*16), tmp
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jz .Lmult_of_8_blks\key_len
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jz .Lmult_of_8_blks\xctr\key_len
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/* 1 <= tmp <= 7 */
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cmp $(4*16), tmp
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jg .Lgt4\key_len
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je .Leq4\key_len
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jg .Lgt4\xctr\key_len
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je .Leq4\xctr\key_len
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.Llt4\key_len:
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.Llt4\xctr\key_len:
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cmp $(2*16), tmp
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jg .Leq3\key_len
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je .Leq2\key_len
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jg .Leq3\xctr\key_len
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je .Leq2\xctr\key_len
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.Leq1\key_len:
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do_aes_load 1, \key_len
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.Leq1\xctr\key_len:
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do_aes_load 1, \key_len, \xctr
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add $(1*16), p_out
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and $(~7*16), num_bytes
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jz .Ldo_return2\key_len
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jmp .Lmain_loop2\key_len
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jz .Ldo_return2\xctr\key_len
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jmp .Lmain_loop2\xctr\key_len
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.Leq2\key_len:
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do_aes_load 2, \key_len
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.Leq2\xctr\key_len:
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do_aes_load 2, \key_len, \xctr
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add $(2*16), p_out
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and $(~7*16), num_bytes
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jz .Ldo_return2\key_len
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jmp .Lmain_loop2\key_len
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jz .Ldo_return2\xctr\key_len
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jmp .Lmain_loop2\xctr\key_len
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.Leq3\key_len:
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do_aes_load 3, \key_len
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.Leq3\xctr\key_len:
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do_aes_load 3, \key_len, \xctr
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add $(3*16), p_out
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and $(~7*16), num_bytes
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jz .Ldo_return2\key_len
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jmp .Lmain_loop2\key_len
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jz .Ldo_return2\xctr\key_len
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jmp .Lmain_loop2\xctr\key_len
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.Leq4\key_len:
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do_aes_load 4, \key_len
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.Leq4\xctr\key_len:
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do_aes_load 4, \key_len, \xctr
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add $(4*16), p_out
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and $(~7*16), num_bytes
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jz .Ldo_return2\key_len
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jmp .Lmain_loop2\key_len
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jz .Ldo_return2\xctr\key_len
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jmp .Lmain_loop2\xctr\key_len
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.Lgt4\key_len:
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.Lgt4\xctr\key_len:
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cmp $(6*16), tmp
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jg .Leq7\key_len
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je .Leq6\key_len
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jg .Leq7\xctr\key_len
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je .Leq6\xctr\key_len
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.Leq5\key_len:
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do_aes_load 5, \key_len
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.Leq5\xctr\key_len:
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do_aes_load 5, \key_len, \xctr
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add $(5*16), p_out
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and $(~7*16), num_bytes
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jz .Ldo_return2\key_len
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jmp .Lmain_loop2\key_len
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jz .Ldo_return2\xctr\key_len
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jmp .Lmain_loop2\xctr\key_len
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.Leq6\key_len:
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do_aes_load 6, \key_len
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.Leq6\xctr\key_len:
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do_aes_load 6, \key_len, \xctr
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add $(6*16), p_out
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and $(~7*16), num_bytes
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jz .Ldo_return2\key_len
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jmp .Lmain_loop2\key_len
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jz .Ldo_return2\xctr\key_len
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jmp .Lmain_loop2\xctr\key_len
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.Leq7\key_len:
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do_aes_load 7, \key_len
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.Leq7\xctr\key_len:
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do_aes_load 7, \key_len, \xctr
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add $(7*16), p_out
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and $(~7*16), num_bytes
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jz .Ldo_return2\key_len
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jmp .Lmain_loop2\key_len
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jz .Ldo_return2\xctr\key_len
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jmp .Lmain_loop2\xctr\key_len
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.Lmult_of_8_blks\key_len:
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.Lmult_of_8_blks\xctr\key_len:
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.if (\key_len != KEY_128)
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vmovdqa 0*16(p_keys), xkey0
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vmovdqa 4*16(p_keys), xkey4
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@ -471,17 +502,19 @@ ddq_add_8:
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vmovdqa 9*16(p_keys), xkey12
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.endif
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.align 16
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.Lmain_loop2\key_len:
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.Lmain_loop2\xctr\key_len:
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/* num_bytes is a multiple of 8 and >0 */
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do_aes_noload 8, \key_len
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do_aes_noload 8, \key_len, \xctr
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add $(8*16), p_out
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sub $(8*16), num_bytes
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jne .Lmain_loop2\key_len
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jne .Lmain_loop2\xctr\key_len
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.Ldo_return2\key_len:
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/* return updated IV */
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vpshufb xbyteswap, xcounter, xcounter
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vmovdqu xcounter, (p_iv)
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.Ldo_return2\xctr\key_len:
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.if !\xctr
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/* return updated IV */
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vpshufb xbyteswap, xcounter, xcounter
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vmovdqu xcounter, (p_iv)
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.endif
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RET
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.endm
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@ -494,7 +527,7 @@ ddq_add_8:
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*/
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SYM_FUNC_START(aes_ctr_enc_128_avx_by8)
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/* call the aes main loop */
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do_aes_ctrmain KEY_128
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do_aes_ctrmain KEY_128 0
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SYM_FUNC_END(aes_ctr_enc_128_avx_by8)
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@ -507,7 +540,7 @@ SYM_FUNC_END(aes_ctr_enc_128_avx_by8)
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*/
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SYM_FUNC_START(aes_ctr_enc_192_avx_by8)
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/* call the aes main loop */
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do_aes_ctrmain KEY_192
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do_aes_ctrmain KEY_192 0
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SYM_FUNC_END(aes_ctr_enc_192_avx_by8)
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@ -520,6 +553,45 @@ SYM_FUNC_END(aes_ctr_enc_192_avx_by8)
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*/
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SYM_FUNC_START(aes_ctr_enc_256_avx_by8)
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/* call the aes main loop */
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do_aes_ctrmain KEY_256
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do_aes_ctrmain KEY_256 0
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SYM_FUNC_END(aes_ctr_enc_256_avx_by8)
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/*
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* routine to do AES128 XCTR enc/decrypt "by8"
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* XMM registers are clobbered.
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* Saving/restoring must be done at a higher level
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* aes_xctr_enc_128_avx_by8(const u8 *in, const u8 *iv, const void *keys,
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* u8* out, unsigned int num_bytes, unsigned int byte_ctr)
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*/
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SYM_FUNC_START(aes_xctr_enc_128_avx_by8)
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/* call the aes main loop */
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do_aes_ctrmain KEY_128 1
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SYM_FUNC_END(aes_xctr_enc_128_avx_by8)
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/*
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* routine to do AES192 XCTR enc/decrypt "by8"
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* XMM registers are clobbered.
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* Saving/restoring must be done at a higher level
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* aes_xctr_enc_192_avx_by8(const u8 *in, const u8 *iv, const void *keys,
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* u8* out, unsigned int num_bytes, unsigned int byte_ctr)
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*/
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SYM_FUNC_START(aes_xctr_enc_192_avx_by8)
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/* call the aes main loop */
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do_aes_ctrmain KEY_192 1
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SYM_FUNC_END(aes_xctr_enc_192_avx_by8)
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/*
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* routine to do AES256 XCTR enc/decrypt "by8"
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* XMM registers are clobbered.
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* Saving/restoring must be done at a higher level
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* aes_xctr_enc_256_avx_by8(const u8 *in, const u8 *iv, const void *keys,
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* u8* out, unsigned int num_bytes, unsigned int byte_ctr)
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*/
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SYM_FUNC_START(aes_xctr_enc_256_avx_by8)
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/* call the aes main loop */
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do_aes_ctrmain KEY_256 1
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SYM_FUNC_END(aes_xctr_enc_256_avx_by8)
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@ -135,6 +135,20 @@ asmlinkage void aes_ctr_enc_192_avx_by8(const u8 *in, u8 *iv,
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void *keys, u8 *out, unsigned int num_bytes);
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asmlinkage void aes_ctr_enc_256_avx_by8(const u8 *in, u8 *iv,
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void *keys, u8 *out, unsigned int num_bytes);
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asmlinkage void aes_xctr_enc_128_avx_by8(const u8 *in, const u8 *iv,
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const void *keys, u8 *out, unsigned int num_bytes,
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unsigned int byte_ctr);
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asmlinkage void aes_xctr_enc_192_avx_by8(const u8 *in, const u8 *iv,
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const void *keys, u8 *out, unsigned int num_bytes,
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unsigned int byte_ctr);
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asmlinkage void aes_xctr_enc_256_avx_by8(const u8 *in, const u8 *iv,
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const void *keys, u8 *out, unsigned int num_bytes,
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unsigned int byte_ctr);
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/*
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* asmlinkage void aesni_gcm_init_avx_gen2()
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* gcm_data *my_ctx_data, context data
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@ -527,6 +541,59 @@ static int ctr_crypt(struct skcipher_request *req)
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return err;
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}
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static void aesni_xctr_enc_avx_tfm(struct crypto_aes_ctx *ctx, u8 *out,
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const u8 *in, unsigned int len, u8 *iv,
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unsigned int byte_ctr)
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{
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if (ctx->key_length == AES_KEYSIZE_128)
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aes_xctr_enc_128_avx_by8(in, iv, (void *)ctx, out, len,
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byte_ctr);
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else if (ctx->key_length == AES_KEYSIZE_192)
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aes_xctr_enc_192_avx_by8(in, iv, (void *)ctx, out, len,
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byte_ctr);
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else
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aes_xctr_enc_256_avx_by8(in, iv, (void *)ctx, out, len,
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byte_ctr);
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}
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static int xctr_crypt(struct skcipher_request *req)
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{
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struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
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struct crypto_aes_ctx *ctx = aes_ctx(crypto_skcipher_ctx(tfm));
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u8 keystream[AES_BLOCK_SIZE];
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struct skcipher_walk walk;
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unsigned int nbytes;
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unsigned int byte_ctr = 0;
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int err;
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__le32 block[AES_BLOCK_SIZE / sizeof(__le32)];
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err = skcipher_walk_virt(&walk, req, false);
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while ((nbytes = walk.nbytes) > 0) {
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kernel_fpu_begin();
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if (nbytes & AES_BLOCK_MASK)
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aesni_xctr_enc_avx_tfm(ctx, walk.dst.virt.addr,
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walk.src.virt.addr, nbytes & AES_BLOCK_MASK,
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walk.iv, byte_ctr);
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nbytes &= ~AES_BLOCK_MASK;
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byte_ctr += walk.nbytes - nbytes;
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|
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if (walk.nbytes == walk.total && nbytes > 0) {
|
||||
memcpy(block, walk.iv, AES_BLOCK_SIZE);
|
||||
block[0] ^= cpu_to_le32(1 + byte_ctr / AES_BLOCK_SIZE);
|
||||
aesni_enc(ctx, keystream, (u8 *)block);
|
||||
crypto_xor_cpy(walk.dst.virt.addr + walk.nbytes -
|
||||
nbytes, walk.src.virt.addr + walk.nbytes
|
||||
- nbytes, keystream, nbytes);
|
||||
byte_ctr += nbytes;
|
||||
nbytes = 0;
|
||||
}
|
||||
kernel_fpu_end();
|
||||
err = skcipher_walk_done(&walk, nbytes);
|
||||
}
|
||||
return err;
|
||||
}
|
||||
|
||||
static int
|
||||
rfc4106_set_hash_subkey(u8 *hash_subkey, const u8 *key, unsigned int key_len)
|
||||
{
|
||||
@ -1050,6 +1117,33 @@ static struct skcipher_alg aesni_skciphers[] = {
|
||||
static
|
||||
struct simd_skcipher_alg *aesni_simd_skciphers[ARRAY_SIZE(aesni_skciphers)];
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
/*
|
||||
* XCTR does not have a non-AVX implementation, so it must be enabled
|
||||
* conditionally.
|
||||
*/
|
||||
static struct skcipher_alg aesni_xctr = {
|
||||
.base = {
|
||||
.cra_name = "__xctr(aes)",
|
||||
.cra_driver_name = "__xctr-aes-aesni",
|
||||
.cra_priority = 400,
|
||||
.cra_flags = CRYPTO_ALG_INTERNAL,
|
||||
.cra_blocksize = 1,
|
||||
.cra_ctxsize = CRYPTO_AES_CTX_SIZE,
|
||||
.cra_module = THIS_MODULE,
|
||||
},
|
||||
.min_keysize = AES_MIN_KEY_SIZE,
|
||||
.max_keysize = AES_MAX_KEY_SIZE,
|
||||
.ivsize = AES_BLOCK_SIZE,
|
||||
.chunksize = AES_BLOCK_SIZE,
|
||||
.setkey = aesni_skcipher_setkey,
|
||||
.encrypt = xctr_crypt,
|
||||
.decrypt = xctr_crypt,
|
||||
};
|
||||
|
||||
static struct simd_skcipher_alg *aesni_simd_xctr;
|
||||
#endif /* CONFIG_X86_64 */
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
static int generic_gcmaes_set_key(struct crypto_aead *aead, const u8 *key,
|
||||
unsigned int key_len)
|
||||
@ -1163,7 +1257,7 @@ static int __init aesni_init(void)
|
||||
static_call_update(aesni_ctr_enc_tfm, aesni_ctr_enc_avx_tfm);
|
||||
pr_info("AES CTR mode by8 optimization enabled\n");
|
||||
}
|
||||
#endif
|
||||
#endif /* CONFIG_X86_64 */
|
||||
|
||||
err = crypto_register_alg(&aesni_cipher_alg);
|
||||
if (err)
|
||||
@ -1180,8 +1274,22 @@ static int __init aesni_init(void)
|
||||
if (err)
|
||||
goto unregister_skciphers;
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
if (boot_cpu_has(X86_FEATURE_AVX))
|
||||
err = simd_register_skciphers_compat(&aesni_xctr, 1,
|
||||
&aesni_simd_xctr);
|
||||
if (err)
|
||||
goto unregister_aeads;
|
||||
#endif /* CONFIG_X86_64 */
|
||||
|
||||
return 0;
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
unregister_aeads:
|
||||
simd_unregister_aeads(aesni_aeads, ARRAY_SIZE(aesni_aeads),
|
||||
aesni_simd_aeads);
|
||||
#endif /* CONFIG_X86_64 */
|
||||
|
||||
unregister_skciphers:
|
||||
simd_unregister_skciphers(aesni_skciphers, ARRAY_SIZE(aesni_skciphers),
|
||||
aesni_simd_skciphers);
|
||||
@ -1197,6 +1305,10 @@ static void __exit aesni_exit(void)
|
||||
simd_unregister_skciphers(aesni_skciphers, ARRAY_SIZE(aesni_skciphers),
|
||||
aesni_simd_skciphers);
|
||||
crypto_unregister_alg(&aesni_cipher_alg);
|
||||
#ifdef CONFIG_X86_64
|
||||
if (boot_cpu_has(X86_FEATURE_AVX))
|
||||
simd_unregister_skciphers(&aesni_xctr, 1, &aesni_simd_xctr);
|
||||
#endif /* CONFIG_X86_64 */
|
||||
}
|
||||
|
||||
late_initcall(aesni_init);
|
||||
|
||||
@ -1169,7 +1169,7 @@ config CRYPTO_AES_NI_INTEL
|
||||
In addition to AES cipher algorithm support, the acceleration
|
||||
for some popular block cipher mode is supported too, including
|
||||
ECB, CBC, LRW, XTS. The 64 bit version has additional
|
||||
acceleration for CTR.
|
||||
acceleration for CTR and XCTR.
|
||||
|
||||
config CRYPTO_AES_SPARC64
|
||||
tristate "AES cipher algorithms (SPARC64)"
|
||||
|
||||
Loading…
Reference in New Issue
Block a user