forked from Minki/linux
ath9k: fix PLL initialization for AR9550
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -868,7 +868,7 @@ static void ath9k_hw_init_pll(struct ath_hw *ah,
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/* program BB PLL phase_shift */
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REG_RMW_FIELD(ah, AR_CH0_BB_DPLL3,
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AR_CH0_BB_DPLL3_PHASE_SHIFT, 0x1);
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} else if (AR_SREV_9340(ah)) {
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} else if (AR_SREV_9340(ah) || AR_SREV_9550(ah)) {
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u32 regval, pll2_divint, pll2_divfrac, refdiv;
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REG_WRITE(ah, AR_RTC_PLL_CONTROL, 0x1142c);
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@ -882,9 +882,15 @@ static void ath9k_hw_init_pll(struct ath_hw *ah,
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pll2_divfrac = 0x1eb85;
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refdiv = 3;
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} else {
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pll2_divint = 88;
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pll2_divfrac = 0;
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refdiv = 5;
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if (AR_SREV_9340(ah)) {
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pll2_divint = 88;
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pll2_divfrac = 0;
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refdiv = 5;
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} else {
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pll2_divint = 0x11;
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pll2_divfrac = 0x26666;
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refdiv = 1;
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}
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}
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regval = REG_READ(ah, AR_PHY_PLL_MODE);
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@ -897,8 +903,12 @@ static void ath9k_hw_init_pll(struct ath_hw *ah,
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udelay(100);
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regval = REG_READ(ah, AR_PHY_PLL_MODE);
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regval = (regval & 0x80071fff) | (0x1 << 30) | (0x1 << 13) |
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(0x4 << 26) | (0x18 << 19);
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if (AR_SREV_9340(ah))
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regval = (regval & 0x80071fff) | (0x1 << 30) |
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(0x1 << 13) | (0x4 << 26) | (0x18 << 19);
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else
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regval = (regval & 0x80071fff) | (0x3 << 30) |
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(0x1 << 13) | (0x4 << 26) | (0x60 << 19);
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REG_WRITE(ah, AR_PHY_PLL_MODE, regval);
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REG_WRITE(ah, AR_PHY_PLL_MODE,
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REG_READ(ah, AR_PHY_PLL_MODE) & 0xfffeffff);
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@ -909,7 +919,8 @@ static void ath9k_hw_init_pll(struct ath_hw *ah,
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REG_WRITE(ah, AR_RTC_PLL_CONTROL, pll);
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if (AR_SREV_9485(ah) || AR_SREV_9340(ah) || AR_SREV_9330(ah))
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if (AR_SREV_9485(ah) || AR_SREV_9340(ah) || AR_SREV_9330(ah) ||
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AR_SREV_9550(ah))
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udelay(1000);
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/* Switch the core clock for ar9271 to 117Mhz */
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@ -922,7 +933,7 @@ static void ath9k_hw_init_pll(struct ath_hw *ah,
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REG_WRITE(ah, AR_RTC_SLEEP_CLK, AR_RTC_FORCE_DERIVED_CLK);
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if (AR_SREV_9340(ah)) {
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if (AR_SREV_9340(ah) || AR_SREV_9550(ah)) {
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if (ah->is_clk_25mhz) {
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REG_WRITE(ah, AR_RTC_DERIVED_CLK, 0x17c << 1);
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REG_WRITE(ah, AR_SLP32_MODE, 0x0010f3d7);
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