drm/radeon/si_dpm: Limit clocks on HD86xx part
Limit clocks on a specific HD86xx part to avoid crashes (while awaiting an appropriate PP fix). Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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				| @ -3021,6 +3021,12 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev, | ||||
| 		max_sclk = 75000; | ||||
| 		max_mclk = 80000; | ||||
| 	} | ||||
| 	/* limit clocks on HD8600 series */ | ||||
| 	if (rdev->pdev->device == 0x6660 && | ||||
| 	    rdev->pdev->revision == 0x83) { | ||||
| 		max_sclk = 75000; | ||||
| 		max_mclk = 80000; | ||||
| 	} | ||||
| 
 | ||||
| 	if (rps->vce_active) { | ||||
| 		rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; | ||||
|  | ||||
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