forked from Minki/linux
Merge tag 'arm-soc/for-4.3/dts' of http://github.com/broadcom/stblinux into next/dt
Merge "Broadcom Device Tree changes for 4.3 (part 1)" from Florian Fainelli: This pull request contains two changes: - Ray adds the relevant clocks device tree nodes for Cygnus SoCs - Rafal enables UART0 on BCM5301X routers where it has been verified to work correctly * tag 'arm-soc/for-4.3/dts' of http://github.com/broadcom/stblinux: ARM: BCM5301X: Enable UART0 on tested devices ARM: dts: enable clock support for Broadcom Cygnus Signed-off-by: Olof Johansson <olof@lixom.net>
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commit
fb61a92190
@ -36,56 +36,89 @@ clocks {
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ranges;
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osc: oscillator {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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#clock-cells = <1>;
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clock-frequency = <25000000>;
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};
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/* Cygnus ARM PLL */
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armpll: armpll {
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#clock-cells = <0>;
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compatible = "brcm,cygnus-armpll";
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clocks = <&osc>;
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reg = <0x19000000 0x1000>;
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};
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/* peripheral clock for system timer */
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periph_clk: arm_periph_clk {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&armpll>;
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clock-div = <2>;
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clock-mult = <1>;
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};
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/* APB bus clock */
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apb_clk: apb_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <1000000000>;
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compatible = "fixed-factor-clock";
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clocks = <&armpll>;
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clock-div = <4>;
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clock-mult = <1>;
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};
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periph_clk: periph_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <500000000>;
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genpll: genpll {
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#clock-cells = <1>;
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compatible = "brcm,cygnus-genpll";
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reg = <0x0301d000 0x2c>, <0x0301c020 0x4>;
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clocks = <&osc>;
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clock-output-names = "genpll", "axi21", "250mhz", "ihost_sys",
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"enet_sw", "audio_125", "can";
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};
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sdio_clk: lcpll_ch2 {
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compatible = "fixed-clock";
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/* always 1/2 of the axi21 clock */
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axi41_clk: axi41_clk {
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#clock-cells = <0>;
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clock-frequency = <200000000>;
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compatible = "fixed-factor-clock";
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clocks = <&genpll 1>;
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clock-div = <2>;
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clock-mult = <1>;
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};
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/* always 1/4 of the axi21 clock */
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axi81_clk: axi81_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <100000000>;
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compatible = "fixed-factor-clock";
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clocks = <&genpll 1>;
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clock-div = <4>;
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clock-mult = <1>;
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};
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keypad_clk: keypad_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <31806>;
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lcpll0: lcpll0 {
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#clock-cells = <1>;
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compatible = "brcm,cygnus-lcpll0";
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reg = <0x0301d02c 0x1c>, <0x0301c020 0x4>;
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clocks = <&osc>;
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clock-output-names = "lcpll0", "pcie_phy", "ddr_phy", "sdio",
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"usb_phy", "smart_card", "ch5";
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};
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adc_clk: adc_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <1562500>;
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mipipll: mipipll {
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#clock-cells = <1>;
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compatible = "brcm,cygnus-mipipll";
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reg = <0x180a9800 0x2c>, <0x0301c020 0x4>, <0x180aa024 0x4>;
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clocks = <&osc>;
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clock-output-names = "mipipll", "ch0_unused", "ch1_lcd",
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"ch2_v3d", "ch3_unused", "ch4_unused",
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"ch5_unused";
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};
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pwm_clk: pwm_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <1000000>;
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};
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asiu_clks: asiu_clks {
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#clock-cells = <1>;
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compatible = "brcm,cygnus-asiu-clk";
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reg = <0x0301d048 0xc>, <0x180aa024 0x4>;
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lcd_clk: mipipll_ch1 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <100000000>;
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clocks = <&osc>;
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clock-output-names = "keypad", "adc/touch", "pwm";
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};
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};
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@ -135,3 +135,7 @@
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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@ -55,3 +55,7 @@
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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@ -24,16 +24,6 @@
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reg = <0x00000000 0x08000000>;
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};
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chipcommonA {
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uart0: serial@0300 {
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status = "okay";
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};
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uart1: serial@0400 {
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status = "okay";
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};
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};
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leds {
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compatible = "gpio-leds";
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@ -92,3 +82,7 @@
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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@ -118,3 +118,7 @@
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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@ -122,3 +122,7 @@
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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