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drm/amd/display: add dsc mst stream pbn log for debug

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[why]
payload and slot number of display on dsc mst hub will be
adjusted when there is change on any display on dsc hub.
to monitor dsc enable/disable, pbn change, we need add log.

[How]
add mst_pbn to dc_dsc_config of dc_crtc_timing.
add dsc, pbn, display name within dc_core_enable_stream,
dc_core_disable_stream, dc_stream_log

Reviewed-by: Jerry Zuo <Jerry.Zuo@amd.com>
Acked-by: Jasdeep Dhillon <jdhillon@amd.com>
Signed-off-by: Hersen Wu <hersenwu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Hersen Wu 2022-02-06 16:06:00 -05:00 committed by Alex Deucher
parent 43d15db1d0
commit fa39f936db
4 changed files with 52 additions and 0 deletions
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15
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
View File

@ -599,6 +599,21 @@ static void set_dsc_configs_from_fairness_vars(struct dsc_mst_fairness_params *p
} else {
params[i].timing->flags.DSC = 0;
}
params[i].timing->dsc_cfg.mst_pbn = vars[i + k].pbn;
}
for (i = 0; i < count; i++) {
if (params[i].sink) {
if (params[i].sink->sink_signal != SIGNAL_TYPE_VIRTUAL &&
params[i].sink->sink_signal != SIGNAL_TYPE_NONE)
DRM_DEBUG_DRIVER("%s i=%d dispname=%s\n", __func__, i,
params[i].sink->edid_caps.display_name);
}
DRM_DEBUG_DRIVER("dsc=%d bits_per_pixel=%d pbn=%d\n",
params[i].timing->flags.DSC,
params[i].timing->dsc_cfg.bits_per_pixel,
vars[i + k].pbn);
}
}

20
drivers/gpu/drm/amd/display/dc/core/dc_link.c
View File

@ -4082,6 +4082,15 @@ void core_link_enable_stream(
DC_LOGGER_INIT(pipe_ctx->stream->ctx->logger);
if (pipe_ctx->stream->sink) {
if (pipe_ctx->stream->sink->sink_signal != SIGNAL_TYPE_VIRTUAL &&
pipe_ctx->stream->sink->sink_signal != SIGNAL_TYPE_NONE) {
DC_LOG_DC("%s pipe_ctx dispname=%s signal=%x\n", __func__,
pipe_ctx->stream->sink->edid_caps.display_name,
pipe_ctx->stream->signal);
}
}
if (!IS_DIAG_DC(dc->ctx->dce_environment) &&
dc_is_virtual_signal(pipe_ctx->stream->signal))
return;
@ -4303,6 +4312,17 @@ void core_link_disable_stream(struct pipe_ctx *pipe_ctx)
if (is_dp_128b_132b_signal(pipe_ctx))
vpg = pipe_ctx->stream_res.hpo_dp_stream_enc->vpg;
DC_LOGGER_INIT(pipe_ctx->stream->ctx->logger);
if (pipe_ctx->stream->sink) {
if (pipe_ctx->stream->sink->sink_signal != SIGNAL_TYPE_VIRTUAL &&
pipe_ctx->stream->sink->sink_signal != SIGNAL_TYPE_NONE) {
DC_LOG_DC("%s pipe_ctx dispname=%s signal=%x\n", __func__,
pipe_ctx->stream->sink->edid_caps.display_name,
pipe_ctx->stream->signal);
}
}
if (!IS_DIAG_DC(dc->ctx->dce_environment) &&
dc_is_virtual_signal(pipe_ctx->stream->signal))
return;

16
drivers/gpu/drm/amd/display/dc/core/dc_stream.c
View File

@ -737,5 +737,21 @@ void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream)
DC_LOG_DC(
"\tlink: %d\n",
stream->link->link_index);
DC_LOG_DC(
"\tdsc: %d, mst_pbn: %d\n",
stream->timing.flags.DSC,
stream->timing.dsc_cfg.mst_pbn);
if (stream->sink) {
if (stream->sink->sink_signal != SIGNAL_TYPE_VIRTUAL &&
stream->sink->sink_signal != SIGNAL_TYPE_NONE) {
DC_LOG_DC(
"\tdispname: %s signal: %x\n",
stream->sink->edid_caps.display_name,
stream->signal);
}
}
}

1
drivers/gpu/drm/amd/display/dc/dc_hw_types.h
View File

@ -745,6 +745,7 @@ struct dc_dsc_config {
bool is_frl; /* indicate if DSC is applied based on HDMI FRL sink's capability */
#endif
bool is_dp; /* indicate if DSC is applied based on DP's capability */
uint32_t mst_pbn; /* pbn of display on dsc mst hub */
};
struct dc_crtc_timing {
uint32_t h_total;