forked from Minki/linux
The biggest fix here is the long pending patch mux UART pins so PM
retention idle works again. Also included are few other PM wake-up related fixes, and removal of dead cpu detection code. The other fixes are trivial build and randconfig related fixes. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIcBAABAgAGBQJP0aRAAAoJEBvUPslcq6Vz/SMP/02aIZ3M8i3cTQL3Klva0YaC oZI7Kb0/ACUD69qVqM0ykG/o0FsxMItgIrBcrrNlpkvEdHogpgTl+RO0+1jdlWZI Z9zh6u1KDRaW4ZAALAl0zM1mLFOJlmq83YjfaecGPt3PWlIbQbcvGioheZzJnMam 0wyoOgP2vwpXu/sg0cNvx5HFXVK+pnDDRp/ACa3vUjTBZkEBzTAT5Djw4HjrBBwe 1GJ/A2Aht9X0j0KcER0WuoMlhkOZrY3ZJizqI36aVAM3OjZdiUXa8Asr8bxK1mM3 3MDjJFQdnw2kWPDiTB5p2eptUxi1A6XVOuwfQI0M3mahWRmbLmMp1kbM8X2E39J6 9DoHs1BQpe1zGJ7179TqtlTSbNr0EWUbej/fygiYaksP4g0k1vY+x6t+03ilZcnC OPCxeHaE2BTq3hx4190XH6C/ldNAbUKkvvQselYvUfsHXq8G6fnANTF88P9WLzCk +wLF2m5/Tz1AUGgArbvvu74YByobrPFc9ERWKvPLHT0SbyIsNrXbb2XsHEYEep7e UlmX/4OrOdGvcsZPd48f2CKYW1ZVNZaETXVSFncpXwj4zmlWyTWeR/yKIpsfELn3 tdEppZza9BUsR13svKT0Xw0CHcxDIzwWzGNHglzsg4pQmAkOeptAn4BA4QZ814SB 97B7v8mzTs2T6pBflp0e =Aa3m -----END PGP SIGNATURE----- Merge tag 'omap-fixes-for-v3.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes The biggest fix here is the long pending patch mux UART pins so PM retention idle works again. Also included are few other PM wake-up related fixes, and removal of dead cpu detection code. The other fixes are trivial build and randconfig related fixes. * tag 'omap-fixes-for-v3.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: Fix compile for CONFIG_TIDSPBRIDGE platform init code ARM: OMAP3: Fix omap3_l3_block_irq warning when CONFIG_BUG is not set ARM: OMAP: Fix MMC_OMAP build when only MMC_OMAP_HS is selected OMAP2+: UART: Add mechanism to probe uart pins and configure rx wakeup ARM: OMAP: Fix lis3lv02d accelerometer to use gpio_to_irq ARM: OMAP: SoC detection: remove unused cpu_is macros ARM: OMAP3: clock data: cleanup AM3[35]x SoC detection arm: omap3: am35x: Don't mark missing features as present ARM: OMAP3: PM: fix shared PRCM interrupts: leave disabled at boot ARM: OMAP2+: INTC: fix suspend abort, set IRQCHIP_SKIP_SET_WAKE
This commit is contained in:
commit
f9c15a1b7d
@ -144,7 +144,6 @@ static struct lis3lv02d_platform_data rx51_lis3lv02d_data = {
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.release_resources = lis302_release,
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.st_min_limits = {-32, 3, 3},
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.st_max_limits = {-3, 32, 32},
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.irq2 = OMAP_GPIO_IRQ(LIS302_IRQ2_GPIO),
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};
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#endif
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@ -1030,7 +1029,6 @@ static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_3[] = {
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{
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I2C_BOARD_INFO("lis3lv02d", 0x1d),
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.platform_data = &rx51_lis3lv02d_data,
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.irq = OMAP_GPIO_IRQ(LIS302_IRQ1_GPIO),
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},
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#endif
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};
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@ -1056,6 +1054,10 @@ static int __init rx51_i2c_init(void)
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omap_pmic_init(1, 2200, "twl5030", INT_34XX_SYS_NIRQ, &rx51_twldata);
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omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2,
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ARRAY_SIZE(rx51_peripherals_i2c_board_info_2));
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#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
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rx51_lis3lv02d_data.irq2 = gpio_to_irq(LIS302_IRQ2_GPIO);
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rx51_peripherals_i2c_board_info_3[0].irq = gpio_to_irq(LIS302_IRQ1_GPIO);
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#endif
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omap_register_i2c_bus(3, 400, rx51_peripherals_i2c_board_info_3,
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ARRAY_SIZE(rx51_peripherals_i2c_board_info_3));
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return 0;
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@ -3514,7 +3514,7 @@ int __init omap3xxx_clk_init(void)
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struct omap_clk *c;
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u32 cpu_clkflg = 0;
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if (cpu_is_omap3517()) {
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if (soc_is_am35xx()) {
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cpu_mask = RATE_IN_34XX;
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cpu_clkflg = CK_AM35XX;
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} else if (cpu_is_omap3630()) {
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@ -20,6 +20,9 @@
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <asm/memblock.h>
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#include "cm2xxx_3xxx.h"
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#include "prm2xxx_3xxx.h"
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#ifdef CONFIG_BRIDGE_DVFS
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@ -246,6 +246,17 @@ void __init omap3xxx_check_features(void)
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omap_features |= OMAP3_HAS_SDRC;
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/*
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* am35x fixups:
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* - The am35x Chip ID register has bits 12, 7:5, and 3:2 marked as
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* reserved and therefore return 0 when read. Unfortunately,
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* OMAP3_CHECK_FEATURE() will interpret some of those zeroes to
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* mean that a feature is present even though it isn't so clear
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* the incorrectly set feature bits.
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*/
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if (soc_is_am35xx())
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omap_features &= ~(OMAP3_HAS_IVA | OMAP3_HAS_ISP);
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/*
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* TODO: Get additional info (where applicable)
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* e.g. Size of L2 cache.
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@ -149,6 +149,7 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
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ct->chip.irq_ack = omap_mask_ack_irq;
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ct->chip.irq_mask = irq_gc_mask_disable_reg;
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ct->chip.irq_unmask = irq_gc_unmask_enable_reg;
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ct->chip.flags |= IRQCHIP_SKIP_SET_WAKE;
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ct->regs.enable = INTC_MIR_CLEAR0;
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ct->regs.disable = INTC_MIR_SET0;
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@ -217,8 +217,7 @@ static int __init _omap_mux_get_by_name(struct omap_mux_partition *partition,
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return -ENODEV;
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}
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static int __init
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omap_mux_get_by_name(const char *muxname,
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int __init omap_mux_get_by_name(const char *muxname,
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struct omap_mux_partition **found_partition,
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struct omap_mux **found_mux)
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{
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@ -59,6 +59,7 @@
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#define OMAP_PIN_OFF_WAKEUPENABLE OMAP_WAKEUP_EN
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#define OMAP_MODE_GPIO(x) (((x) & OMAP_MUX_MODE7) == OMAP_MUX_MODE4)
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#define OMAP_MODE_UART(x) (((x) & OMAP_MUX_MODE7) == OMAP_MUX_MODE0)
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/* Flags for omapX_mux_init */
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#define OMAP_PACKAGE_MASK 0xffff
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@ -225,8 +226,18 @@ omap_hwmod_mux_init(struct omap_device_pad *bpads, int nr_pads);
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*/
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void omap_hwmod_mux(struct omap_hwmod_mux_info *hmux, u8 state);
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int omap_mux_get_by_name(const char *muxname,
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struct omap_mux_partition **found_partition,
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struct omap_mux **found_mux);
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#else
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static inline int omap_mux_get_by_name(const char *muxname,
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struct omap_mux_partition **found_partition,
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struct omap_mux **found_mux)
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{
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return 0;
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}
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static inline int omap_mux_init_gpio(int gpio, int val)
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{
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return 0;
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@ -155,10 +155,11 @@ static irqreturn_t omap3_l3_block_irq(struct omap3_l3 *l3,
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u8 multi = error & L3_ERROR_LOG_MULTI;
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u32 address = omap3_l3_decode_addr(error_addr);
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WARN(true, "%s seen by %s %s at address %x\n",
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pr_err("%s seen by %s %s at address %x\n",
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omap3_l3_code_string(code),
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omap3_l3_initiator_string(initid),
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multi ? "Multiple Errors" : "", address);
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WARN_ON(1);
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return IRQ_HANDLED;
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}
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@ -724,6 +724,7 @@ int __init omap3_pm_init(void)
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ret = request_irq(omap_prcm_event_to_irq("io"),
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_prcm_int_handle_io, IRQF_SHARED | IRQF_NO_SUSPEND, "pm_io",
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omap3_pm_init);
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enable_irq(omap_prcm_event_to_irq("io"));
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if (ret) {
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pr_err("pm: Failed to request pm_io irq\n");
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@ -15,6 +15,7 @@
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include "common.h"
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#include <plat/cpu.h>
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@ -303,8 +304,15 @@ void omap3xxx_prm_restore_irqen(u32 *saved_mask)
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static int __init omap3xxx_prcm_init(void)
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{
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if (cpu_is_omap34xx())
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return omap_prcm_register_chain_handler(&omap3_prcm_irq_setup);
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return 0;
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int ret = 0;
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if (cpu_is_omap34xx()) {
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ret = omap_prcm_register_chain_handler(&omap3_prcm_irq_setup);
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if (!ret)
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irq_set_status_flags(omap_prcm_event_to_irq("io"),
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IRQ_NOAUTOEN);
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}
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return ret;
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}
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subsys_initcall(omap3xxx_prcm_init);
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@ -57,6 +57,7 @@ struct omap_uart_state {
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struct list_head node;
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struct omap_hwmod *oh;
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struct omap_device_pad default_omap_uart_pads[2];
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};
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static LIST_HEAD(uart_list);
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@ -126,11 +127,70 @@ static void omap_uart_set_smartidle(struct platform_device *pdev) {}
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#endif /* CONFIG_PM */
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#ifdef CONFIG_OMAP_MUX
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static void omap_serial_fill_default_pads(struct omap_board_data *bdata)
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#define OMAP_UART_DEFAULT_PAD_NAME_LEN 28
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static char rx_pad_name[OMAP_UART_DEFAULT_PAD_NAME_LEN],
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tx_pad_name[OMAP_UART_DEFAULT_PAD_NAME_LEN] __initdata;
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static void __init
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omap_serial_fill_uart_tx_rx_pads(struct omap_board_data *bdata,
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struct omap_uart_state *uart)
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{
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uart->default_omap_uart_pads[0].name = rx_pad_name;
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uart->default_omap_uart_pads[0].flags = OMAP_DEVICE_PAD_REMUX |
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OMAP_DEVICE_PAD_WAKEUP;
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uart->default_omap_uart_pads[0].enable = OMAP_PIN_INPUT |
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OMAP_MUX_MODE0;
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uart->default_omap_uart_pads[0].idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0;
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uart->default_omap_uart_pads[1].name = tx_pad_name;
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uart->default_omap_uart_pads[1].enable = OMAP_PIN_OUTPUT |
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OMAP_MUX_MODE0;
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bdata->pads = uart->default_omap_uart_pads;
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bdata->pads_cnt = ARRAY_SIZE(uart->default_omap_uart_pads);
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}
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static void __init omap_serial_check_wakeup(struct omap_board_data *bdata,
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struct omap_uart_state *uart)
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{
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struct omap_mux_partition *tx_partition = NULL, *rx_partition = NULL;
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struct omap_mux *rx_mux = NULL, *tx_mux = NULL;
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char *rx_fmt, *tx_fmt;
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int uart_nr = bdata->id + 1;
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if (bdata->id != 2) {
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rx_fmt = "uart%d_rx.uart%d_rx";
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tx_fmt = "uart%d_tx.uart%d_tx";
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} else {
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rx_fmt = "uart%d_rx_irrx.uart%d_rx_irrx";
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tx_fmt = "uart%d_tx_irtx.uart%d_tx_irtx";
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}
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snprintf(rx_pad_name, OMAP_UART_DEFAULT_PAD_NAME_LEN, rx_fmt,
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uart_nr, uart_nr);
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snprintf(tx_pad_name, OMAP_UART_DEFAULT_PAD_NAME_LEN, tx_fmt,
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uart_nr, uart_nr);
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if (omap_mux_get_by_name(rx_pad_name, &rx_partition, &rx_mux) >= 0 &&
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omap_mux_get_by_name
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(tx_pad_name, &tx_partition, &tx_mux) >= 0) {
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u16 tx_mode, rx_mode;
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tx_mode = omap_mux_read(tx_partition, tx_mux->reg_offset);
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rx_mode = omap_mux_read(rx_partition, rx_mux->reg_offset);
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/*
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* Check if uart is used in default tx/rx mode i.e. in mux mode0
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* if yes then configure rx pin for wake up capability
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*/
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if (OMAP_MODE_UART(rx_mode) && OMAP_MODE_UART(tx_mode))
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omap_serial_fill_uart_tx_rx_pads(bdata, uart);
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}
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}
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#else
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static void omap_serial_fill_default_pads(struct omap_board_data *bdata) {}
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static void __init omap_serial_check_wakeup(struct omap_board_data *bdata,
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struct omap_uart_state *uart)
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{
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}
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#endif
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static char *cmdline_find_option(char *str)
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@ -287,8 +347,7 @@ void __init omap_serial_board_init(struct omap_uart_port_info *info)
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bdata.pads = NULL;
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bdata.pads_cnt = 0;
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if (cpu_is_omap44xx() || cpu_is_omap34xx())
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omap_serial_fill_default_pads(&bdata);
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omap_serial_check_wakeup(&bdata, uart);
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if (!info)
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omap_serial_init_port(&bdata, NULL);
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|
@ -252,8 +252,6 @@ IS_AM_SUBCLASS(335x, 0x335)
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* cpu_is_omap2423(): True for OMAP2423
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* cpu_is_omap2430(): True for OMAP2430
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* cpu_is_omap3430(): True for OMAP3430
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* cpu_is_omap3505(): True for OMAP3505
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* cpu_is_omap3517(): True for OMAP3517
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*/
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#define GET_OMAP_TYPE ((omap_rev() >> 16) & 0xffff)
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@ -277,8 +275,6 @@ IS_OMAP_TYPE(2422, 0x2422)
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IS_OMAP_TYPE(2423, 0x2423)
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IS_OMAP_TYPE(2430, 0x2430)
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IS_OMAP_TYPE(3430, 0x3430)
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IS_OMAP_TYPE(3505, 0x3517)
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IS_OMAP_TYPE(3517, 0x3517)
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#define cpu_is_omap310() 0
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#define cpu_is_omap730() 0
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@ -293,12 +289,6 @@ IS_OMAP_TYPE(3517, 0x3517)
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#define cpu_is_omap2422() 0
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#define cpu_is_omap2423() 0
|
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#define cpu_is_omap2430() 0
|
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#define cpu_is_omap3503() 0
|
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#define cpu_is_omap3515() 0
|
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#define cpu_is_omap3525() 0
|
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#define cpu_is_omap3530() 0
|
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#define cpu_is_omap3505() 0
|
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#define cpu_is_omap3517() 0
|
||||
#define cpu_is_omap3430() 0
|
||||
#define cpu_is_omap3630() 0
|
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|
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@ -350,12 +340,6 @@ IS_OMAP_TYPE(3517, 0x3517)
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP3)
|
||||
# undef cpu_is_omap3430
|
||||
# undef cpu_is_omap3503
|
||||
# undef cpu_is_omap3515
|
||||
# undef cpu_is_omap3525
|
||||
# undef cpu_is_omap3530
|
||||
# undef cpu_is_omap3505
|
||||
# undef cpu_is_omap3517
|
||||
# undef cpu_is_ti81xx
|
||||
# undef cpu_is_ti816x
|
||||
# undef cpu_is_ti814x
|
||||
@ -363,19 +347,6 @@ IS_OMAP_TYPE(3517, 0x3517)
|
||||
# undef cpu_is_am33xx
|
||||
# undef cpu_is_am335x
|
||||
# define cpu_is_omap3430() is_omap3430()
|
||||
# define cpu_is_omap3503() (cpu_is_omap3430() && \
|
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(!omap3_has_iva()) && \
|
||||
(!omap3_has_sgx()))
|
||||
# define cpu_is_omap3515() (cpu_is_omap3430() && \
|
||||
(!omap3_has_iva()) && \
|
||||
(omap3_has_sgx()))
|
||||
# define cpu_is_omap3525() (cpu_is_omap3430() && \
|
||||
(!omap3_has_sgx()) && \
|
||||
(omap3_has_iva()))
|
||||
# define cpu_is_omap3530() (cpu_is_omap3430())
|
||||
# define cpu_is_omap3517() is_omap3517()
|
||||
# define cpu_is_omap3505() (cpu_is_omap3517() && \
|
||||
!omap3_has_sgx())
|
||||
# undef cpu_is_omap3630
|
||||
# define cpu_is_omap3630() is_omap363x()
|
||||
# define cpu_is_ti81xx() is_ti81xx()
|
||||
@ -424,10 +395,6 @@ IS_OMAP_TYPE(3517, 0x3517)
|
||||
#define OMAP3630_REV_ES1_1 (OMAP363X_CLASS | (0x1 << 8))
|
||||
#define OMAP3630_REV_ES1_2 (OMAP363X_CLASS | (0x2 << 8))
|
||||
|
||||
#define OMAP3517_CLASS 0x35170034
|
||||
#define OMAP3517_REV_ES1_0 OMAP3517_CLASS
|
||||
#define OMAP3517_REV_ES1_1 (OMAP3517_CLASS | (0x1 << 8))
|
||||
|
||||
#define TI816X_CLASS 0x81600034
|
||||
#define TI8168_REV_ES1_0 TI816X_CLASS
|
||||
#define TI8168_REV_ES1_1 (TI816X_CLASS | (0x1 << 8))
|
||||
|
@ -172,8 +172,7 @@ struct omap_mmc_platform_data {
|
||||
extern void omap_mmc_notify_cover_event(struct device *dev, int slot,
|
||||
int is_closed);
|
||||
|
||||
#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
|
||||
defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
|
||||
#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
|
||||
void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
|
||||
int nr_controllers);
|
||||
void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data);
|
||||
@ -185,7 +184,6 @@ static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
|
||||
static inline void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
|
||||
{
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
extern int omap_msdi_reset(struct omap_hwmod *oh);
|
||||
|
Loading…
Reference in New Issue
Block a user