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drm/i915/icl: Don't wait for empty FIFO

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For Gen11 DSI, we don't need to wait for getting
DSI FIFO empty after sending DCS commands.

Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/5e078a0274c1fba2521cb14d7d02fd1038ec1b0e.1540900289.git.jani.nikula@intel.com
This commit is contained in:
Madhav Chauhan 2018-10-30 13:56:42 +02:00 committed by Jani Nikula
parent bf4d57ff41
commit f968c85bce
1 changed files with 3 additions and 1 deletions
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4
drivers/gpu/drm/i915/intel_dsi_vbt.c
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@ -111,6 +111,7 @@ static inline enum port intel_dsi_seq_port_to_port(u8 port)
static const u8 *mipi_exec_send_packet(struct intel_dsi *intel_dsi,
const u8 *data)
{
struct drm_i915_private *dev_priv = to_i915(intel_dsi->base.base.dev);
struct mipi_dsi_device *dsi_device;
u8 type, flags, seq_port;
u16 len;
@ -181,7 +182,8 @@ static const u8 *mipi_exec_send_packet(struct intel_dsi *intel_dsi,
break;
}
vlv_dsi_wait_for_fifo_empty(intel_dsi, port);
if (!IS_ICELAKE(dev_priv))
vlv_dsi_wait_for_fifo_empty(intel_dsi, port);
out:
data += len;