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[ALSA] Adding support for ATI IXP450 HD Audio device support

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Documentation,HDA Intel driver
This patch changes the Intel HD Audio device driver to include
the support of HD Audio device embedded in ATI south bridge
IXP450. Because the design of ATI chipset follows intel HD Audio
specification 1.0, the programming method is the same as that
of intel HD Audio device exception one minor change which requires
to enable snoop for DMA transport. There are 3 changes that have been
made to hda_intel.c file.
  1. Added device ID for ATI HD Audio device;
  2. Increase maximum CODEC supported to 4;
  3. Enable snoop during the driver initialization.

Signed-off-by: Frederick Li <fli@ati.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
This commit is contained in:
Frederick Li 2005-05-12 14:55:20 +02:00 committed by Jaroslav Kysela
parent 2fa522bed8
commit f5d40b30ed
2 changed files with 21 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Documentation/sound/alsa/ALSA-Configuration.txt
View File

@ -615,7 +615,7 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
Module snd-hda-intel
--------------------
Module for Intel HD Audio (ICH6, ICH6M, ICH7)
Module for Intel HD Audio (ICH6, ICH6M, ICH7), ATI SB450
model - force the model name
position_fix - Fix DMA pointer (0 = FIFO size, 1 = none, 2 = POSBUF)

23
sound/pci/hda/hda_intel.c
View File

@ -68,7 +68,8 @@ MODULE_LICENSE("GPL");
MODULE_SUPPORTED_DEVICE("{{Intel, ICH6},"
"{Intel, ICH6M},"
"{Intel, ICH7},"
"{Intel, ESB2}}");
"{Intel, ESB2},"
"{ATI, SB450}}");
MODULE_DESCRIPTION("Intel HDA driver");
#define SFX "hda-intel: "
@ -153,7 +154,7 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 };
/* STATESTS int mask: SD2,SD1,SD0 */
#define STATESTS_INT_MASK 0x07
#define AZX_MAX_CODECS 3
#define AZX_MAX_CODECS 4
/* SD_CTL bits */
#define SD_CTL_STREAM_RESET 0x01 /* stream reset bit */
@ -193,6 +194,12 @@ enum {
POS_FIX_POSBUF
};
/* Defines for ATI HD Audio support in SB450 south bridge */
#define ATI_SB450_HDAUDIO_PCI_DEVICE_ID 0x437b
#define ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR 0x42
#define ATI_SB450_HDAUDIO_ENABLE_SNOOP 0x02
/*
* Use CORB/RIRB for communication from/to codecs.
* This is the way recommended by Intel (see below).
@ -644,7 +651,7 @@ static void azx_stream_stop(azx_t *chip, azx_dev_t *azx_dev)
*/
static void azx_init_chip(azx_t *chip)
{
unsigned char tcsel_reg;
unsigned char tcsel_reg, ati_misc_cntl2;
/* Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
* TCSEL == Traffic Class Select Register, which sets PCI express QOS
@ -668,6 +675,15 @@ static void azx_init_chip(azx_t *chip)
azx_writel(chip, DPLBASE, (u32)chip->posbuf.addr);
azx_writel(chip, DPUBASE, upper_32bit(chip->posbuf.addr));
}
/* For ATI SB450 azalia HD audio, we need to enable snoop */
if (chip->pci->vendor == PCI_VENDOR_ID_ATI &&
chip->pci->device == ATI_SB450_HDAUDIO_PCI_DEVICE_ID) {
pci_read_config_byte(chip->pci, ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR,
&ati_misc_cntl2);
pci_write_config_byte(chip->pci, ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR,
(ati_misc_cntl2 & 0xf8) | ATI_SB450_HDAUDIO_ENABLE_SNOOP);
}
}
@ -1435,6 +1451,7 @@ static struct pci_device_id azx_ids[] = {
{ 0x8086, 0x2668, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ICH6 */
{ 0x8086, 0x27d8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ICH7 */
{ 0x8086, 0x269a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ESB2 */
{ 0x1002, 0x437b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ATI SB450 */
{ 0, }
};
MODULE_DEVICE_TABLE(pci, azx_ids);